Microprocessor CT-1 Solution (2022-2023)

Section-A
1. (a.) T-states are the number of clock cycles required to execute an instruction.
The formula to calculate the time taken to execute an instruction is:
Time taken = (Number of T-states / Clock frequency)
Given that the clock frequency of the 8085 microprocessor is 5 MHz, we can calculate the
number of T-states required to execute an instruction as follows:
Number of T-states = (Time taken x Clock frequency)
Number of T-states = (1.4 x 10^-6 s x 5 x 10^6 Hz)
Number of T-states = 7
Therefore, the number of T-states needed for executing the instruction is 7.
(b.) Vectored and Non-Vectored Interrupts –
Vectored Interrupts are those which have fixed vector address (starting address of sub-
routine) and after executing these, program control is transferred to that address. Vector
Addresses are calculated by the formula 8 * TYPE
Non-Vectored Interrupts are those in which vector address is not predefined. The interrupting
device gives the address of sub-routine for these interrupts. INTR is the only non-vectored
interrupt in 8085 microprocessor.
(c.)
• Microprocessor consists of only a Central Processing Unit, whereas Micro Controller
contains a CPU, Memory, I/O all integrated into one chip.
• Microprocessor is used in Personal Computers whereas Micro Controller is used in an
embedded system.
• Microprocessor uses an external bus to interface to RAM, ROM, and other peripherals,
on the other hand, Microcontroller uses an internal controlling bus.
• Microprocessors are based on Von Neumann model Micro controllers are based on
Harvard architecture
• Microprocessor is complicated and expensive, with a large number of instructions to
process but Microcontroller is inexpensive and straightforward with fewer instructions
to process.
(d.)

• The microprocessor is used in personal computers (PCs).

• The microprocessors are used in modems, telephone, digital telephone sets, and also in
air reservation systems and railway reservation systems.
• The microprocessor is used in medical instrument to measure temperature and blood
pressure.
• It is also used in mobile phones and television.
• It is used in military applications.
• It is also used in traffic light control.
• Microprocessor is used in home appliances such as microwave ovens, washing machine
etc.
(e.) Some of the common components of a microprocessor are:

• Control Unit
• I/O Units
• Arithmetic Logic Unit (ALU)
• Registers
 • Cache

(f.)
1. It is an 8-bit microprocessor i.e. it can accept, process, or provide 8-bit data
simultaneously.
2. It operates on a single +5V power supply connected at Vcc; power supply ground is
connected to Vss.
3. It can operate with a 3 MHz clock frequency. The 8085A-2 version can operate at
the maximum frequency of 5 MHz.
4. It has 16 address lines, hence it can access (216) 64 Kbytes of memory.
5. It provides 8 bit I/O addresses to access (28 ) 256 I/O ports.
(g.) Accumulator is used to perform I/O, arithmetic, and logical operations. It is connected to
ALU and the internal data bus. The accumulator is the heart of the microprocessor because for
all arithmetic operations Accumulator’s 8-bit pin will always there connected with ALU and in
most-off times all the operations carried by different instructions will be stored in the
accumulator after operation performance.
(h.)

(i.) The difference between a latch and a flip-flop is that a latch is level-triggered (outputs can
change as soon as the inputs changes) and Flip-Flop is edge-triggered (only changes state
when a control signal goes from high to low or low to high).
Flip-flops Latch

It uses an edge-triggered approach. It is a level-triggered approach.

Flip-flops are classified as synchronous

No such classification of Latch.
and asynchronous.
Flip-flops have a clock signal. Does not have a clock signal.

Flip-flops are built up from a latch. They are built up from gates.

The operating speed is slow. The operating speed is high.

Flip-flops require power more than a
Required less power.
latch.
It covers more area. Less area required.
(j.) 256 x 4 bits is the capacity of a chip. So, to get 4 KB = 4 * 210 * 8 bits needed.
Number of memory chips required= Size of Memory / Size of each memory chip
= (4 * 210 * 8)/ (28 * 4)= 32
 Section-B
2.

The op-code fetch timing diagram can be explained as below:

The MP places the 16-bit memory address from the program counter on address bus. At time
period T1, the higher order memory address is placed on the address lines A15 – A8. When
ALE is high, the lower address is placed on the bus AD7 – AD0. The status signal IO/M(bar)
goes low indicating the memory operation and two status signals S1 = 1, S0 = 1 to indicate
op-code fetch operation.
At time period T2, the MP sends RD(bar) control line to enable the memory read. When
memory is enabled with RD(bar) signal, the op-code value from the addressed memory
location is placed on the data bus with ALE low.
The op-code value is reached at processor register during T3 time period. When data (op-code
value) is arrived, the RD(bar) signal goes high. It causes the bus to go into high impedance
state.
The op-code byte is placed in instruction decoder of MP and the op-code is decoded and
executed. This happens during time period T4.
OR
Memory Read Timing diagram
 Memory Write Timing diagram

3. The sequence of operation of Instruction flow for general-purpose microprocessors is given

below:

• The 2 byte content of the PC (program counter) is transferred to a special register–

called memory address register (MAR) or simply address register (AR) at the beginning
of the fetch cycle.
• Since the content of MAR is an address, it is thus sent to memory via the address bus.
• The content of the addressed memory is then read under the ‘Read control’ generated
by the Timing and control unit section of the microprocessor.
• This is then sent via the data bus to the memory data register (MDR) or the data register
(DR) existing in the CPU. This is placed in the instruction register.
• (IR) and is decoded by the instruction decoder and subsequently executed.
• The PC is then incremented if the subsequent memory location is to be accessed.
The sequence of operation of Data flow for general-purpose microprocessors is given below:
• The data source can be a memory device or an input device. Data will be loaded into
the accumulator via input Data Bus (DB).
• Data from the accumulator is then manipulated in ALU (Arithmetic and logic unit)
under the control of the (Timing and control) unit.
• The manipulated data is then put back in the accumulator and can be sent to memory
or output devices through the output Data Bus.
OR
4. The data bus and the low order address bus on the 8085 microprocessor are multiplexed with
each other. This allows 8 pins to be used where 16 would normally be required. The hardware
interface is required to demultiplex the bus by latching the low order address in the first T cycle,
on the falling edge of ALE.
The address bus is multiplexed in 8085. The multiplexing is done with the help of ALE signal.
ALE stands for address latch enable. When ALE is High (Logic 1) : Upper address lines (line
15-8) and Lower address lines (line 7-0) combinely holds the 16 bits of the address. When ALE
is Low (Logic 0) : Upper address lines (line 15-8) holds the upper 8 bit address & Lower address
lines (line 7-0) holds the "8 bit DATA"
Multiplexing is used to reduce the number of pins of 8085, which otherwise would have been
a 48 pin chip. But because of multiplexing, external hardware is required to demultiplex the
lower byte address cum data bus.
The Pin no= 30 of 8085 is the ALE pin which stands for ‘Address Latch Enable’. ALE signal
is used to demultiplex the lower order address bus (AD0 – AD7).
Pins 12 to 19 of 8085 are AD0 – AD7 which is the multiplexed address-data bus. Multiplexing
is done to reduce the number of pins of 8085.
Lower byte of address (A0 – A7) are available from AD0 – AD7 (pins 12 to 19) during T1 of
machine cycle. But the lower byte of address (A0 – A7), along with the upper byte A8 – A15
(pins 21 to 28) must be available during T2 and rest of the machine cycle to access memory
location or I/O ports.
Now ALE signal goes high at the beginning of T1 of each machine cycle and goes low at the
end of T1 and remains low during the rest of the machine cycle. This high to low transition of
ALE signal at the end of T1 is used to latch the lower order address byte (A0 – A7) by the latch
IC 74LS373, so that the lower byte A0 – A7 is continued to be available till the end of the
machine cycle. The situation is explained in the following figure:

OR
Vector Interrupts in 8085
1. TRAP :
– It is a non-maskable, edge and level-triggered interrupt.
– It is unaffected by any mask or interrupt enable.
– The TRAP signal must make a LOW to HIGH transition and remain HIGH until
acknowledge. This avoids false triggering due to noise or glitches.
– It has the highest priority among all interrupts.
– This interrupt transfers the microprocessor’s control to location 0024H.
– Application: It is used for emergency purposes like power failure, parity error checker,
smoke detector, etc.
2. RST 7.5 :
– It is a maskable, edge-triggered interrupt request input line. This interrupt is triggered
at the rising edge of the signal.
– It has the highest priority among all maskable interrupts and the second priority among
all interrupts.
– The interrupt vector location for this interrupt is 003CH.
3. RST 6.5 and RST 5.5 :
– These are level-triggered, maskable interrupt request input lines.
– RST 6.5 transfer the microprocessor’s control to location 0034H while RST 5.5 transfer
the microprocessor’s control to location 002CH.
4. INTR :
– It is a level triggered, maskable interrupt request input line.
– This interrupt works in conjunction with RST N or CALL instruction.
– The INTR logic consists of an INTE flip-flop, OR gate, and inverter. The INTR pin is
logically ANDed with the output of the INTE flip-flop.
Interrupt Vector Location
5.
 OR
Generation of Control Signals of 8085
In any system, there are different modes of operations. Likewise, in some situation we are interested to
read data in microprocessor, in other we are interested to write data on some location from
microprocessor. Whenever, we are dealing with different peripherals using 8085 microprocessor there
are two modes of operations. One is to read data from any of the memory device or input device. Second
is to write data on some location, this location can be any of the output device location or any of the
memory location. To deal with these modes 8085 microprocessor architecture gives three different
control signals. Namely IO/M,RD and WR. The IO/M is an output pin of the 8085 microprocessor
which serves dual purpose, the high going pulse on this pin indicates the I/O type of operation. We can
state that, at this time 8085 is working with the input or output devices. The low going pulse on this pin
indicates the memory operation. The second one is the RD stand for read signal. This is active low
signal, indicates the memory or I/O type of read operation and the selected memory or I/O device is to
be read. And the third is WR stands for write signal. This is also active low signal, indicates the memory
or I/O type of write operation and data available on the Data bus is to be written in to the selected
memory or I/O location, data is set up at the trailing edge of the pin. To deal with different I/O as well
as memory device individually, we have to generate four individual control signals. This control signals
used to select any of the I/O or memory device, with a specific type of operation either of read or write.
In our case, we are interested with two operation with memory as well as output devices. First of all,
we required to fetch the instructions place inside the memory and next we write data word on output
port. According to our need we have develop the logic to generate control signals. The figure describe
the combination logic of signal generation.

6.
 OR

7. 8085 pin diagram:

The 8085 is an 8-bit general purpose microprocessor capable of addressing 64 k of

memory. This device has 40 pins requires a +5 V power supply and can operate with a 3 MHz
single phase clock. The above figure shows the logic pin-out of the 8085 microprocessor.
All the signals are classified into 7 groups:
– Address bus
– Data bus
– Control & status signals
 – Power supply and frequency signals
– Externally initiated signals
– Serial I/O signals
– Interrupt signals
1. Address Bus: The 8085 has 8 signal lines from A8 – A15 which are unidirectional and
used as higher order address bus.
2. Multiplexed Address & Data bus: The signal lines from AD7 – AD0 are bidirectional,
they serve for a dual purpose. They are used as the lower order address bus as well as
the data bus.
3. Control and Status signals: This group of signals includes two control signals 𝑅𝐷 and
𝑊𝑅, three status signal IO/𝑀, S1 and S0. To identify the nature of operation one special
signal ALE is used to indicate the beginning of the program.
– 𝑅𝐷 (Read): This is a read control signal (active low). This signal indicates that the
selected IO or memory device is to be read and are available on the data bus.
– 𝑊𝑅(write): This is a write control signal (active low). This signal indicates that the data
on the data bus are to be written into a selected memory of IO location.
– IO/𝑀, S1 and S0: This is a status signal used to differentiate between IO and memory
operations. When it is high it indicates an IO operation, when it is low it indicates a
memory operation. This signal is combined with read and write to generate IO and
memory control signals. S1 and S0 indicate the type of machine cycle in progress.
– ALE(Address Latch Enable): It is an output signal used to give information of AD0-
AD7 contents. This is a positive going pulse generated any time the 8085 begins its
operation. When pulse goes high it indicates that AD0-AD7 lines are address. When it
is low it indicates that the contents are data. This signal is used primarily to latch the
lower order address from the multiplexed bus and generate a separate set of 8-bit
address lines.
4. Power supply and clock frequency:
– Vcc: +5 V DC power supply
– Vss: Ground reference
– X1, X2: A crystal is connected at these two pins having frequency of 6 MHz. The
– frequency is internally divided by 2.
– CLK Out: Clock output signal can be used as the system clock for the other devices.
5. Externally initiated signals:
– RESET IN: When the signal on this pin is low, the PC is set to 0, the buses are tristated
and the processor is reset.
– RESET OUT: This signal indicates that the processor is being reset. The signal can
– be used to reset other devices.
– READY: When this signal is low, the processor waits for an integral number of clock
– cycles until it goes high.
– HOLD: This signal indicates that a peripheral like DMA (direct memory access)
– controller is requesting the use of address and data bus.
– HLDA: This signal acknowledges the HOLD request.
6. Serial I/O signals: The 8085 has two signals to implement the serial transmission.
– SID (Serial Input Data): This input signal is used to accept serial data bit by bit from
– the external device by using RIM instruction.
– SOD (Serial Output Data): This is an output signal which enable the transmission of
– serial data bit by bit to the external device by using SIM instruction.
7. Interrupt signals: The 8085 has 5 interrupt signals: INTA, RST 7.5, RST 6.5, RST 5.5
OR
ALE is used for provide control signal to synchronize the components of microprocessor and
timing for instruction to perform the operation
Status Signals: S0, S1, IO/M’
IO/M (Active low) is used to indicate whether the operation belongs to the memory or
peripherals.