A REPORT ON

SUMMER INTERNSHIP

Name of the Student:

Name of the College: )

Registration Number:

Period of Internship:

Year: III B.Tech

Name and Address of the Intern Organization:

Organization: ASCENTSEMI R&D PVT.LTD R & D Pvt. Ltd.
Indiqube Omega, Brookfield,
Bengaluru,
Karnataka-560066.

1
 An Internship Report
on
VLSI DESIGN USING VHDL

Submitted in partial fulfilment of the requirements for the award of the degree of

Bachelor of Technology
In

Electronics and Communication Engineering

By

Under the Faculty Guidance of

Dr. Arun Kumar Saurabh

Associate Professor

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VIGNAN’S INSTITUTE OF INFORMATION TECHNOLOGY (A)

DUVVADA, VISAKHAPATNAM JUNE, 2023

Vignan’s Institute of Information Technology (A)

2
 Department of Electronics and Communication Engineering

Student Declaration

I,

Department of Electronics and Communication Engineering

CERTIFICATE

3
-------------------------------------- --------------------------------------
Faculty Supervisor Dept. Internship coordinator

Name: Mrs. M. Karuna Name: Mrs. M. Karuna.

-------------------------------------- --------------------------------------
Head of the Department Head, Internships
Name: Dr. B. Prasada Rao Name: Dr. Bode Prasad
ABSTRACT

This internship report summarizes the experiences and learning outcomes of the internship at
ASCENTSEMI R&D Pvt.Ltd Industries, focusing on VLSI designing. Throughout the
internship, I have gained knowledge and practical skills in the design flow of ASIC and
FPGA, CMOS fundamentals, and Verilog programming. The report highlights the application
of these skills in the development of a 4KB SRAM.
This internship involved a comprehensive understanding of the design flow for ASIC and
FPGA, encompassing various stages from requirements specification to physical verification.
I also acquired a solid foundation in CMOS fundamentals, including transistor-level design
and optimization techniques for digital logic circuits. Verilog programming played a
significant role in this internship, enabling me to write RTL code, simulate designs, and
verify circuit functionality.
As part of the internship project, I have successfully designed a 4KB SRAM, adhering to
specific design specifications. The project followed the standard VLSI methodology,
incorporating steps such as requirements specification, architecture design, RTL coding,
functional verification, synthesis, place and route, layout verification, and post-layout
simulation.
This internship at ASCENTSEMI R&D Pvt.Ltd Industries provided me with valuable
industry experience, enhancing my knowledge and skills in VLSI designing. The practical
application of the learned concepts in the development of a 4KB SRAM further solidified his
understanding of the subject matter

4
 Acknowledgments

My heartful thanks to our internship mentor Mrs. M. Karuna, who took the responsibility to
monitor all my daily attendance and Weekly report patiently.

My heartful thanks Mr. Venkata Krishna Adari, Internship in charge, CEO at

ASCENTSEMI R&D PVT.LTD R & D Pvt.Ltd., who guided me by taking class and let me
carefully visit the practical sessions.

My heartful thanks to Dr. Arun Kumar Saurabh, Associate Professor Department

Internship Coordinator, Vignan’s Institute of Information Technology who helped me in
every aspect of gathering information about the internship and guided me every day the on
proper submission of reports.

My best regards to Dr. B. Prasad Rao, Associate Professor, Head of the Department
Electronics and Communication Engineering department, for providing me with all the
Information and advising me about different companies and analyzing them in the better way.

My special thanks to our Principal Dr. J. Sudhakar, Professor for following me to

participate in the summer internship program on behalf of our college to gain industrial
knowledge and experience.

5
 Contents
S.No CONTENT NAME Page. No
1. CHAPTER 1: EXECUTIVE SUMMARY 8-10
1.1 Introduction
1.2 Learning Objectives
1.3 Outcomes Achieved
1.4 Brief Description of the Business and Intern
Organization
1.5 Summary of Internship Activities
2. CHAPTER 2: OVERVIEW OF THE 11-12
ORGANIZATION
2.1 Introduction of the Organization
2.2 Vision, Mission, and Values of the
Organization
2.3 Policy of the Organization in relation to the
intern role
2.4 Organizational Structure
2.5 Roles and Responsibilities
2.6 Future Plans of the Organization

3. CHAPTER 3: INTERNSHIP PART 13-28

3.1 Description
3.2 Activity Log Table-1
3.3 Weekly Report
3.4 Activity Log Table-2
3.5 Weekly Report
3.6 Activity Log Table-3
3.7 Weekly Report
3.8 Activity Log Table-4
3.9 Weekly Report

4. CHAPTER 4: OUTCOMES DESCRIPTION 29-30

6
 5. SKILLS 31-37
9. Internship Completion Certificate, Photos and 38-39
Video Links

CHAPTER 1: EXECUTIVE SUMMARY

Introduction

The internship at ASCENTSEMI R&D Pvt.. Ltd provided a valuable opportunity for Me to
delve into various aspects of VLSI designing, specifically focusing on the design flow of
ASIC and FPGA, CMOS fundamentals, and Verilog programming. This section aims to
elaborate on the learning objectives,and outcomes achieved, provide a brief description of
the business and intern organization, and summarize all the activities performed during the
internship.

Learning Objectives

• Understanding the design flow of ASIC and FPGA: The internship aimed to provide
Me with a comprehensive understanding of the design flow involved in developing
Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays
(FPGA). This involved learning the different stages, from requirements specification
to physical verification, and gaining insight into transforming high-level specifications
into physical circuit layouts.

• Gaining knowledge of CMOS fundamentals: My objective was to acquire a strong

foundation in CMOS fundamentals, including transistor-level design and optimization
techniques for digital logic circuits. This involved understanding the operation of
MOS transistors, their characteristics, and their applications in VLSI design.

• Acquiring proficiency in Verilog programming: Verilog programming played a

crucial role in the internship, as it is a widely used hardware description language for
designing digital systems. I have aimed to become proficient in writing RTL code,
simulating designs, and verifying circuit functionality using Verilog.

• Applying the acquired skills to design a 4KB SRAM: The ultimate goal of the
internship was to apply the learned skills and knowledge to successfully design and
implement a 4KB Static Random-Access Memory (SRAM). This project would serve

7
 as a practical application of the theoretical concepts and provide hands-on experience
in VLSI designing.
Outcomes Achieved

Throughout the internship, I have successfully achieved the following outcomes:

• Developed a deep understanding of the design flow of ASIC and FPGA, including
requirements specification, architectural design, RTL coding, synthesis, simulation,
place and route, and physical verification.

• Gained comprehensive knowledge of CMOS fundamentals, including the operation of

MOS transistors, circuit sizing, and power consumption optimization techniques.

• Became proficient in Verilog programming, enabling the creation of RTL code,

simulation of digital circuits, and verification of functionality.

• Applied the acquired skills and knowledge to design and implement a functional 4KB

SRAM, meeting the specified design requirements. Brief Description of the

Business and Intern Organization

ASCENTSEMI R&D Pvt. Ltd is a leading semiconductor company specializing in VLSI

design and manufacturing. The organization is renowned for its advanced technologies and
innovative solutions in the field of integrated circuits. During the internship, I had the
opportunity to work within the VLSI Designing department, which focuses on developing
cutting-edge designs and solutions for ASIC and FPGA applications.

Summary of Internship Activities

Throughout the internship, I have engaged in various activities, including but not limited to:

• Participating in training sessions on the design flow of ASIC and FPGA, CMOS
fundamentals, and Verilog programming.

• Collaborating with experienced professionals to gain hands-on experience in

designing digital circuits.

• Undertaking individual study and research to enhance knowledge and understanding

in VLSI designing.
• Designing and implementing a 4KB SRAM, following the standard VLSI
methodology and design flow.
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 • Conducting functional verification and simulation to ensure the correctness and
functionality of the SRAM design.

• Engaging in post-layout simulation and layout verification to validate the physical

design of the SRAM.

These activities collectively provided Me with practical experience and knowledge in VLSI
designing, enabling me to achieve the intended learning objectives and successfully complete
the internship at ASCENTSEMI R&D Pvt. Ltd.

9
 CHAPTER 2: OVERVIEW OF THE ORGANIZATION

Introduction of the Organization

ASCENTSEMI R&D Pvt.Ltd is a prominent semiconductor company specializing in VLSI
design and manufacturing. It has gained recognition for its cutting-edge technologies and
innovative solutions in the field of integrated circuits. The organization is committed to
pushing the boundaries of technology and delivering high-quality products to its clients.
ASCENTSEMI R&D Pvt.Ltd prides itself on its strong expertise in VLSI designing and its
contributions to the advancement of the semiconductor industry.

Vision, Mission, and Values of the Organization

The vision of ASCENTSEMI R&D Pvt.Ltd is to be a global leader in the semiconductor
industry, driving technological advancements and providing exceptional solutions to its
clients. The organization's mission revolves around delivering innovative and reliable
semiconductor products that meet the evolving needs of the market. ASCENTSEMI R&D
Pvt.Ltd upholds values such as integrity, excellence, customer satisfaction, and continuous
improvement in all aspects of its operations.

Policy of the Organization in relation to the intern role

ASCENTSEMI R&D Pvt.Ltd values the role of interns and recognizes their potential
contribution to the organization. The policy regarding interns is to provide them with a
conducive learning environment where they can acquire practical experience and enhance
their skills. The organization encourages open communication, teamwork, and knowledge
sharing to facilitate the growth and development of interns. Interns are given opportunities to
engage in meaningful projects, gain hands-on experience, and contribute to the organization's
goals.

Organizational Structure
ASCENTSEMI R&D Pvt.Ltd follows a hierarchical organizational structure, enabling
efficient coordination and effective management of its operations. The structure includes
various departments, such as research and development, design, manufacturing, quality
assurance, marketing, and sales. Each department is led by a dedicated team of experienced

10
professionals who oversee the respective functions and ensure smooth workflow and
collaboration across the organization.

Roles and Responsibilities

Roles and Responsibilities of the Employees in which the intern is placed Within the
department of VLSI Designing, where the intern is placed, employees hold various roles and
responsibilities. Senior engineers and designers provide guidance, mentorship, and technical
expertise to the interns. They oversee the interns' progress, assign tasks, and provide
necessary training and support. The employees in this department are responsible for
designing and developing ASIC and FPGA solutions, conducting simulations and
verifications, optimizing circuit performance, and contributing to the overall success of
projects.

Performance of the Organization

Performance of the Organization in terms of turnover, profits, market reach, and market
value: ASCENTSEMI R&D Pvt.Ltd has achieved remarkable performance in the
semiconductor industry. The organization has consistently displayed significant growth in
terms of turnover, profits, and market reach. Its ability to deliver high-quality semiconductor
products and solutions has garnered a strong reputation among clients and stakeholders. As a
result, ASCENTSEMI R&D Pvt.Ltd has witnessed substantial market value appreciation and
has become a trusted partner for various companies operating in different sectors.
Future Plans of the Organization
ASCENTSEMI R&D Pvt.Ltd has ambitious future plans to further establish its position as a
global leader in the semiconductor industry. The organization aims to continue investing in
research and development to drive innovation and stay ahead of emerging technologies. It
seeks to expand its market presence by exploring new markets and building strategic
partnerships. Additionally, ASCENTSEMI R&D Pvt.Ltd plans to further enhance its
production capabilities, optimize operational efficiency, and diversify its product portfolio to
cater to evolving customer demands and market trends.

11
 CHAPTER 3: INTERNSHIP PART

Description of Activities/Responsibilities in the Intern Organization during Internship

Working Conditions
The working conditions at ASCENTSEMI R&D Pvt.Ltd during the internship were
professional and conducive to learning. The intern was provided with a well-equipped
workstation, access to necessary software tools, and a supportive work environment.
The organization emphasized a collaborative culture that encouraged open
communication and knowledge sharing among team members.

Weekly Work Schedule

The intern followed a structured weekly work schedule, which typically consisted of
40 hours per week. The schedule was coordinated with the team leader and aligned
with the ongoing projects and assignments. The intern had the opportunity to
collaborate with experienced professionals, participate in team meetings, and engage in
individual research and study.

Equipment Used
ASCENTSEMI R&D Pvt.Ltd provided the intern with access to state-of-the-art
equipment and software tools required for VLSI designing. This included computer
workstations equipped with industry-standard software tools such as EDA (Electronic
Design Automation) software, simulators, synthesis tools, and layout design tools. The
intern utilized these tools to design, simulate, and verify digital circuits.

Tasks Performed
During the internship, the intern undertook various tasks and responsibilities, including but
not limited to:
1. Learning Sessions: Participated in training sessions conducted by experienced
professionals to acquire knowledge in ASIC and FPGA design flow, CMOS
fundamentals, and Verilog programming.

12
 2. Research and Study: Engaged in individual research and study to deepen
understanding of VLSI design principles, explore new techniques, and stay
updated with industry trends.
3. Designing a 4KB SRAM: Utilizing the acquired knowledge and skills, the
intern designed and implemented a 4KB SRAM, following the standard VLSI
design flow. This involved stages such as requirements specification,
architecture design, RTL coding, functional verification, synthesis, place and
route, layout verification, and post-layout simulation.
4. Simulation and Verification: Conducted simulations using Verilog-based
software tools to ensure the correctness and functionality of the designed
circuits. The intern performed functional verification to validate the SRAM
design against the specified requirements.
5. Collaboration and Teamwork: Collaborated with experienced engineers and
designers within the VLSI Designing department. Engaged in discussions,
shared ideas, and received guidance to enhance skills and effectively contribute
to the projects.

Skills Acquired
Through the activities and responsibilities undertaken during the internship, the intern
acquired valuable skills in VLSI designing. These included:
1. Design Flow Knowledge: Gained a comprehensive understanding of the design
flow involved in ASIC and FPGA development, from requirements
specification to physical verification.
2. CMOS Fundamentals: Developed a strong foundation in CMOS fundamentals,
including transistor-level design, circuit sizing, and power optimization
techniques.
3. Verilog Programming: Became proficient in Verilog programming, enabling
the creation of RTL code, simulation of digital circuits, and verification of
functionality.
4. Circuit Design and Optimization: Acquired hands-on experience in designing
digital circuits, optimizing their performance, and verifying their correctness
through simulations.
5. Collaboration and Communication: Enhanced collaboration and teamwork
skills through interactions with experienced professionals, contributing to the
success of projects.

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 Overall, the internship at ASCENTSEMI R&D Pvt.Ltd provided the intern with
practical experience, refined technical skills, and a deeper understanding of VLSI
designing, equipping them for future endeavours in the field.

ACTIVITY LOG FOR WEEK-1

Person
Brief description of the daily
Day Date Learning Outcome InCharge
activity
Signature

Introduction to Internship: The • Introduction to

intern received an overview of Internship
the internship program, its • ASIC/FPGA Design
Day-1
objectives, and expectations. Flow
ASIC/FPGA Design Flow: • Review of
The intern learned about the Semiconductor
31-05-23 design flow of ASIC Physics
(Application-
Specific Integrated Circuit)
and FPGA (Field-
Programmable Gate Array).
Review of Semiconductor
Physics: The intern reviewed the
fundamentals of semiconductor
physics and its relevance to VLSI
design.

CMOS Inverter operation and its • CMOS Inverter

Characteristics: The intern operation and its
studied the operation and Characteristics
Day-2
characteristics of CMOS • CMOS Logic
inverters. Functions, tristate
CMOS Logic Functions, tristate buffers
01-06-23 buffers: The intern learned about • CMOS Latch
CMOS logic functions and operation, CMOS
tristate buffers. Flip Flop Operation
CMOS Latch operation, CMOS
Flip Flop Operation: The intern
delved into the operation of
CMOS latches and flip flops.

14
 • Introduction to
Introduction to Digital System Internship
Design, Number Systems: The
intern received an introduction to • ASIC/FPGA Design
Day-3 02-06-23 digital system design and Flow
different number systems used in
VLSI. • Review of

Optimization techniques: The Semiconductor

intern explored optimization Physics
techniques in VLSI design.
Gate level optimization: The
intern learned about gate level
optimization techniques to
improve circuit performance.

•
Logic Optimization using Logic Optimization
Karnaugh Maps: The intern using Karnaugh
gained knowledge about logic Maps
Day-4 •
optimization techniques using Basic Building
Karnaugh maps. Blocks -
Basic Building Blocks - Combinational logic
05-06-23 Combinational logic circuits: The circuits
intern studied the basics of •
Basic Building
combinational logic circuits and Blocks -
their implementation. Combinational logic
Basic Building Blocks - circuits
Combinational logic circuits - II:
The intern further explored the
concepts of combinational logic
circuits and their design.

15
 •
Evolution of Latches and timing Evolution of Latches
diagrams - I: The intern learned and timing diagrams
about the evolution of latches
Day-5
and timing diagrams. •
Timing Diagrams of Latches and Timing Diagrams of
Flip Flops - 1: The intern delved Latches and Flip
06-06-23 into the timing diagrams of Flops
•
latches and flip flops. Timing Parameters
Timing Parameters of Flip of Flip Flops
Flops: The intern studied the
timing parameters associated
with flip flops
Day-6 07-06-23 Static Timing Analysis: The •
intern gained insights into static Static Timing
timing analysis techniques. Analysis
•
Finite State Machines: The Finite State
intern learned about finite state Machines
machines and their
implementation

WEEKLY REPORT WEEK – 1 (From Date: 31-05-23 to Date: 07-06-23)

Objective of the Activity Done:

The objective of Week 1 activities was to provide the intern with a comprehensive
introduction to VLSI design, including an understanding of the design flow, semiconductor
physics, CMOS logic, digital system design, optimization techniques, basic building blocks,
timing analysis, and finite state machines. The goal was to equip the intern with fundamental
knowledge and skills necessary for VLSI design.

Detailed Report:
Day 1 - 31-05-2023: Objective: Introduction to Internship

• The day started with an overview of the internship program, its objectives, and
expectations. The intern gained an understanding of the scope of the internship and the
skills they are expected to develop.

• Objective: ASIC/FPGA Design Flow

• The intern received a detailed explanation of the design flow for both ASIC
(Application-Specific Integrated Circuit) and FPGA (Field-Programmable Gate

16
 Array). The intern learned about the different stages involved in the design process,
from specification to fabrication.

Day 2 - 01-06-2023: Objective: CMOS Inverter operation and its Characteristics

• The intern delved into the operation and characteristics of CMOS inverters. They
learned about the principles behind the CMOS inverter and its use in digital circuits.

• Objective: CMOS Logic Functions, tristate buffers

• The intern explored CMOS logic functions and the concept of tristate buffers. They
learned how to implement logic functions using CMOS technology and understood
the role of tristate buffers in digital systems.

Day 3 - 02-06-2023: Objective: Introduction to Digital System Design, Number Systems

• The intern received an introduction to digital system design, emphasizing the

importance of number systems in representing and manipulating data in VLSI design.

• Objective: Optimization techniques

• The intern learned about various optimization techniques used in VLSI design. They
studied methods to reduce power consumption, improve speed, and minimize area
utilization.

• Objective: Gate-level optimization

• The intern explored gate-level optimization techniques to improve the performance

and efficiency of digital circuits. They learned how to minimize the gate count and
delay by optimizing the gate-level implementation.

Day 4 - 05-06-2023: Objective: Logic Optimization using Karnaugh Maps

• The intern gained knowledge about logic optimization techniques using Karnaugh
maps. They learned how to simplify Boolean expressions and minimize the number of
logic gates required for a given function.

• Objective: Basic Building Blocks - Combinational logic circuits - I

• The intern studied the basics of combinational logic circuits, including the design and
implementation of logic gates, multiplexers, and decoders. They gained an
understanding of how these building blocks are used in VLSI design.

• Objective: Basic Building Blocks - Combinational logic circuits - II

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 • The intern further explored the concepts of combinational logic circuits. They learned
about adders, subtractors, and arithmetic logic units (ALUs) and their role in digital
system design.

Day 5 - 06-06-2023: Objective: Evolution of Latches and timing diagrams - I

• The intern learned about the evolution of latches, starting from simple SR latches to
more complex flip flops. They understood the working principles of different types of
latches and their applications in sequential logic.

• Objective: Timing Diagrams of Latches and Flip Flops - 1

• The intern delved into timing diagrams and understood how to analyse the behaviour
of latches and flip flops based on input changes and clock signals.

• Objective: Timing Parameters of Flip Flops

• The intern studied the timing parameters associated with flip flops, such as setup time,
hold time, propagation delay, and recovery time

Day 7 - 07-06-2023:

• Static Timing Analysis - I: The intern delved into static timing analysis, understanding
its importance in digital circuit design and the various analysis techniques involved.

• Finite State Machines - I: The intern learned about finite state machines (FSMs) and
their applications in digital systems, focusing on the basics and principles of FSM
design.

• Finite State Machines - II: The intern continued their study of finite state machines,
exploring advanced concepts and design considerations for implementing FSMs in
digital circuits.

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 ACTIVITY LOG FOR WEEK-2

Day Date Brief description of the daily Learning Outcome Person

activity InCharge
Signature

Design of sequence Detectors - • Design of sequence

Mealy/Moore - I: The intern learned Detectors -
about the design principles and Mealy/Moore - I
Day-7 08-06-23
implementation of sequence • Design of sequence
detectors using both Mealy and Detectors -
Moore state machine models. Mealy/Moore - II
Design of sequence Detectors - • Design of Counters
Mealy/Moore - II: The intern
continued their exploration of
sequence detectors, focusing on
advanced design techniques and
their applications.
Design of Counters: The intern
studied the design and
implementation of counters,
including different types such as
binary counters, synchronous
counters, and asynchronous
counters.

19
 09-06-23 • Constants, Arrays,
Constants, Arrays, System tasks: System tasks
The intern learned about the usage • Operators &
of constants and arrays in Verilog Compiler directives
Day-8
HDL, as well as the role and • HDL LAB -
functionality of system tasks. Simple Test bench
Operators & Compiler directives: • Gate level
The intern explored the various Modeling, Data
operators available in Verilog HDL flow Modelling -
and gained an understanding of
compiler directives and their
significance in the design process.
HDL LAB - Simple Test bench: The
intern engaged in a hand

Day-9 13-06-23
Data Flow Modelling - II: The • Data Flow
intern continued their study of data Modelling - II
flow Modelling in Verilog, focusing • HDL LAB
on advanced concepts and
techniques.

HDL LAB: The intern participated

in a practical session in the HDL
lab, where they applied their
knowledge of data flow Modelling
and other related topics.

20
 •
Behavioural Modelling - Procedural Behavioural
Blocks: The intern learned about Modelling -
procedural blocks in Verilog, • Procedural Blocks
Day-10 14-06-23
including initial and always blocks. Behavioural
They understood the significance of Modelling -
grouping blocks using begin/end Procedural
and fork/join statements. Statements
Behavioural Modelling - Procedural
Statements: The intern explored
various procedural statements in
Verilog, including conditional
statements like if-else, nested if, and
case statements.
HDL LAB: The intern engaged in
practical exercises in the HDL lab,
applying their knowledge of
procedural blocks and statements

Behavioural Modelling - Looping • Behavioural

Constructs: The intern learned Modelling -
about looping constructs in Verilog, Looping Constructs
including for loop, while loop, • Behavioural
Day-11 15-06-23
repeat, and forever statements. Modelling -
Behavioural Modelling - Blocking Blocking and Non
and Non-Blocking: The intern Blocking
studied the differences between
blocking and non-blocking
assignments in Verilog and their
implications in simulation and
synthesis.
HDL LAB: The intern participated
in hands-on exercises in the HDL
lab, practicing the implementation of
looping constructs and
blocking/non-blocking assignments.

21
 Behavioural Modelling - Event • Behavioural
regions in Verilog: The intern Modelling - Event
learned about event regions in regions in Verilog
Verilog and their role in controlling •
Behavioural
Day-12 16-06-23 Modelling - Tasks
the execution of procedural blocks.
Behavioural Modelling - Tasks and and Functions - I
Functions - I: The intern explored
tasks and functions in Verilog,
understanding their usage and
differences.
HDL LAB: The intern continued
their practical work in the HDL lab,
gaining further experience with
event regions and implementing
tasks and functions.

WEEKLY REPORT
WEEK – 2 (From Date: 08-06-23 to Date: 16-06-23)

Objective of the Activity Done:

The objective of Week 2 activities was to provide the intern with in-depth knowledge and
practical experience in various aspects of VLSI design. The topics covered included
sequence detectors, counters, Verilog HDL, behavioural modelling, FSM (Finite State
Machines) design and verification, and HDL lab exercises

Detailed Report:

Day 8 - 08-06-2023:

22
 • Design of sequence Detectors - Mealy/Moore - I: The intern learned about the design
principles and implementation of sequence detectors using both Mealy and Moore
state machine models.
• Design of sequence Detectors - Mealy/Moore - II: The intern continued their
exploration of sequence detectors, focusing on advanced design techniques and their
applications.
• Design of Counters: The intern studied the design and implementation of counters,
including different types such as binary counters, synchronous counters, and
asynchronous counters.
Day 9 - 09-06-2023:
• Constants, Arrays, System tasks: The intern learned about the usage of constants and
arrays in Verilog HDL, as well as the role and functionality of system tasks.
• Operators & Compiler directives: The intern explored the various operators available
in Verilog HDL and gained an understanding of compiler directives and their
significance in the design process.
• HDL LAB - Simple Test bench: The intern engaged in a hands

Day 10 - 12-06-2023:
• Data Flow Modelling - II: The intern continued their study of data flow Modelling in
Verilog, focusing on advanced concepts and techniques.
• HDL LAB: The intern participated in a practical session in the HDL lab, where they
applied their knowledge of data flow Modelling and other related topics.
Day 11 - 13-06-2023:
• Behavioural Modelling - Procedural Blocks: The intern learned about procedural
blocks in Verilog, including initial and always blocks. They understood the
significance of grouping blocks using begin/end and fork/join statements.
• Behavioural Modelling - Procedural Statements: The intern explored various
procedural statements in Verilog, including conditional statements like ifelse, nested
if, and case statements.
• HDL LAB: The intern engaged in practical exercises in the HDL lab, applying their
knowledge of procedural blocks and statements.
Day 12 - 14-06-2023:
• Behavioural Modelling - Looping Constructs: The intern learned about looping
constructs in Verilog, including for loop, while loop, repeat, and forever statements.

23
 • Behavioural Modelling - Blocking and Non-Blocking: The intern studied the
differences between blocking and non-blocking assignments in Verilog and their
implications in simulation and synthesis.
• HDL LAB: The intern participated in hands-on exercises in the HDL lab, practicing
the implementation of looping constructs and blocking/nonblocking assignments.
Day 13 - 15-06-2023:
• Behavioural Modelling - Event regions in Verilog: The intern learned about event
regions in Verilog and their role in controlling the execution of procedural blocks.
• Behavioural Modelling - Tasks and Functions - I: The intern explored tasks and
functions in Verilog, understanding their usage and differences.
• HDL LAB: The intern continued their practical work in the HDL lab, gaining further
experience with event regions and implementing tasks and functions.

ACTIVITY LOG FOR WEEK-3

Day Date Brief description of the daily Learning Outcome Person

activity InCharge
Signature
The day started with the continuation
of the Behavioral Modelling - Tasks • Behavioural
and Functions - II topic. The Modelling - Tasks
participants engaged in hands-on and Functions - II
Day-13 19-06-23 practice in the HDL LAB session, • HDL LAB
applying the concepts learned.

24
 The focus of the day was on Styles
of Modelling FSM - Design and • Behavioural
Verification. The participants delved Modelling - Tasks
into the intricacies of FSM design and Functions - II
Day-14 20-06-23 and verification, exploring different • HDL LAB
Modelling techniques. The HDL
LAB session provided an
opportunity for practical
implementation and experimentation.

The day commenced with the

continuation of the Behavioral • Behavioural
Modelling - Tasks and Functions - II Modelling - Tasks
topic. Following that, participants and Functions - II
Day-15 21-06-23 engaged in another HDL LAB • HDL LAB
session, applying the concepts
learned to real-world scenarios.

During the session, participants • Introduction to

learned about the significance of Memories,
memories in storing and retrieving Importance of
data in electronic systems. Various memories in design
Day-16 22-06-23 types of memories, such as RAM • Introduction to
(Random Access Memory) and specification,
ROM (Read-Only Memory), were understanding
discussed, along with their specification
characteristics and applications. The
session also covered topics like
memory organization, address
decoding, and data storage
principles.

Day-17 23-06-23 Participants delved into the process • Developing the

of designing the FPGA architecture. architecture
The session covered the selection • Introduction to RTL
design, RTL coding
of FPGA components and their
integration into the overall system.
Key concepts like block diagram
design, component
interconnectivity, and system-level
considerations were explored

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 Participants engaged in a hands-on • LAB - Modelling
lab session where they applied the individual blocks
Day-18 24-06-23 concepts learned in the previous and verification
sessions.
They practiced RTL coding
techniques to model individual
blocks of the design. Verification
methodologies, including
simulation and functional testing,
were applied to validate the
functionality of the designed
blocks

WEEKLY REPORT WEEK – 3 (From Date: 19-06-20233 to Date: 24-06-2023)

Objective of the Activity Done:

The objective of Week 3 was to deepen the participants' understanding of Behavioural
Modeling, Tasks and Functions, and Styles of Modelling FSM in the context of design and
verification. The week aimed to provide participants with practical knowledge and hands-on
experience in HDL design and verification techniques.

Detailed Report:
Day 19 (19-06-2023):

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 • Activity: Behavioural Modelling - Tasks and Functions - II Description: Participants
learned advanced concepts and techniques related to tasks and functions in
behavioural modeling. They explored the practical applications of tasks and functions
in designing complex hardware systems.

• HDL LAB Description: Participants applied the learned concepts in a hands-on

laboratory session. They implemented tasks and functions in hardware description
languages and verified their functionality through simulation and testing.

Day 20 (20-06-2023):

• Activity: Styles of Modelling FSM - Design and Verification - I Description:

Participants delved into the various styles and methodologies for Modelling Finite
State Machines (FSMs). They learned about different design and verification
techniques employed in FSM-based systems.

• HDL LAB Description: In the laboratory session, participants practiced designing and
verifying FSMs using different Modelling styles. They gained practical experience in
implementing FSM-based systems and validating their behaviour.

Day 21 (21-06-2023):

• HDL LAB Description: Participants continued working on HDL LAB exercises

related to FSM Modelling and verification. They focused on refining their skills in
implementing and testing FSM-based designs.

Day 22 (22-06-2023):

• Activity: Behavioural Modelling - Tasks and Functions - II Description: Building

upon
the previous session, participants further explored advanced topics in tasks and
functions. They learned how to optimize and reuse code through efficient use of tasks
and functions.

• HDL LAB Description: Participants engaged in hands-on exercises to reinforce their

understanding of tasks and functions. They applied optimization techniques and
practiced code reuse using tasks and functions.

Day 23 (23-06-2023):

Developing the FPGA Architecture

• Participants delved into the process of designing the FPGA architecture.

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 • The session covered the selection of FPGA components and their integration into the
overall system.

• Key concepts like block diagram design, component interconnectivity, and

systemlevel considerations were explored Day 24(24-06-2023):

Lab - Modelling Individual Blocks and Verification

• The lab session continued with further practice in RTL coding and verification of
individual blocks.

• Participants refined their skills in designing and testing complex logic blocks using
RTL coding methodologies.

CHAPTER 4: OUTCOMES DESCRIPTION

During the internship, the work environment was characterized by positive people
interactions, well-maintained facilities, clear job roles, established protocols and procedures,
disciplined work practices, effective time management, harmonious relationships,
socialization, mutual support and teamwork, and a motivating atmosphere. Here is a detailed
description of the work environment:

1. People Interactions:

• The internship fostered a collaborative and inclusive work culture,

encouraging open communication and interaction among team members.

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 • Colleagues and supervisors were approachable, friendly, and willing to
provide guidance and support when needed.

• Regular team meetings and discussions promoted knowledge sharing and

collaboration among interns and mentors.

2. Facilities and Maintenance:

• The internship provided access to well-equipped workspaces, including

computers, software tools, and hardware resources necessary for the tasks.

• Facilities such as labs, meeting rooms, and workstations were properly

maintained, creating a conducive environment for learning and productivity.

3. Clarity of Job Roles:

• Job roles and responsibilities were clearly defined and communicated to each
intern.

• Interns were aware of their specific tasks and the expected outcomes, ensuring
clarity and focus in their work.

4. Protocols, Procedures, and Processes:

• The internship program had established protocols, procedures, and processes

in place to streamline work activities.

• Interns were provided with guidelines and standard operating procedures

(SOPs) to follow, ensuring consistency and efficiency in their work.
5. Discipline and Time Management:

• Emphasis was placed on discipline and punctuality in the work environment.

• Interns were expected to adhere to work schedules and meet deadlines for
assignments and projects.

• Time management skills were fostered, encouraging interns to prioritize tasks

and effectively manage their workload.

6. Harmonious Relationships and Teamwork:

• The work environment promoted harmonious relationships among interns,

mentors, and other team members.

• Collaboration and teamwork were encouraged through group projects,

discussions, and shared learning experiences.
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 • Regular team-building activities and social events provided opportunities for
building strong relationships and fostering a supportive work atmosphere.

7. Motivation:

• The internship program aimed to motivate interns by recognizing their

achievements and providing constructive feedback.

• Mentors and supervisors offered encouragement and guidance, fostering a

positive and motivating work environment.

• Interns were given opportunities to showcase their skills and contribute to

meaningful projects, enhancing their motivation and sense of accomplishment.

8. Space and Ventilation:

• The workspace provided sufficient physical space for interns to work

comfortably and efficiently.

• Adequate ventilation and a comfortable temperature were maintained,

ensuring a pleasant and conducive work environment.

Overall, the internship work environment demonstrated a balance between professionalism

and a supportive atmosphere, enabling interns to thrive, learn, and contribute effectively to
the organization's objectives.

TECHNICAL SKILLS
The above internship offers various opportunities for interns to develop and enhance their
technical skills. Here are some of the technical skills that one can acquire from the internship:
1. Verilog/VHDL Programming: Interns get hands-on experience with hardware
description languages (HDLs) such as Verilog or VHDL. They learn to write code for
digital design, develop modules, and simulate the functionality of digital circuits.
2. FPGA Design: The internship provides exposure to FPGA (Field-Programmable Gate
Array) design. Interns learn to implement digital circuits on FPGA platforms,
including configuring RTL (Register Transfer Level) code and generating bit streams.
3. Digital Circuit Design: Interns gain proficiency in designing digital circuits using
sequential and combinational logic. They learn to develop architectures, design FSMs
(Finite State Machines), and implement various digital components.

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 4. RTL Coding Guidelines: The internship covers guidelines and best practices for
writing RTL code. Interns learn about coding styles, naming conventions, module
organization, and other considerations to ensure efficient and maintainable RTL
designs.
5. Memory Design: The internship includes an introduction to memories, allowing
interns to understand the fundamentals of memory design. They learn about different
types of memories, their organization, and design considerations.
6. Verification Techniques: Interns get exposure to verification methodologies and
techniques. They learn about test benches, writing test cases, and simulating digital
designs to ensure functional correctness.
7. FPGA Implementation Flow: Interns gain knowledge about the FPGA implementation
flow, including the steps involved in configuring RTL code with FPGAs, generating
bit streams, and deploying designs on FPGA devices.
8. Hardware Testing and Debugging: The internship provides opportunities for interns to
learn hardware testing and debugging techniques. They gain hands-on experience in
identifying and resolving issues in digital circuits and FPGA designs.
9. Documentation and Reporting: Interns develop skills in documenting their work and
preparing technical reports. They learn to effectively communicate their design
choices, implementation details, and test results.
10. Project Management: The internship may involve working on projects, allowing
interns to develop project management skills. They learn to plan tasks, set milestones,
manage resources, and track progress to ensure timely project completion.
These technical skills acquired during the internship provide a solid foundation for pursuing a
career in digital design, FPGA development, or related fields..
MANAGERIAL SKILLS
While the above internship primarily focuses on technical skills, interns can also develop and
refine various managerial skills that are valuable in a professional work environment. Here
are some managerial skills that one can acquire from the internship:
1. Time Management: Interns learn to manage their time effectively to meet project
deadlines and deliverables. They acquire skills in prioritizing tasks, setting realistic
timelines, and allocating time efficiently to different project activities.
2. Task Planning and Organization: The internship provides opportunities for interns to
plan and organize their tasks effectively. They learn to break down projects into
smaller tasks, create action plans, and track progress to ensure smooth execution.

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 3. Communication Skills: Interns develop strong communication skills through
interactions with mentors, team members, and stakeholders. They learn to effectively
convey ideas, ask questions, and actively participate in discussions and meetings.
4. Collaboration and Teamwork: The internship fosters a collaborative work
environment where interns work alongside other team members. They learn to
contribute effectively as part of a team, share responsibilities, and collaborate on
project tasks.
5. Problem Solving and Decision Making: Interns gain experience in problem-solving
and decision-making processes. They learn to analyse issues, identify potential
solutions, and make informed decisions based on available information and project
requirements.
6. Adaptability and Flexibility: The internship exposes interns to different projects, tasks,
and challenges. They learn to adapt to changing requirements, adjust their approach as
needed, and remain flexible in their work style.
7. Attention to Detail: Interns develop a keen eye for detail, particularly in areas such as
code review, verification, and documentation. They learn to identify potential errors,
inconsistencies, or improvements in their work and pay attention to the quality of their
deliverables.
8. Leadership Skills: While interns may not hold formal leadership roles, the internship
provides opportunities to demonstrate leadership qualities. They learn to take
initiative, guide others, and assume responsibility for their tasks.
9. Professionalism and Work Ethic: Interns learn the importance of professionalism and
work ethic in a professional setting. They understand the significance of punctuality,
meeting commitments, maintaining confidentiality, and displaying a positive attitude
towards work.
10. Self-Motivation and Initiative: The internship encourages interns to be self-motivated
and proactive in their learning and contribution. They learn to take initiative, seek
opportunities to learn and grow, and go beyond assigned tasks to make meaningful
contributions to projects.
These managerial skills, combined with the technical skills gained during the internship,
contribute to the overall professional development of interns. They enhance interns'
employability and prepare them for future managerial roles in their careers
COMMUNICATIONAL SKILLS
Improving communication skills during an internship requires active effort and engagement.
Here are some ways interns can enhance their communication skills:

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1. Active Listening: Practice active listening during meetings, discussions, and
interactions with colleagues. Pay attention to what others are saying, ask clarifying
questions, and show genuine interest in their perspectives.
2. Clear and Concise Expression: Strive to communicate ideas and thoughts clearly and
concisely. Use simple and effective language, organize thoughts logically, and avoid
unnecessary jargon or technical terms when communicating with different
stakeholders.
3. Written Communication: Take advantage of opportunities to improve written
communication skills. Write clear and professional emails, project reports, and
documentation. Pay attention to grammar, punctuation, and formatting to ensure
clarity and professionalism.
4. Presentation Skills: When presenting ideas or project updates, work on developing
effective presentation skills. Practice delivering presentations with confidence, using
visuals, and engaging the audience. Seek feedback to improve your presentation style
and content.
5. Collaborative Communication: Actively engage in collaborative discussions and
brainstorming sessions. Respectfully contribute your ideas, actively listen to others,
and provide constructive feedback. Collaborative communication helps in building
effective relationships with team members and fosters a positive work environment.
6. Non-Verbal Communication: Pay attention to non-verbal cues, such as body language,
tone of voice, and facial expressions. Be mindful of your own non-verbal
communication and interpret and respond appropriately to others' non-verbal cues.
7. Feedback and Reflection: Seek feedback from mentors and colleagues regarding your
communication skills. Actively reflect on their suggestions and work on areas that
need improvement. Regular feedback helps in identifying strengths and weaknesses
and guides your growth in effective communication.
8. Cross-Cultural Communication: In a diverse work environment, practice cross-
cultural communication by being sensitive to cultural differences. Respect different
perspectives, adapt your communication style, and strive for inclusivity in your
interactions.
9. Conflict Resolution: Develop skills in resolving conflicts and handling difficult
conversations. Practice active listening, empathy, and finding mutually beneficial
solutions during conflicts or disagreements.

10. Networking and Relationship Building: Use networking opportunities during the
internship to build professional relationships. Engage in conversations with
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 colleagues, attend company events, and participate in team-building activities.
Networking helps in honing communication skills and expanding professional
connections.
Remember, improving communication skills is an ongoing process. Actively seek
opportunities to practice and receive feedback, and continue to refine your skills beyond the
internship to ensure effective communication in future professional settings

Describe how you could enhance your abilities in group discussions,

participation in teams, contribution as a team member, and leading a
team/activity.
Enhancing abilities in group discussions, team participation, contribution as a team member,
and leading a team/activity during an internship can be valuable for personal and
professional growth. Here are some ways to develop these skills:

1. Active Participation: Actively engage in group discussions by contributing ideas,

asking relevant questions, and providing constructive feedback. Show enthusiasm
and interest in the topics being discussed.

2. Effective Communication: Communicate clearly and concisely in group discussions.

Practice expressing your thoughts and ideas in a structured manner. Be mindful of
your body language, tone of voice, and non-verbal cues to convey your messages
effectively.

3. Respectful Collaboration: Foster a collaborative and inclusive environment within

the team. Respect the opinions and contributions of others, even if you disagree.
Encourage open dialogue and create a safe space where everyone feels comfortable
sharing their thoughts.

4. Active Listening: Develop active listening skills to understand and appreciate

different perspectives. Pay attention to what others are saying, maintain eye contact,
and avoid interrupting. Paraphrase and summarize key points to demonstrate your
understanding.

5. Flexibility and Adaptability: Embrace flexibility and adaptability when working in

teams. Be open to new ideas, be willing to compromise, and adapt your approach
based on the needs of the team and the project.

6. Task and Time Management: Effectively manage your tasks and deadlines within the
team. Prioritize assignments, set realistic goals, and meet established timelines. Take
responsibility for your deliverables and communicate proactively if you encounter
any challenges.
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 7. Proactive Contribution: Take initiative in offering assistance and support to team
members. Volunteer for additional responsibilities, offer your expertise and be
proactive in identifying and addressing gaps or inefficiencies within the team's
processes.

8. Leadership Opportunities: Seize opportunities to take on leadership roles or lead

team activities within the internship. Demonstrate your leadership skills by providing
guidance, coordinating efforts, and motivating team members toward achieving
shared goals.

9. Conflict Resolution: Develop skills in managing conflicts within the team. Address
conflicts in a timely and respectful manner, actively listen to all parties involved, and
work towards finding mutually beneficial solutions. Seek guidance from mentors or
supervisors when necessary.

10. Reflect and Learn: Regularly reflect on your experiences in group discussions and
team activities. Identify areas for improvement and set goals to enhance your
abilities. Seek feedback from team members, mentors, or supervisors to gain insights
and grow as a team player and leader.

Remember, honing your skills in group discussions and team dynamics is an ongoing
process. Continuously seek opportunities to practice and learn from your experiences, both
during the internship and beyond, to become a more effective and influential team member
and leader.

Describe the technological developments you have observed and relevant

to the subject area of training (focus on digital technologies relevant to your
job role)
During the internship, I observed several technological developments that are relevant to the
subject area of training, particularly focusing on digital technologies. Here are some of the
notable advancements:

1. Advanced Design Tools: The internship provided exposure to advanced design tools
and software used in the field. These tools enable efficient and accurate design,
verification, and simulation of digital circuits and systems. They offer features such
as enhanced debugging capabilities, improved synthesis algorithms, and advanced
optimization techniques, thereby streamlining the design process.

2. FPGA Advancements: Field-Programmable Gate Arrays (FPGAs) have witnessed

significant advancements during the internship. These programmable devices offer

35
 greater capacity, higher performance, and increased flexibility. The latest FPGAs
incorporate advanced features such as high-speed transceivers, embedded processors,
and hardened IP blocks, enabling the implementation of complex digital systems
with ease.

3. System-on-Chip (SoC) Integration: SoC integration has become a prominent trend in

the industry. The internship exposed me to the integration of various components and
IP blocks into a single chip. SoCs combine processors, memory, peripherals, and
custom logic, resulting in compact and highly integrated digital systems. This
integration enhances performance, reduces power consumption, and enables the
development of sophisticated applications.

4. High-Level Synthesis (HLS): HLS tools have gained traction in the internship,
enabling designers to write complex digital designs using high-level programming
languages such as C/C++ and translating them into optimized hardware
implementations. HLS accelerates the design process, promotes design reuse, and
improves productivity by raising the abstraction level.

5. Verification and Validation Techniques: The internship emphasized the importance

of robust verification and validation methodologies. Advancements in this area
include the use of advanced simulation techniques, formal verification, and
hardware-assisted verification using technologies like emulation and FPGA
prototyping. These techniques ensure the functional correctness and reliability of
digital designs.

6. Digital Signal Processing (DSP): The internship explored the advancements in digital
signal processing techniques and algorithms. Digital filters, image processing
algorithms, audio processing, and data compression techniques have seen continuous
refinement. Improved DSP algorithms and hardware implementations enable faster
and more efficient signal-processing tasks.

7. Internet of Things (IoT) Integration: The internship provided insights into the
integration of digital systems with IoT technologies. IoT platforms, wireless
connectivity standards (such as Wi-Fi, Bluetooth, and Zigbee), and sensor networks
are increasingly being incorporated into digital designs. This integration enables the
development of smart and connected devices, facilitating data exchange and remote
control capabilities.

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 8. Design for Low Power: The internship highlighted the growing importance of
designing for low power consumption. Techniques such as power gating, clock
gating, voltage scaling, and dynamic power management are employed to reduce
power consumption in digital designs. Power optimization has become a critical
aspect, considering the increasing demand for energy-efficient devices.

These technological developments in digital technologies are shaping the field of digital
design and creating opportunities for innovation. The internship provided valuable exposure
to these advancements, enabling me to stay updated with the latest trends and apply them
effectively in my job role

Internship Completion Certificate, Photos and Video

Links:

B.Certificate :
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