PCB Design Guidline For Emi & Emc
PCB Design Guidline For Emi & Emc
PCB Design Guidline For Emi & Emc
Contents
1. What are EMI and EMC in a PCB?
2. EMC-compliant PCB design
3. What are the sources of EMI?
4. 7 design guidelines for EMI and EMC reduction in a PCB
1. Trace spacing and layout
2. Ground planes
3. Shielding
4. Arrangement of PCB layers
5. Segregate sensitive components
6. Decoupling capacitor
7. Controlled impedance for transmission line design
Electromagnetic interference (EMI) is associated with every electronic device we use nowadays. If you
turn on your radio set and TV simultaneously, you will experience the noisy disturbance from TV
interfering with the radio signal and vice-versa.
We can also experience this when we board a plane and are asked to switch off the electronic devices
by the crew. This is to avoid interference of mobile and electronic device signals with the plane’s
navigational signals. As consumer electronics is in high demand, the effects of EMI must be taken into
consideration. It would be very irking if a person walking down the sidewalk talking on their cell phone
caused interference to someone else’s audio device. It is not possible to get rid of EMI/EMC
completely, but we can surely curate our PCB design services to make them less vulnerable to
EMI/EMC effects.
An electronic system consists of printed circuit boards (PCBs), integrated chips, interconnect, and I/O
cables. At high frequencies depending on the length of the interconnects and the current carried by the
conductors, the interconnects tend to act as antennas, resulting in EMI. These EMI radiations interfere
with other devices present in the vicinity. There are international standards that limit the level of
emissions. Thus, it is highly important to measure electromagnetic radiation and control these
radiations.
So, any product having wires/traces and operating at high frequency has the tendency to radiate radio
waves. This is the reason why EMI/EMC study and analysis are important. Does your product’s
radiation disturb other devices present nearby? Whether it is within the set standards? Are the relevant
EMI standards such as IPC CISPR standards achieved? In this article, we will cover the PCB
design guidelines using which EMI and EMC can be controlled/avoided.
Whenever a device deviates from the defined standards, EMC/EMI dominates the system
performance. So, it is vital to control EMI during the initial phase of the PCB design. Controlling EMI in
later production stages can be risky in cost terms. For EMC-friendly board designing, your primary
concern should be on electronic circuit design, component selection, and PCB layout design. To be
market-ready, your product has to pass the prescribed EMI/EMC standards.
EMC-compliant PCB design
Applying the best EMC practices to PCB design helps to achieve compliance with EMC standards at a
much lower rate than alternate EMC measures at a higher integration level. When can you call a
PCB design EMC compliant? Well, EMC compatibility depends upon three perspectives:
There are two types of electromagnetic emission; conducted and radiated emission. Conducted
emission enters the system through power input lines and cables. While, the radiated
emission happens due to electromagnetic waves from power and communication lines, switching
devices, and electrostatic discharges. It propagates through the air from electronic devices and traces,
to interfere with other electronic systems. Examples are mobile and laptops interfering with aircraft
electronics. Conducted interference can be mitigated by introducing line filters connected close to the
power input or near the connectors. Another effective method for reducing conducted interference is
using a ferrite core/ferrite ring. Ferrite core employs high-frequency current dissipation in a ferrite
ceramic to build high-frequency noise suppression devices.
Conducted interference can be reduced using a ferrite core/ferrite ring.
Electromagnetic emissions may also occur from high-frequency traces. Similarly, they can generate
from power and ground planes, due to poor decoupling practices. This also results in unintentional
currents, such as common-mode (CM) and differential-mode (DM) currents.
Poor decoupling practices result in unintentional common-mode (CM) and differential-mode (DM) currents.
Can you recall Faraday’s law from your previous classes? Faraday’s law states that the magnetic
field generated by a coil is directly proportional to the area of the coil and the current.
The second thing is minimizing the rate of change of current since higher current causes more
emissions. So, if you reduce the current, EMI can also be reduced. Maintaining low rise times, even if
your PCB is operating at high frequency, can also be helpful for EMI reduction.
Avoid Impedance mismatching: A properly designed system always comes with matched
impedances from the source, to the transmission line, and the load. It provides maximum power
transfer and minimizes reflections. Reflections on the transmission line increase harmonics, which
increases radiated emissions. Unmatched impedances cause overshoot and ringing in digital signals,
resulting in more radiated emissions. Properly matched impedances are required because they reduce
the radiated emissions from the device.
These best design practices will reduce the length and area of the potential signal return paths that
may increase unwanted EM emissions. The multi-layer stack-up will play a critical role, particularly in
high-power and digital applications. Signal traces from components to the processor should be routed
appropriately to avoid any return path, which could lead to common-mode signal generation.
The use of surface-mount devices (SMD) instead of leaded devices will further reduce EMI/EMC
issues. Surface-mount devices (SMD) offer lower inductances in comparison with RF energy.
Additionally, SMDs offer higher density due to closer component placements.
This is particularly critical in a two-layer or four-layer circuit boards. However, the rising complexity in
the PCB design will create more problems associated with line spacing or trace spacing. The dense
physical dimensions of SMDs will offer more effective noise control.
Leaded components with higher inductances will generate a resonant frequency of more than
100MHz. Therefore, the adoption of a large number of through-hole components is not recommended
as they generate excessive noise. There are no hard and fast rules for PCB design. Some design
rules apply to a certain type of board but are not feasible for other types. Nonetheless, at Sierra
Circuits, we have curated some general PCB design rules, common to all board types.
1.1 Trace separation: All signals (clocks, video, audio, reset, etc.) must be separated from other
traces. the general rule says that the separation between the traces should be 3W, where ‘W’ is the
width of the trace. This practice helps to reduce crosstalk and coupling between adjacent traces on the
same PCB layer. Differential traces are an exception to this rule.
1.3 Use vias like a pro: Vias are used in multi-layer PCBs for signal routing purposes. A good
designer must know that each via comes with its capacitance and inductance effect. So, vias should
be avoided as far as possible and critical traces should be routed on the same layer. Because of
the parasitic capacitance and inductance in the vias, there is an impedance mismatch between
via and trace, which creates reflections. When vias cannot be avoided, it should be ensured that
ground vias should be placed close to the signal vias. This will ensure that the signals are referenced
to connected grounds and this reduces the change in the characteristic impedance value and thus
reflections. In differential pairs, when vias cannot be avoided, the same number of vias should be put
in both traces.
Tip: Avoid vias in differential traces. If you have to then use an anti-pad shared by two vias to
minimize parasitic capacitance.
1.4 Avoid stubs in sensitive and high-frequency traces: Stubs produce reflections as well as the
potential of adding fractional wavelength antenna to the circuit.
1.5 Use guard and shunt traces for clock lines: In clock circuits, decoupling capacitors are very
important for suppressing noise propagating along the supply rails. Guard and shunt traces are used
to protect clock lines from EMI sources, otherwise, such clock signals will create problems elsewhere
in the circuit.
Guard and shunt traces are used to protect clock lines from EMI sources.
2. Ground planes
A ground with a low inductance value is a crucial element during PCB designing for mitigating EMC
problems. Increasing the ground area on a PCB reduces the ground inductance in the system, hence
EM emission and crosstalk too. Several approaches are available when we need to connect the
signals to the ground, but what is best? Before jumping to the best PCB design approach, let us
discuss what is not at all acceptable. Never connect the PCB components randomly to the ground
points. So, what is the recommended design approach?
2.1 Use full ground plane and ground grids: Use the entire ground plane since it offers the least
inductance value when the signal returns to the source from the load. Although a ground requires a
dedicated PCB layer, this may not always be possible in a two-layer PCB. In such scenarios,
designers use ground grids, where the inductance of a ground grid depends upon the distance
between the grids.
Ground grids are used when a dedicated PCB layer is not available.
2.2 Avoid long return paths: As per Faraday’s law, how a signal returns through the system ground
makes all the difference. When a signal takes a longer path, it creates a ground loop that forms a
radiating antenna. A short return path has a lower impedance, which gives better EMC performance.
Long return paths are responsible for greater mutual coupling resulting in crosstalk. Therefore, keep
the return paths as short as possible and the loop area as small as possible. The current return path
should be handled precisely.
It is recommended to connect the device grounds directly to the ground plane. This will reduce the
A short return path has a lower impedance, which gives better EMC performance.
ground loops.
2.4 Place high-speed circuits closer to the ground and low-speed circuits closer to the power plane.
2.5 Always ground the copper fill areas: Floating copper areas should always be grounded.
Otherwise, it may act as an antenna, causing EMC issues.
2.6 Check for multi-power requirements: When a circuit requires more than one power supply, then
it is the best idea to keep them separated by a ground plane. But multi-ground planes cannot be
realized in single-layer PCBs. This problem can be solved by running power and ground tracks for one
supply separated from the others. It will also avoid noise coupling from one power source to the other.
2.7 Be careful with split apertures: Split apertures that are long holes and wide vias in power and
ground planes create a non-uniform area. This non-uniformity increases the impedance in power and
ground planes.
3. Shielding
Shielding is a mechanical technique that uses conductive/magnetic (or both) materials to prevent EMI
in the system. A mechanical shield is a closed conductive container connected to the ground, which
effectively reduces the size of loop antennas by absorbing and reflecting a part of their radiation. It can
be used either to cover the whole system or a part of it, based upon the requirement. EMI/EMC
shielding protects the signal transmission from external noise and prevents information loss.
EMI/EMC shielding protects the signal from external noise.
3.1 Cable shielding: Cables that carry analog and digital signals create serious EMI issues. Their
parasitic capacitance and inductance factors are responsible for this. EMI can be prevented by
shielding these cables and connecting them to the ground at the front and back.
4.1 If a two-layer board is used and an entire layer of ground is not possible, then ground grids should
be used.
4.2 If a separate power plane is not used, then ground traces should run in parallel with power traces
to keep the supply clean.
4.3 When there are more than four layers, it is recommended to use PCB layers’ arrangement
like signal layer→ ground/power layer → signal layer → ground/power layer → signal layer →
ground/power layer → signal layer. That is to use alternate signal and ground layers. And the
number of layers should be even.
EMC performance of a PCB also depends upon the arrangement of its layers.
Using dedicated ground planes, ground vias, and galvanic isolation are some of the best PCB
grounding techniques to avoid EMI.
6. Decoupling capacitor
When ICs are operating, they switch current at high-frequency, which results in switching noise in the
power rails/traces connected to the IC. This noise if not controlled, will result in radiated emissions and
thus EMI. The method to reduce power rail noise is to place the decoupling capacitors close to the IC
power pins. And, grounding the capacitors directly to the ground planes. The use of power planes
instead of power traces will also reduce power noise.
Power rail noise is reduced by placing the decoupling capacitors close to the IC power pins.
The finite difference time domain modeling is implemented to measure the frequency response of
the common-mode current during the high voltage applications.
The electric coupling between the power plane and the ground plane will also impact the
common-mode current.
Sierra Circuits measures the frequency response of electromagnetic emission from the stripline
structure with the help of a high-end tool and our own proposed model. We understand the importance
of keeping EMI out, thus we offer physical insights and design guidelines to keep your circuit safe and
sound.
The objective of EMC/EMI standards is to maintain compatibility between the co-located electrical and
electronic system for trouble-free operation. CISPR standards are applicable to all products, systems,
and installations. They are introduced following the Federal Communications Commission (FCC)
Section 15, and the European International Special Committee on Radio Interference (CISPR)
regulations.
The standards define permissible limits for both conducted and radiated emissions and their
classification into residential, commercial, light industrial, and industrial environments. To meet
EMC requirements, the device must be tested for conducted and radiated emissions along with
conducted and radiated susceptibility. An example of one of the tests is shown by a graph given below.
There are limits on this graph, and the emission levels should be within the values mentioned in the
graph.
EMI/EMC emission should be as per FCC CISPR standards. Image credit: Maxim Integrated
Electromagnetic compatibility of any electronic circuitry is associated with the generation, propagation,
and reception of electromagnetic noise. Electromagnetic noise is not a welcomed character in a PCB
design. At Sierra Circuits, we take intensive care to ensure signals do not interfere with each other
when it comes to traces, vias, and even PCBs operating in unison. EMC improvements with accurate
PCB design do not add extra cost to the final product that is why it is recommended during the initial
production phase.