Computer Organization and Arm Microcontroller Module1

(21EC52)

Basic Structure of Computers

TOPIC: Basic Structure of Computers: Basic Operational Concepts, Bus Structures,
Performance –Processor Clock, Basic Performance Equation, Clock Rate, Performance
Measurement.

1. BASIC OPERATIONAL CONCEPT:

The program to be executed is stored in memory. Instructions are accessed from memory to the
processor one by one and executed.
STEPS FOR INSTRUCTION EXECUTION
Consider the following instruction
Ex: 1 Add LOCA, R0

This instruction is in the form of the following instruction format

Opcode Source, Source/ Destination

Where Add is the operation code, LOCA is the Memory operand and R0 is Register operand
This instruction adds the contents of memory location LOCA with the contents of Register R0 and
the result is stored in R0 Register.
The symbolic representation of this instruction is
R0 [LOCA] + [R0]

The contents of memory location LOCA and Register R0 before and after the execution of this
instruction is as follows

Before instruction execution After instruction execution

LOCA = 23H LOCA = 23H
R0 = 22H R0 = 45H

The steps for instruction execution are as follows

1. Fetch the instruction from memory into the IR (instruction register in CPU).
2. Decode the instruction 1111000000 10011010
3. Access the first Operand
4. Access the second Operand
5. Perform the operation according to the Opcode (operation code).
6. Store the result into the Destination Memory location or Destination Register.

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Ex:2 Add R1, R2, R3 (3 address instruction format)

This instruction is in the form of the following instruction format

Opcode, Source-1, Source-2, Destination

Where R1 is Source Operand-1, R2 is the Source Operand-2 and R3 is the Destination. This
instruction adds the contents of Register R1 with the contents of R2 and the result is placed in R3
Register.
The symbolic representation of this instruction is
R3 [R1] + [R2]
The contents of Registers R1,R2,R3 before and after the execution of this instruction is as follows.
Before instruction execution After instruction execution
R1 = 24H R1 = 24H
R2 = 34H R2 = 34H
R3 = 38H R3 = 58H

The steps for instruction execution is as follows

1. Fetch the instruction from memory into the IR.
2. Decode the instruction
3. Access the First Operand R1
4. Access the Second Operand R2
5. Perform the operation according to the Operation Code.
6. Store the result into the Destination Register R3.

CONNECTION BETWEEN MEMORY AND PROCESSOR

The connection between Memory and Processor is as shown in the figure.

The Processor consists of different types of registers.
1. MAR (Memory Address Register)
2. MDR (Memory Data Register)
3. Control Unit
4. PC (Program Counter)
5. General Purpose Registers
6. IR (Instruction Register)
7. ALU (Arithmetic and Logic Unit)

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The functions of these registers are as follows

1. MAR
 It establishes communication between Memory and Processor
 It stores the address of the Memory Location as shown in the figure.

MAR
Memory
5000h 5000 23h
5001 43h
5002 78h
5003 65h

2. MDR
 It also establishes communication between Memory and the Processor.
 It stores the contents of the memory location (data or operand), written into or read from
memory as shown in the figure.

MDR
Memory
23h 23h 5000
43h 5001
78h 5002
65h 5003

3. CONTROL UNIT
 It controls the data transfer operations between memory and the processor.
 It controls the data transfer operations between I/O and processor.
 It generates control signals for Memory and I/O devices.

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4. PC (PROGRAM COUNTER)
 It is a special purpose register used to hold the address of the next instruction to be
executed.
 The contents of PC are incremented by 1 or 2 or 4, during the execution of current
instruction.
 The contents of PC are incremented by 1 for 8 bit CPU, 2 for 16 bit CPU and for 4 for 32
bit CPU.

4. GENERAL PURPOSE REGISTER / REGISTER ARRAY

The structure of register file is as shown in the figure

R0
R1
R2
.
Rn-1
 It consists of set of registers.
 A register is defined as group of flip flops. Each flip flop is designed to store 1 bit of
data.
 It is a storage element.
 It is used to store the data temporarily during the execution of the program(eg: result).
 It can be used as a pointer to Memory.
 The Register size depends on the processing speed of the CPU
 EX: Register size = 8 bits for 8 bit CPU

5. IR (INSTRUCTION REGISTER
It holds the instruction to be executed. It notifies the control unit, which generates timing
signals that controls various operations in the execution of that instruction.

6. ALU (ARITHMETIC and LOGIC UNIT)

 It performs arithmetic and logical operations on given data.

Steps for fetch the instruction

PC contents are transferred to MAR
Read signal is sent to memory by control unit.
The instruction from memory location is sent to MDR.
The content of MDR is moved to IR.

[PC]  MAR Memory  MDR  IR

CU ( read signal)

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2. BUS STRUCTURE
Bus is defined as set of parallel wires used for data communication between different parts of
computer. Each wire carries 1 bit of data. There are 3 types of buses, namely
1. Address bus
2. Data bus and
3. Control bus1.
1. Address bus :
 It is unidirectional.
 The processor (CPU) sends the address of an I/O device or Memory device by means of
this bus.

2. Data bus
 It is a bidirectional bus.
 The CPU sends data from Memory to CPU and vice versa as well as from I/O to CPU
and vice versa by means of this bus.

3. Control bus:
 This bus carries control signals for Memory and I/O devices. It generates control signals
for Memory namely MEMRD and MEMWR and control signals for I/O devices namely IORD
and IOWR.

The structure of single bus organization is as shown in the figure.

 The I/O devices, Memory and CPU are connected to this bus is as shown in the figure.
 It establishes communication between two devices, at a time.

Features of Single bus organization are

 Less Expensive
 Flexible to connect I/O devices.
 Poor performance due to single bus.
There is a variation in the devices connected to this bus in terms of speed of operation.
Few devices like keyboard, are very slow. Devices like optical disk are faster. Memory and
processor are faster, but all these devices uses the same bus. Hence to provide the synchronization

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between two devices, a buffer register is attached to each device. It holds the data temporarily
during the data transfer between two devices.

3. PERFORMANCE
Basic performance Equation
 The performance of a Computer System is based on hardware design of the processor and
the instruction set of the processors.
 To obtain high performance of computer system it is necessary to reduce the execution
time of the processor.
 Execution time: It is defined as total time required executing one complete program.
 The processing time of a program includes time taken to read inputs, display outputs,
system services, execution time etc.
 The performance of the processor is inversely proportional to execution time of the
processor.
More performance = Less Execution time.
Less Performance = More Execution time.

The Performance of the Computer System is based on the following factors

1. Cache Memory
2. Processor clock
3. Basic Performance Equation
4. Instructions
5. Compiler

CACHE MEMORY: It is defined as a fast access memory located in between CPU and
Memory. It is part of the processor as shown in the fig

The processor needs more time to read the data and instructions from main memory
because main memory is away from the processor as shown in the figure. Hence it slowdown the
performance of the system.
The processor needs less time to read the data and instructions from Cache Memory
because it is part of the processor. Hence it improves the performance of the system.

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PROCESSOR CLOCK: The processor circuits are controlled by timing signals called as Clock.
It defines constant time intervals and are called as Clock Cycles. To execute one instruction there
are 3 basic steps namely
1. Fetch
2. Decode
3. Execute.
The processor uses one clock cycle to perform one operation as shown in the figure
Clock Cycle → T1 T2 T3
Instruction → Fetch Decode Execute
The performance of the processor depends on the length of the clock cycle. To obtain high
performance reduce the length of the clock cycle. Let ‘ P ’ be the number of clock cycles generated
by the Processor and ‘ R ‘ be the Clock rate .

The Clock rate is inversely proportional to the number of clock cycles.

i.e R = 1/P.
Cycles/second is measured in Hertz (Hz). Eg: 500MHz, 1.25GHz.

Two ways to increase the clock rate –

 Improve the IC technology by making the logical circuit work faster, so that the time taken
for the basic steps reduces.
 Reduce the clock period, P.

BASIC PERFORMANCE EQUATION

Let ‘ T ‘ be total time required to execute the program.
Let ‘N ‘ be the number of instructions contained in the program.
Let ‘ S ‘ be the average number of steps required to execute one instruction.
Let ‘ R’ be number of clock cycles per second generated by the processor to execute one
program.

Processor Execution Time is given by

T=N*S/R
This equation is called as Basic Performance Equation.
For the programmer the value of T is important. To obtain high performance it is necessary to
reduce the values of N & S and increase the value of R

Performance of a computer can also be measured by using benchmark programs.

PERFORMANCE Measurement:

When we compare the performance of different computers say A, B, C, we may observe that some
programs run faster by computers say A, B, C, we may observe that some programs run faster by computer
A, some computer B and some by computer C. In this situation they present a confusing picture and we
cannot have a clear idea of which computer is faster. This happens because each computer has an ability to
execute faster than others.

When instruction has all its operands in CPU registers, it will run faster whereas the instruction which
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requires multiple memory accesses takes more time to execute. Let us consider two programs P1 and P2,
with instructions having all operands in the memory, respectively. Also consider two computers C1, and
C2. The clock speed of C1 is greater than the clock speed of C2; however the memory access time in C2 is
less than the memory access time in C1. In such situation it is difficult to decide which computer is faster.
Therefore, measures of instruction execution performance are based on average figures, which are usually
determined experimentally by measuring the run times of representative called benchmark programs.

The selected benchmark programs are compiled for the computer under test, and the running time on real
computer is measured. The same benchmark program is also compiled and run on the reference computer.
A non-profit organization called System Performance Evaluation Corporation (SPEC) specified the
benchmark programs and reference computers in 1995 and again in 2000. Foe SPEC95, the reference
computer is the SUN SPARC station 10/40 and for SPEC2000, the reference computer the Ultra-SPARC10
workstation with 300 MHz Ultra SPARC-II processor.

The running time of a benchmark program is compared under test and the reference computer to decide the
SPEC rating of the computer under test. The SPEC rating is given by

𝑅𝑢𝑛𝑛𝑖𝑛𝑔 𝑡𝑖𝑚𝑒 𝑜𝑓 𝑟𝑒𝑓𝑒𝑟𝑒𝑛𝑐𝑒 𝐶𝑜𝑚𝑝𝑢𝑡𝑒𝑟

𝑆𝑃𝐸𝐶 =
𝑅𝑢𝑛𝑛𝑖𝑛𝑔 𝑡𝑖𝑚𝑒 𝑜𝑓 𝑐𝑜𝑚𝑝𝑢𝑡𝑒𝑟 𝑢𝑛𝑑𝑒𝑟 𝑡𝑒𝑠𝑡

The SPEC rating for all selected programs is individually calculated and then the geometric mean of the
results is computed to determine the overall SPEC rating for the computer under test. It is given by

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Computer Organization and Arm Microcontroller Module1
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