PCS-9600 Series Setting Guide - R2.00

PCS-9600 Series Relay
Setting Guide Manual
NR Electric Co., Ltd.

Preface
Preface
Documentation for equipment ordered from NR Electric Co., Ltd. is dispatched separately from
manufactured goods and may not be received at the same time. Therefore, this guide is provided
to ensure that printed information normally present on equipment is fully understood by the
recipient.
The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.
For these calculation results of settings for each protection function, they are calculated based the
technical data provided by primary equipment manufacturer and system parameters from the field.
All technical data and system parameters needed to be confirmed based on on-site specific
application should be affirmed and checked further.
Here the instruction manual gives a setting principle of the PCS-9600 series relay. All settings are
only a reference and are not used as final commissioning settings.
The setting guide manual is not involving of protection function configuration and protection
principle, and the detailed description of relevant contents can be found in the relevant instruction
manual of the PCS-9600 series relay.
Before carrying out any setting and configuration work on the equipment, the user should be
familiar with the contents of this manual, and this manual must be thoroughly read and
understood.
Copyright © 2016 NR. All rights reserved.
We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and d issemination
to third parties is strictly forbidden except where expressly authorized.
The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated.
We reserve the rights to make technical improvements without notice.
NR ELECTRIC CO., LTD. Tel: +86-25-87178888

Headquarters: 69, Suyuan Avenue, Jiangning, Nanjing 211102, China Fax: +86-25-87178999
Manufactory: 18, Xinfeng Road, Jiangning, Nanjing 211111, China Website: www.nrelect.com, www.nrec.com
P/N: ZL_PCS-9600_X_Setting Guide_EN_Overseas General_X Version: R1.00
PCS-9600 Series Relay I

Date: 2016-09-28
Preface
II PCS-9600 Series Relay

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Table of Contents
Table of Contents
Preface ......................................................................................................... I
Table of Contents ..................................................................................... III
1 Introduction of Setting Calculation ..................................................... 1
1.1 Precondition of Setting Calculation .......................................................................... 1

1.2 Functions .......................................................................................................................... 1
2 Parameters for Setting Calculation ..................................................... 3
2.1 Demo System Figure ..................................................................................................... 3

2.2 Parameters of Demo System ....................................................................................... 3
3 Short Circuit Current Calculation ........................................................ 5
3.1 Engineering Configuration ........................................................................................... 5

3.2 Short Circuit Calculation .............................................................................................. 6
3.2.1 Short Circuit Calculation under the Maximum Operating Mode............................................ 6
3.2.2 Short Circuit Calculation under the Minimum Operating Mode............................................. 7
4 Feeder Protection Setting Calculation ................................................ 9
4.1 Overcurrent Protection ................................................................................................. 9

4.1.1 Overcurrent Protection Logic Diagram ................................................................................ 9
4.1.2 Voltage Control Element for Overcurrent Protection ............................................................ 9
4.1.3 Directional Element for Overcurrent Protection ................................................................. 10
4.1.4 Harmonic Blocking Element for Overcurrent Protection ......................................................11
4.1.5 Overcurrent Protection Setting Calculation.........................................................................11
4.1.6 Relevant Setting Sheet ..................................................................................................... 15
4.2 Zero Sequence Overcurrent Protection.................................................................. 17

4.2.1 Principle of Zero Sequence Overcurrent Protection........................................................... 17
PCS-9600 Series Relay III

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Table of Contents
4.2.2 Zero Sequence Overcurrent Protection Logic Diagram ..................................................... 18
4.2.3 Zero Sequence Overcurrent Protection Setting Calculation............................................... 18
4.3 Negative Sequence Overcurrent Protection.......................................................... 22

4.3.1 Principle of Negative Sequence Overcurrent Protection .................................................... 23
4.3.2 Negative Sequence Overcurrent Protection Logic Diagram ............................................... 23
4.3.3 Negative Sequence Overcurrent Protection Setting Calculation ........................................ 23
4.4 Sensitive Earth Fault Protection ............................................................................... 25

4.4.1 Principle of SEF Protection ............................................................................................... 25
4.4.2 SEF Protection Logic Diagram .......................................................................................... 25
4.4.3 SEF Protection Setting Calculation ................................................................................... 25
4.5 Breaker Failure Protection ......................................................................................... 27

4.5.1 Principle of Breaker Failure Protection .............................................................................. 27
4.5.2 Breaker Failure Protection Logic Diagram ......................................................................... 28
4.5.3 Breaker Failure Initiation Setting Calculation ..................................................................... 28
4.6 Overvoltage Protection ............................................................................................... 29

4.6.1 Principle of Overvoltage Protection ................................................................................... 29
4.6.2 Overvoltage Protection Logic Diagram .............................................................................. 29
4.6.3 Overvoltage Protection Setting Calculation ....................................................................... 29
4.7 Undervoltage Protection ............................................................................................. 30

4.7.1 Principle of Undervoltage Protection ................................................................................. 31
4.7.2 Undervoltage Protection Logic Diagram ............................................................................ 31
4.7.3 Undervoltage Protection Setting Calculation ..................................................................... 31
4.8 SOTF Overcurrent Protection.................................................................................... 32

4.8.1 Principle of SOTF Overcurrent Protection ......................................................................... 32
IV PCS-9600 Series Relay

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Table of Contents
4.8.2 SOTF Overcurrent Protection Logic Diagram .................................................................... 33
4.8.3 SOTF Overcurrent Protection Setting Calculation ............................................................. 33
4.9 Negative sequence Overvoltage Protection .......................................................... 35

4.9.1 Principle of Negative Sequence Overvoltage Protection.................................................... 35
4.9.2 Negative Sequence Overvoltage Protection Logic Diagram .............................................. 35
4.9.3 Negative Sequence Overvoltage Protection Setting Calculation........................................ 35
4.10 Zero sequence Overvoltage Protection ................................................................ 36

4.10.1 Principle of Zero Sequence Overvoltage Protection ........................................................ 36
4.10.2 Zero Sequence Overvoltage Protection Logic Diagram ................................................... 36
4.10.3 Zero Sequence Overvoltage Protection Setting Calculation............................................. 36
4.10.4 Relevant Setting Sheet ................................................................................................... 37
4.11 Thermal Overload Protection .................................................................................. 37

4.11.1 Principle of Thermal Overload Protection ........................................................................ 37
4.11.2 Thermal Overload Protection Logic Diagram ................................................................... 38
4.11.3 Thermal Overload Protection Setting Calculation............................................................. 38
4.11.4 Relevant Setting Sheet.................................................................................................... 38
4.12 Auto-recloser ............................................................................................................... 39

4.12.1 Principle of Auto-recloser ................................................................................................ 39
4.12.2 Auto-recloser Logic Diagram ........................................................................................... 40
4.12.3 Auto-recloser Setting Calculation .................................................................................... 40
4.13 Broken Conductor Protection ................................................................................. 42

4.13.1 Principle of Broken Conductor Protection ........................................................................ 42
4.13.2 Broken Conductor Protection Logic Diagram................................................................... 42
4.13.3 Broken Conductor Protection Setting Calculation ............................................................ 43
4.14 Frequency Protection ................................................................................................ 43

4.14.1 Principle of Under-frequency Protection .......................................................................... 43
PCS-9600 Series Relay V

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Table of Contents
4.14.2 Under-frequency Protection Logic Diagram..................................................................... 44
4.14.3 Under-frequency Protection Setting Calculation .............................................................. 44
4.14.4 Principle of Over-frequency Protection ............................................................................ 44
4.14.5 Over-frequency Protection Logic Diagram....................................................................... 44
4.14.6 Over-frequency Protection Setting Calculation ................................................................ 45
4.14.7 Principle of rate-of-change of frequency Protection ......................................................... 45
4.14.8 Rate-of-change of Frequency Protection Logic Diagram ................................................. 45
4.14.9 Rate-of-change of frequency Protection Setting Calculation ............................................ 46
4.14.10 Relevant Setting Sheet ................................................................................................. 46
4.15 Dead Zone Protection ................................................................................................ 48

4.15.1 Principle of Dead Zone Protection ................................................................................... 48
4.15.2 Dead Zone Protection Logic Diagram.............................................................................. 49
4.15.3 Dead Zone Protection Setting Calculation ....................................................................... 49
4.16 Undercurrent Protection ........................................................................................... 49

4.16.1 Principle of Undercurrent Protection................................................................................ 49
4.16.2 Undercurrent Protection Logic Diagram .......................................................................... 50
4.16.3 Undercurrent Protection Setting Calculation .................................................................... 50
5 Common Settings................................................................................. 51
5.1 System Settings ............................................................................................................ 51

5.1.1 Setting List........................................................................................................................ 51
5.1.2 Setting Principle ................................................................................................................ 51
5.2 Device Settings ............................................................................................................. 54

5.2.1 Setting List ........................................................................................................................ 54
5.3 Communication Settings ............................................................................................ 55

5.3.1 Setting List ........................................................................................................................ 55
VI PCS-9600 Series Relay

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Table of Contents
6 Manual Version History ....................................................................... 63
PCS-9600 Series Relay VII

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Table of Contents
VIII PCS-9600 Series Relay

Date: 2016-09-28
1 Introduction of Setting Calculation
1.1 Precondition of Setting Calculation
The setting calculation of relay protection related to power system operating mode shall take the
common operating mode as calculated operating mode. The so -called common operating mode
refers to normal operating mode or normal repair mode of stop of adjacent primary loop or one
component of protected equipment. For the system with relatively large change of operating mode,
the dispatch operation department shall determine the operating mode based on by the setting
calculation according to the specific conditions.
1.2 Functions
To simplify the setting calculation work, calculate the short circuit current according to the following
consumption conditions:
 Not take the resistance component in impedance parameters of generator, transformer,

overhead line, cable line, etc. into account.
 Only calculate the period component in short circuit transient current.
 Adopt rated voltage value or average rated voltage value ad the system voltage, and not
consider change of actual position of transformer voltage tap.
 Not take phase-to-phase and phase-to-ground transit resistance of the fault point into
account.
Unless specially specified, no matter calculated in actual value or per-unit value, the calculation
results (current, voltage and impedance, etc.) of the calculation formula listed in the setting
calculation sheet shall be given in the form of actual value at the secondary side.
PCS-9600 Series Relay 1

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2 PCS-9600 Series Relay

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2 Parameters for Setting Calculation
2.1 Demo System Figure
Following figure shows the demo system for setting calculation.
A B C T1 Y,d11 D
20km 30km
G
~ d2
35kV d1
20MVA
T2 Y,d11 35/10.5
Uk%=7.0
d4
20MVA
35/10.5
E
Uk%=7.0
Figure 2.1-1 Demo s ystem for setting calculation
2.2 Parameters of Demo System
 Parameters of Generator
Maximum reactance of system: 7.9Ω (the maximum equivalence reactance of the protection
back side system under the minimum operating mode shall be calculated as 35kV).
Minimum reactance of system: 5.4Ω (the minimum equivalence reactance of the protection
back side system under the maximum operating mode shall be calculated as 35kV), zero
sequence reactance 8Ω.
 Parameters of Transmission Line
Line reactance: X1=0.4Ω/km, X0=1.4Ω/km
 Parameters of Transformer T1, T2
Model: S9-20000/35 (Parameters on transformer nameplate)
Wiring: Yd11 (Parameters on transformer nameplate)
Capacity: 20/20MVA (Parameters on transformer nameplate)
Voltage transformation ratio: 35±2×2.5% / 10.5kV (Parameters on transformer nameplate)
Short circuit voltage: 7.0% (Parameters on transformer nameplate)
 Current Transformer Ration
Section AB line protection CT transformation ratio is 600/5.

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3 Short Circuit Current Calculation
3.1 Engineering Configuration
The short circuit calculation equivalence diagram is shown in Figure 3.1-1, and the reactance of
grid to the system is one-point equivalence.
The per-unit value is taken 20MVA, 35kV as reference value.
The 10kV voltage grade reference voltage:
10 . 5
 35   10 . 5 kV
'
U B
35
NOTE! The reference capacity is 20MVA.
Xs A XL1 B XL2 C XT1 D

d2
S1
35kV d1
XT2
d4
Figure 3.1-1 Equivalence diagram for short circuit calculation
Where:
Maximum reactance of the system:
20
X S max
 7 .9  2
 0 . 129
35
Minimum reactance of the system:
20
X S min
 5 .4  2
 0 . 088
35
Transmission line (Section AB):
20
X L1
 0 . 4  20  2
 0 . 131
35
Transmission line (Section BC):
20
X L2
 0 . 4  30  2
 0 . 196
35
Transformer T1:

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7 .0 20
X T1
   0 . 07
100 20
Transformer T2:
7 .0 20
X T 2
   0 . 07
100 20
3.2 Short Circuit Calculation
All the following calculated results are based on the reference of the 35kV side.
3.2.1 Short Circuit Calculation under the Maximum Operating Mode
1. The “d1” point has a three-phase metallic short circuit fault.
X *  0 . 088  0 . 131  0 . 219
Short circuit current:
1 20
I d1    1 . 51 kA
(3)
0 . 219 3  35
X *  0 . 088  0 . 131  0 . 196  0 . 415
1 20
Id2    0 . 79 kA
(3)
0 . 415 3  35
X *  0 . 088  0 . 131  0 . 196  0 . 07  0 . 485
1 20
Id3    0 . 68 kA
(3)
0 . 485 3  35
X *  0 . 088  0 . 131  0 . 07  0 . 289

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1 20
Id4    1 . 14 kA
(3)
0 . 289 3  35
3.2.2 Short Circuit Calculation under the Minimum Operating Mode
X *  0 . 129  0 . 131  0 . 26
1 20
I d1    1 . 27 kA
(3)
0 . 26 3  35
X *  0 . 129  0 . 131  0 . 196  0 . 456
1 20
Id2    0 . 72 kA
(3)
0 . 456 3  35
X *  0 . 129  0 . 131  0 . 196  0 . 07  0 . 526
1 20
Id3    0 . 63 kA
(3)
0 . 526 3  35
X *  0 . 129  0 . 131  0 . 07  0 . 33
1 20
Id4    1 . 0 kA
(3)
0 . 33 3  35

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4 Feeder Protection Setting Calculation

The PCS-9611 relay is a protection, control and monitoring unit for various primary equipments
(such as overhead line, underground cable and transformer etc.) on solidly grounded, impedance
grounded, Peterson coil grounded and ungrounded system.
4.1 Overcurrent Protection
The overcurrent protection is provided with four stages, each section has separate current setting
and time setting and control word. Each section can separately select to be controlled through
composite voltage (negative sequence voltage and low voltage) component, direction component,
harmonic blocking element or not.
The stage 1 overcurrent protection requires no time limit operation, and the protection area shall
not be less than 20% of the total line; the stage 2 overcurrent protection shall protect the whole
protection line; the stage 3 and 4 protections can be backup protection for the line, and also can be
remote backup protection for the adjacent line.
4.1.1 Overcurrent Protection Logic Diagram
Ia > [50/51P1.I_Set]
50/51P1.VCE_A
&
50/51P1.Dir_A
50/51P1.HmBlk_A
Ib > [50/51P1.I_Set]
50/51P1.VCE_B
&
50/51P1.Dir_B
50/51P1.HmBlk_B
Ic > [50/51P1.I_Set] [50/51P1.St]
50/51P1.VCE_C
& & tOC1 0
[50/51P1.Op]
50/51P1.Dir_C
50/51P1.HmBlk_C
[50/51P1.En]
[50/51P1.En1]
[50/51P1.Blk]
Figure 4.1-1 Logic diagram of the stage 1 overcurrent protection
Above figure shows the stage 1 overcurrent protection logic diagram, for the details about the
overcurrent protection logic, see the “Instruction Manual” of the PCS-9611 feeder relay.
4.1.2 Voltage Control Element for Overcurrent Protection

If the current detected by a local relay for a remote fault condition is below its overcurrent setting, a
voltage controlled overcurrent (VCO) element may be used to increase the relay sensitivity to such
faults. In this case, a reduction in system voltage will occur; this may then be used to reduce the
pick up level of the overcurrent protection. The VCO function can be selectively enabled on the
four stages of the main overcurrent element. When the VCO is enabled, the overcurrent setting

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can be modified just to be in excess of the maximum value of the load current.
Overcurrent Element Voltage for Controlling

Ia> Uab< or Uca< or U2>
Ib> Ubc< or Uab< or U2>
Ic> Uca< or Ubc< or U2>
Note that the voltage dependent overcurrent relays are more often applied in practical protection
applications in order to give adequate overcurrent relay sensitivity for close up fault conditions.
The fault characteristic of this protection must then coordinate with any of the downstream
overcurrent relays that are responsive to the current decrement condition. It therefore follows that
if this relay is to be applied on an outgoing feeder from a generator station, the use of voltage
controlled overcurrent protection in the feeder relay may allow better co ordination with the VCO
relay on the generator.
For the operation accuracy of the VCO protection, it is necessary to take the status of the voltage
transformer into account. If the voltage transformer has a fault, the numerical relay will issue an
[VTS.Alm] signal and block all the elements that relate to the voltage measurement.
4.1.3 Directional Element for Overcurrent Protection

To guarantee selectivity of overcurrent protection operation, namely to guarantee operation in
case of positive direction fault, and no operation in reverse direction, the equipment introduces
direction component to satisfy the selective requirements of overcurrent protection operation.
The phase fault elements of this relay are internally polarized by the quadrature phase-to-phase
voltages, as shown in the table below:
Phase of Protection Operate Current Polarizing Voltage

A Phase Ia Ubc
B Phase Ib Uca
C Phase Ic Uab
Under system fault conditions, the fault current vector will lag its nominal phase voltage by an
angle dependent upon the system X/R ratio. It is therefore a requirement that the relay operates
with maximum sensitivity for currents lying in this region. This is achieved by means of the relay
characteristic angle (RCA) setting; this defines the angle by which the current applied to the relay
must be displaced from the voltage applied to the relay to obtain maximum relay sensitivity.
For a close up three-phase fault, all three voltages will collapse to zero and no healthy phase
voltages will be present. For this reason, the relay includes a synchronous polarization feature that
stores the pre-fault positive sequence voltage information and continues to apply it to the
directional overcurrent elements for a time period of 3 fundamental wave cycles, after which, it will
keep the result of the directional element, this ensures that either the instantaneous or the time
delayed directional overcurrent elements will be allowed to operate, even with a three -phase
voltage collapse.
The relay characteristic angle (RCA) is configurable through the setting [50/51P.RCA]. A
directional check is performed based on the following criteria:

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 Directional forward
-90°< (angle(U) - angle(I) - RCA) < 90°
 Directional reverse
-90°> (angle(U) - angle(I) - RCA) > 90°
Any of the four overcurrent stages may be configured to be directional. When the element is
selected as directional, a VTS block option is available. When the relevant setting is set as “1”,
operation of the voltage transformer supervision (VTS) will block the stage if the relevant
directional element is in service. When the relevant setting is set as “0”, the stage will revert to
non-directional upon operation of the VTS.
4.1.4 Harmonic Blocking Element for Overcurrent Protection
To prevent maloperation of the overcurrent protection when the tr ansformer is energized without
any load, this relay provides a 2nd harmonic blocking function for resolving such a problem.
nd
The percent threshold of the 2 harmonic blocking element to the fundamental wave can be set
through the setting [50/51P.K_Hm2].
The harmonic blocking mode can be selected through the setting [50/51P.Opt_Hm_Blk].
Harmonic Blocking Criterion

Setting Value
Phase A Phase B Phase C
1 Phase blocking Ia2/ Ia 1 > Ib2/ Ib 1 > Ic2/ Ic1 >
2 Cross blocking (Ia 2/ Ia 1 >) or (Ib2/ Ib1 >) or (Ic2 / Ic 1 >)
3 Ma ximum blocking Ma x(Ia 2, Ib2, Ic 2)/ Ia 1 > Ma x(Ia 2, Ib2, Ic 2)/ Ib 1 > Ma x(Ia 2, Ib2, Ic 2)/ Ic1 >
When the fundamental current is greater than the setting [50/51P.I_Rls_HmBlk], the harmonic
blocking element of the corresponding phase is released.
4.1.5 Overcurrent Protection Setting Calculation
4.1.5.1 Voltage Control Element Setting Calculation
The undervoltage component is set according to the phase-to-phase voltage; the operating
voltage of the undervoltage component can be based on the following formula.
U

min
U op . 1
K rel K r
Where:
Uo p.1—— primary operating voltage of protection equipment;
Umin —— minimum operating wire voltage of grid;
Krel —— reliable coefficient, 1.1~1.2;
Kr —— return coefficient of relay.

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In the practice, it is constantly set as 0.6~0.7Un.
The negative sequence voltage operating value shall escape from the imbalanced voltage during
normal operation, the imbalanced voltage value can be determined through actual measurement.
Generally, it is 0.04~0.08 times of the rated phase voltage.
4.1.5.2 Instantaneous Overcurrent Protection Setting Calculation (OC1)
In order to guarantee selectivity, the operating range of instantaneous current quick break
protection shall not exceed the end of protected line. The primary operating current of
instantaneous current quick break protection shall be set according to the maximum short circuit
current of the protection equipment when avoiding the short circuit a t the end of protected line.
I op . 1  K rel I k . max
I (3)
Where:
Ik.max —— in case of short circuit at the end of the protected line, the maximum short circuit
current value is measured at the protection and installation position ;
Krel —— reliable coefficient, considering relay setting value error, short circuit current
calculation error, as well as influence of non-periodic component on protection in the primary
short circuit current, Krel≥1.2~1.3.
When d1 has three-phase fault, the three-phase short circuit current through the protection at “A”
point is:
20  10
3
1 SB 1
     1506 . 5 A
(3)
Ik
X s
 X L1 3U B ( 35 )
0 . 088  0 . 131 3  35
The current setting of the stage 1 overcurrent is as below.
1506 . 5
I opI  K rel  I k  1 . 25   15 . 69 A
600 / 5
4.1.5.3 Time Overcurrent Protection Setting Calculation (OC2, OC3, OC4)
The limit time current quick break protection requires protecting the whole line and cooperating
with the No.1 stage protection of neighboring next grade line. According to the specific condition of
neighboring line protection, the setting calculation principle is as follows:
1. In coordination with quick break protection of current measurement component in adjacent

lines.
I op . 1  K rel K b . max I op . 1
II I
Where:
Kb.max —— maximum branch coefficient;

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I
I op . 1
—— quick break protection operating current of adjacent lines;
Krel —— reliable coefficient, Krel ≥ 1.1.
When d2 has three-phase short circuit, the operating current of the OC2 protection:
20  10
3
1 SB 1
I kB . max      795 A
(3)
X s
 X L1
 X L2 3U B ( 35 )
0 . 088  0 . 131  0 . 196  3  35
1
I op . 1  K rel I op . 2  1 . 15  1 . 25  795   9 . 52 A
II I
600 / 5
2. When the next stage is transformer with differential protection, the time overcurrent protection
shall be set and calculated according to the following formula.
I op . 1  K ap I k . max
II (3)
Where:
Ik.max —— when the overcurrent protection which is allowed to transformer protection

represents faults at other sides of transformer, the maximum three-phase short circuit
current of the line.
Kap —— coordination coefficient, Kap ≥ 1.3.
When d4 has fault, the maximum three-phase short circuit current is through the protected area:
20  10
3
1 SB 1
     1141 . 6 A
(3)
Ik
X s
 X L1
 XT2 3U B ( 35 )
0 . 088  0 . 131  0 . 07 3  35
The OC2 with voltage control shall be set as:
1141 . 6
I op . 1  K rel  I k  1 . 3   12 . 37 A
II
600 / 5
Select the above maximum value as the current setting of the OC2 protection.
4.1.5.4 Time Setting Calculation
The stage 1 overcurrent protection generally does not coordinate with the adjacent line. The stage
2 overcurrent protection generally coordinates with the stage 1 overcurrent protection of the
adjacent line. The stage 3 overcurrent protection is in coordination with the stage 3 overcurrent
protection generally of adjacent line (or transformer). When the sensitivity is adequate, it is
available to be set with the stage 2 overcurrent protection of adjacent line for reducing operating
time of the stage 3 overcurrent protection.
When the primary operating current is in coordination with the stage 1 instantaneous overcurrent
protection at the next stage, the operating time limit of definite time overcurrent is:

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t＝t1+△t
Where:
t1 —— the fixed operating time of instantaneous overcurrent protection of the next stage of
the protection line, about 0.06~0.1s, or neglected sometimes;
△t—— time difference, the microprocessor based protection takes 0.3s.
When the operating current is in coordination with the stage 2 definite time overcurrent protection
at the next stage, the operating time of definite time overcurrent is:
t＝t2+△t
Where:
t2 —— the fixed operating time of the stage 2 overcurrent protection of the next stage of the
protection line;
△t——time difference, the microprocessor based protection takes 0.3s.
4.1.5.5 IDMT Overcurrent Protection Setting Calculation
Due to the operation time is longer if the fault is closer to the power supply source, the IDMT
overcurrent protection is used to shorten the operation time. Fixed twelve types of inverse curves
and one programmable inverse curve are supported in this relay. For more details about the
inverse time characteristic, see the “Instruction Manual” of the PCS-9611 feeder relay.
The setting [50/51P4.Opt_Curve] can be used to select the expected curve.
Setting Value Standard Time Characteristic k α C

0 Definite Time × × ×
1 IEC Standard Inverse 0.14 0.02 0.00
2 IEC Very Inverse 13.5 1.00 0.00
3 IEC Extremely In verse 80.0 2.00 0.00
4 IEC Short Time Inverse 0.05 0.04 0.00
5 IEC Long Time Inverse 120.0 1.00 0.00
6 IEEE (ANSI) Extremely In verse 28.20 2.00 0.1217
7 IEEE (ANSI) Very Inverse 19.61 2.00 0.491
8 IEEE (ANSI) Inverse 0.0086 0.02 0.0185
9 IEEE (ANSI) Moderately In verse 0.0515 0.02 0.114
10 IEEE (ANSI) Long Time Extremely Inverse 64.07 2.00 0.25
11 IEEE (ANSI) Long Time Very In verse 28.55 2.00 0.712
12 IEEE (ANSI) Long Time Inverse 0.086 0.02 0.185
13 User Programmable
The current setting of the IDMT current is calculated as below.
K rel K ss
I op . 1 
IV
I L . max
K re

Date: 2016-09-28
Where:
Krel —— reliable coefficient (coordination coefficient), taking 1.2;
Kre —— returning coefficient, taking 0.9~0.95;
Kss —— self-starting coefficient, determined by specific connection and load property via
network;
IL.max —— maximal load current through protection area.
4.1.6 Relevant Setting Sheet
No. Menu text Explanation Range Step

The voltage s etting of the negative sequence
1 50/51P.U2_VCE 2~70V 0.001V
voltage blocking element (phase voltage)
The voltage setting of the low voltage blocking
2 50/51P.Upp_VCE 2~120V 0.001V
element (phase-to-phase voltage)
The relay characteristic angle for the directional
3 50/51P.RCA -180°~179° 1°
overcurrent protection
The logic setting of the function which can block
4 50/51P.En_VTS_Blk the OC protection related voltage measurement 0~1 1
when the voltage transformer is failed
The percent setting of the harmonic blocking
5 50/51P.K_Hm2 0.05~1.00 0.001
element for OC protection
The current setting for releasing the harmonic
6 50/51P.I_Rls_HmBlk 0.05In~30In 0.001A
blocking element of the OC protection
The setting is used to select the harmonic
7 50/51P.Opt_Hm_Blk 1~3 1
blocking mode of the OC protection
The current s etting of the stage 1 overcurrent
8 50/51P1.I_Set 0.05In~30In 0.001A
protection
The time setting of the stage 1 overcurrent
9 50/51P1.t_Op 0~100s 0.001s
protection
The logic setting of the voltage control element for
10 50/51P1.En_VCE 0~1 1
the stage 1 overcurrent protection
The setting is used to select the directional mode
11 50/51P1.Opt_Dir 0~2 1
for the stage 1 overcurrent protection
The logic setting of the harmonic blocking element
12 50/51P1.En_Hm_Blk 0~1 1
The logic setting of the stage 2 overcurrent
13 50/51P1.En 0~1 1
protection
The output matrix setting of the stage 1 0x00000000 ~
14 50/51P1.OutMap 1
overcurrent protection 0x7FFFFFFF
15 50/51P2.I_Set 0.05In~30In 0.001A
protection
16 50/51P2.t_Op 0~100s 0.001s
protection

Date: 2016-09-28

17 50/51P2.En_VCE 0~1 1
18 50/51P2.Opt_Dir 0~2 1
19 50/51P2.En_Hm_Blk 0~1 1
20 50/51P2.En 0~1 1
protection
21 50/51P2.OutMap 1
22 50/51P3.I_Set 0.05In~30In 0.001A
protection
23 50/51P3.t_Op 0~100s 0.001s
protection
24 50/51P3.En_VCE 0~1 1
The setting is used to s elect the directional mode
25 50/51P3.Opt_Dir 0~2 1
26 50/51P3.En_Hm_Blk 0~1 1
27 50/51P3.En 0~1 1
protection
28 50/51P3.OutMap 1
29 50/51P4.I_Set 0.05In~30In 0.001A
protection
30 50/51P4.t_Op 0~100s 0.001s
protection
31 50/51P4.En_VCE 0~1 1
32 50/51P4.Opt_Dir 0~2 1
33 50/51P4.En_Hm_Blk 0~1 1
34 50/51P4.En 0~1 1
protection
35 50/51P4.OutMap 1
The setting is for selecting the inverse time
36 50/51P4.Opt_Curve 0~13 1
characteristic curve for OC4 protection
The time multiplier setting of the IDMT overcurrent
37 50/51P4.TMS 0.05~100.0 0.001
protection
The minimum operation time setting of the IDMT
38 50/51P4.tmin 0~100s 0.001s

Date: 2016-09-28
39 50/51P4.K Constant “k” for the IDMT o vercurrent protection 0.001~120.0 0.0001
40 50/51P4.C Constant “C” for the IDMT o vercurrent protection 0.00~1.00 0.0001
41 50/51P4.Alpha Constant “α” for the IDMT o vercurrent protection 0.01~3.00 0.0001
4.2 Zero Sequence Overcurrent Protection
The equipment provides two group earth fault overcurrent protection, each one has four stages of
zero sequence overcurrent protections to reflect the ground fault of the system. The zero
sequence current can be obtained from zero-sequence current transformer or calculated from the
equipment. Each stage has independent current and time settings.
4.2.1 Principle of Zero Sequence Overcurrent Protection
The selection of primary working current of zero sequence current transformers with zero
sequence current protection is related to the grounding methods of neutral point. The system
insulated from neutral point as well as the neutral point is grounded by arc suppression coil. When
the power grid is in single-phase grounding, the fault current is the capacitance current of the
system to ground, and then the zero sequence current obtained from calculation is relatively small.
The method of compensation damage, namely the short-time disconnection of arc suppression
coil, is used to realize the selective system. The system is always selected in selectivity and
sensitivity conditions.
When the neutral solidly grounded system or grounded system through a small resistor is in the
grounded short circuit, a large zero sequence current component will be generated, and the
zero-sequence component can be utilized to form protection as a kind of protection for main
grounded short circuit.

Date: 2016-09-28
4.2.2 Zero Sequence Overcurrent Protection Logic Diagram
I01 > [50/51G1.3I0_Set]

50/51G1.Dir & [50/51G1.St]
50/51G1.HmBlk
tROC1 0
[50/51G1.En] & [50/51G1.Op]
[50/51G1.En1]
[50/51G1.Blk]
I01 > [50/51G2.3I0_Set]

50/51G2.Dir & [50/51G2.St]
50/51G2.HmBlk
tROC2 0
[50/51G2.En] & [50/51G2.Op]
[50/51G2.En1]
[50/51G2.Blk]
I01 > [50/51G3.3I0_Set]

50/51G3.Dir & [50/51G3.St]
50/51G3.HmBlk
tROC3 0
[50/51G3.En] & [50/51G3.Op]
[50/51G3.En1]
[50/51G3.Blk]
I01 > [50/51G4.3I0_Set]

50/51G4.Dir & [50/51G4.St]
50/51G4.HmBlk
[50/51G4.En] tROC4 0
& [50/51G4.Op]
[50/51G4.En1]
[50/51G4.Opt_Curve] = 0
[50/51G4.Blk]
Figure 4.2-1 Logic diagram of the No.1 zero sequence overcurrent protection
Above figure shows the logic diagram of the No.1 stage 1 zero sequence overcurrent protection,
for the details about the zero sequence overcurrent protection logic, see the “Instruction Manual”
of the PCS-9611 feeder relay.
4.2.3 Zero Sequence Overcurrent Protection Setting Calculation
4.2.3.1 Stage 1 Zero Sequence Overcurrent Protection Setting Calculation
The current setting of the stage 1 zero sequence current is used as instantaneous protection and it
is set by maximum three times of zero sequence current avoiding the ground fault at the end of
this line.
I op . 1  K rel 3 I 0 . max
I
Where:
K K  1 .3
rel
—— reliability coefficient, taken as rel
;
I 0 . max
—— maximum zero sequence current measured at the protection installation site when
the external grounding of protection zone is at short circuit fault.

Date: 2016-09-28
The demo system for the setting calculation is in Figure 2.1-1.
Equivalent reactance of the system:
X  X  5 .4  X  8
S1 S2
， S0
Impedance of the AB line:
X  X  0 . 4  20  8  X  1 . 4  20  28 
L 11 L 12 ， L 10
The zero sequence current in case of short circuit at “d1” point is:
X 1  X  X  X  13 . 4  X  X  X  36 
2 s1 L 11
， 0 s0 L 10
 X 1 Ik0  Ik0
(1 ) (1 . 1 )
X 0
Because and , when single-phase grounded short circuit is used as
setting condition, the two-phase grounded short circuit is used as check condition for sensitivity.
35000
Ik0   321 . 78 A
(1 )
3  (13 . 4  13 . 4  36 )
3 I k 0  3  321 . 78  965 . 34 A
(1 )
The operating setting can be set as:
1 . 3  965 . 34
(1 )
K rel 3 I k 0
I op . 1    10 . 46 A
I
600 / 5 600 / 5
It is set according to the sensitivity coefficient that is not less than the required coefficient in case
that there is ground fault at the end of this line, and it should be coordinated with the stage 1 and
stage 2 zero sequence protection of the adjacent line, in which the operating time is set according
to the coordination relation.
I op . 1  K rel K b . max I op . 2
II I
Where:
K K  1 .1 ~ 1 .3
rel
—— reliability coefficient, taken as rel
;
I
I op . 2
—— operating value of zero sequence current section I or II of adjacent lines;
K b . max
—— Maximum branch coefficient.

Date: 2016-09-28
When a grounded short circuit fault occurs at “d2” point.
X 1  X 2
 X s1
 X L 11
X L 21
 25 . 4 
X 0
 X s0
 X L 10
 X L 20
 78 
3  35000
3Ik0   470 . 68 A
(1 )
3  ( 25 . 4  25 . 4  78 )
The operating setting of the stage 1 zero sequence overcurrent protection at area B is as below.
I op , 2  1 . 3  470 . 68  611 . 88 A
I
The operating setting of the stage 2 zero sequence overcurrent protection at area A is as below.
I
K rel 3 I op , 2 1 . 15  611 . 88
3 I 0 zd , II    5 . 86 A
600 / 5 600 / 5
The stage 3 zero sequence overcurrent protection is used as standby protection for ground fault of
this line through resistor and ground fault of adjacent elements, and its primary current value
should not be more than 300A. Under the condition of avoidance from the maximum unbalance
current of three-phase short circuit at other sides of the transformer at the end of this line, it is
necessary to meet the requirement that the fault at the end of the adjacent lines has coefficient of
sensitivity; it is necessary to check the coordination condition between the stage 2 and 3 zero
sequence overcurrent protections of adjacent lines, and the operating time is set according to the
coordination relation.
I op . 1  K rel K aper K st f i I op . 1
III (3)
Where:
K K  1 .1
rel
—— Reliability coefficient, taken as rel
;
K aper
—— A periodic component coefficient, taken as 1.5~2.0;
K st
—— same type coefficient, taken as 0.5 when the transformer is of the same type;
fi
—— amplitude error of transformer, generally taken as 0.1;
(3)
I op . 1
—— three-phase short circuit current at the end of this line.

Date: 2016-09-28
The three-phase short circuit current at d1 point is 1506.5A. Not considering the open-phase
operation condition, it is set while avoiding the maximum unbalance current at the end .
I op ,1  1 . 25  1 . 5  0 . 5  0 . 1  1506 . 5  141 . 23 A
III
The operating setting of the stage 3 zero sequence overcurrent protection at area A can be set as:
III
I op ,1 611 . 88
3 I 0 zd , III    1 . 18 A
600 / 5 600 / 5

The relay characteristic angle for the No.1
1 50/51G.RCA -180°~179° 1°
directional zero sequence overcurrent protection
The logic setting of the function which blocks the
2 50/51G.En_VTS_Blk 1ROC protection related voltage measurement 0~1 1
The percent setting of the harmonic blocking
3 50/51G.K_Hm2 0.05~1.00 0.001
element for the No.1 ROC protection
The current setting for releasing the harmonic
4 50/51G.3I0_Rls_HmBlk 0.05In~30In 0.001A
blocking element of the No.1 ROC protection
The current s etting of the No.1 stage 1 zero
5 50/51G1.3I0_Set 0.05In~30In 0.001A
sequence overcurrent protection
The time setting of the No.1 stage 1 zero
6 50/51G1.t_Op 0~100s 0.001s
7 50/51G1.Opt_Dir 0~2 1
for the No.1 ROC1 protection
8 50/51G1.En_Hm_Blk 0~1 1
The logic setting of the No.1 stage 1 zero
9 50/51G1.En 0~1 1
The output matrix setting of the No.1 stage 1 zero 0x00000000 ~
10 50/51G1.OutMap 1
sequence overcurrent protection 0x7FFFFFFF
11 50/51G2.3I0_Set 0.05In~30In 0.001A
12 50/51G2.t_Op 0~100s 0.001s
13 50/51G2.Opt_Dir 0~2 1
14 50/51G2.En_Hm_Blk 0~1 1
15 50/51G2.En 0~1 1

Date: 2016-09-28

16 50/51G2.OutMap 1
17 50/51G3.3I0_Set 0.05In~30In 0.001A
18 50/51G3.t_Op 0~100s 0.001s
19 50/51G3.Opt_Dir 0~2 1
20 50/51G3.En_Hm_Blk 0~1 1
21 50/51G3.En 0~1 1
22 50/51G3.OutMap 1
23 50/51G4.3I0_Set 0.05In~30In 0.001A
24 50/51G4.t_Op 0~100s 0.001s
25 50/51G4.Opt_Dir 0~2 1
26 50/51G4.En_Hm_Blk 0~1 1
27 50/51G4.En 0~1 1
28 50/51G4.OutMap 1
29 50/51G4.Opt_Curve 0~13 1
characteristic curve for the No.1 ROC4 protection
The time multiplier setting of the No.1 zero
30 50/51G4.TMS 0.05~100.0 0.001
sequence IDMT o vercurrent protection
The minimum operation time setting of the No.1
31 50/51G4.tmin 0~100s 0.001s
zero sequence IDMT overcurrent protection
Constant “k” for the No.1 zero sequence IDMT
32 50/51G4.K 0.001~120.0 0.0001
Constant “C” for the No.1 zero sequence IDMT
33 50/51G4.C 0.00~1.00 0.0001
Constant “α” for the No.1 zero sequence IDMT
34 50/51G4.Alpha 0.01~3.00 0.0001
4.3 Negative Sequence Overcurrent Protection
The equipment provides two stages of negative sequence overcurrent protection with definite time,
and the current setting and time setting can be respectively set to reflect the unsymmetrical faults.

Date: 2016-09-28
The stage 2 negative sequence overcurrent can be set to definite time or Inverse definite minimum
time.
4.3.1 Principle of Negative Sequence Overcurrent Protection
When the negative sequence current is greater than the setting value, this protection will trip.
4.3.2 Negative Sequence Overcurrent Protection Logic Diagram
I2 > [50/51Q1.I2_Set] [50/51Q1.St]

[50/51Q1.En] tNOC1 0
& [50/51Q1.Op]
[50/51Q1.En1]
[50/51Q1.Blk]
I2 > [50/51Q2.I2_Set]
[50/51Q2.St]
[50/51Q2.En]
IDMT
[50/51Q2.En1] & [50/51Q2.Op]
[50/51Q2.Blk]
[50/51Q2.Opt_Curve] = 0
Figure 4.3-1 Logical diagram of the stage 1 NOC protection and IDMT NOC protection
The stage 2 negative sequence overcurrent protection also can be set with inverse definite
minimum time (IDMT) characteristic. It has the same inverse time characteristic with the IDMT
overcurrent protection and the setting [50/51Q2.Opt_Curve] can be used to select the expected
curve.
For the details about the negative sequence overcurrent protection logic, see the “Instruction
Manual” of the PCS-9611 feeder relay.
4.3.3 Negative Sequence Overcurrent Protection Setting Calculation
4.3.3.1 Negative Sequence Overcurrent Protection Setting Calculation
When two-phase short circuit is happened, the following formula is satisfied.
1

(2) (3)
I2 I
2
To the line protection, only when the pickup current of the negative sequence overcurrent element
is equal to 0.5 times of the pickup setting of phase overcurrent element fixedly, the relative
sensitivity coefficient of two-phase short circuit is equal to 1. During setting calculation, the
coordination of sensitivity can be carried out only according to the three -phase short circuit and the
overcurrent protection with adjacent lines.
The setting of negative sequence overcurrent protection can be referred to the phase overcurrent
setting.
I op  K n I L . max
Where:

Date: 2016-09-28
I L . max
—— Maximum value of three-phase short circuit current of this line;
K n
—— Negative sequence coefficient, taken as 0.5.
Operating time delay: to be identical with the time setting of the phase overcurrent protection.
With respect to the fault at the same point, the protection with high sensitivity and quick fixed
action between the phase overcurrent protection and negative sequence overcurrent protection
takes precedence to trip.
According to the calculation results in Section 4.1.5, the setting of the stage 1 negative sequence
overcurrent protection is 15.69×0.5=7.85A; the setting of the stage 2 negative sequence
overcurrent protection is 12.37×0.5=6.19A.

The current setting of the stage 1 negative
1 50/51Q1.I2_Set 0.05In~4In 0.001A
The time setting of the stage 1 negative sequence
2 50/51Q1.t_Op 0~100s 0.001s
The logic setting of the stage 1 negative sequence
3 50/51Q1.En 0~1 1
The output matrix setting of the stage 1 negative 0x00000000 ~
4 50/51Q1.OutMap 1
The current s etting of the stage 2 negative
5 50/51Q2.I2_Set 0.05In~4In 0.001A
The time setting of the stage 2 negative sequence
6 50/51Q2.t_Op 0~100s 0.001s
The logic setting of the stage 2 negative sequence
7 50/51Q2.En 0~1 1
The output matrix setting of the stage 2 negative 0x00000000 ~
8 50/51Q2.OutMap 1
9 50/51Q2.Opt_Curve 0~13 1
characteristic curve for the NOC2 protection
The time multiplier setting of the negative
10 50/51Q2.TMS 0.05~100.0 0.001
sequence IDMT o vercurrent protection
The minimum operation time setting of the
11 50/51Q2.tmin 0~100s 0.001s
negative sequence IDMT overcurrent protection
Constant “k” for the negative sequence IDMT
12 50/51Q2.K 0.001~120.0 0.0001
Constant “C” for the negative sequence IDMT
13 50/51Q2.C 0.00~1.00 0.0001
Constant “α” for the negative sequence IDMT
14 50/51Q2.Alpha 0.01~3.00 0.0001

Date: 2016-09-28
4.4 Sensitive Earth Fault Protection
One input current transformer is dedicated to the sensitive earth fault (SEF) protection. The input
CT is designed specially to operate at very low current magnitudes.
4.4.1 Principle of SEF Protection
When the sensitive earth fault current is greater than the setting value, this protection will trip.
4.4.2 SEF Protection Logic Diagram
I0S > [50/51SEF1.3I0_Set]

[50/51SEF1.St]
50/51SEF1.Dir
tSEF1 0
[50/51SEF1.En] & [50/51SEF1.Op]
[50/51SEF1.En1]
[50/51SEF1.Blk]
I0S > [50/51SEF4.3I0_Set]

50/51SEF4.Dir [50/51SEF4.St]
[50/51SEF4.En] IDMT
& [50/51SEF4.Op]
[50/51SEF4.En1]
[50/51SEF4.Blk]
[50/51SEF4.Opt_Curve] = 0
Figure 4.4-1 Logic diagram for the stage 1 SEF protection and IDMT SEF protection
The stage 4 sensitive earth fault protection also can be used as inverse definite minimum time
(IDMT) sensitive earth fault protection. It has the same inverse time characteristic with the IDMT
overcurrent protection and the setting [50/51SEF4.Opt_Curve] can be used to select the expected
curve.
For the details about the SEF protection logic, see the “Instruction Manual” of the PCS-9611
feeder relay.
4.4.3 SEF Protection Setting Calculation
4.4.3.1 SEF Protection Setting Calculation
The current setting of the SEF protection is set according to the capacitor current when a
single-phase fault is happened at the end of the line, and the current setting can ensure the
sensitivity coefficient is not less than 1.2. The method for the time setting is same with the stage 1
zero sequence overcurrent protection.
(1 )
I0
I op 
K lm
Where:
I 0 —— The capacitor current when a single-phase fault is happened at the end of the line;
(1 )

Date: 2016-09-28
K lm —— Sensitivity coefficient, taken as K lm  1 . 2 .

The relay characteristic angle for the directional
1 50/51SEF.RCA -180°~179° 1°
sensitive earth fault protection
The logic setting of the function which blocks the
2 50/51SEF.En_VTS_Blk SEF protection related voltage measurement 0~1 1
The current setting of the stage 1 sensitive earth
3 50/51SEF1.3I0_Set 0.005~0.4A 0.001A
fault protection
The time setting of the stage 1 sensitive earth
4 50/51SEF1.t_Op 0~100s 0.001s
fault protection
5 50/51SEF1.Opt_Dir 0~2 1
for the stage 1 SEF protection
The logic setting of the stage 1 sensitive earth
6 50/51SEF1.En 0~1 1
fault protection
The output matrix setting of the stage 1 sensitive 0x00000000 ~
7 50/51SEF1.OutMap 1
earth fault protection 0x7FFFFFFF
8 50/51SEF2.3I0_Set 0.005~0.4A 0.001A
fault protection
9 50/51SEF2.t_Op 0~100s 0.001s
fault protection
10 50/51SEF2.Opt_Dir 0~2 1
11 50/51SEF2.En 0~1 1
fault protection
13 50/51SEF3.3I0_Set 0.005~0.4A 0.001A
fault protection
14 50/51SEF3.t_Op 0~100s 0.001s
fault protection
15 50/51SEF3.Opt_Dir 0~2 1
16 50/51SEF3.En 0~1 1
fault protection
18 50/51SEF4.3I0_Set 0.005~0.4A 0.001A
fault protection

Date: 2016-09-28

19 50/51SEF4.t_Op 0~100s 0.001s
fault protection
20 50/51SEF4.Opt_Dir 0~2 1
21 50/51SEF4.En 0~1 1
fault protection
23 50/51SEF4.Opt_Curve 0~13 1
characteristic curve for SEF4 protection
The time multiplier setting of the IDMT sensitive
24 50/51SEF4.TMS 0.05~100.0 0.001
earth fault protection
The minimum operation time setting of the IDMT
25 50/51SEF4.tmin 0~100s 0.001s
sensitive earth fault protection
Constant “k” for the IDMT sensitive earth fault
26 50/51SEF4.K 0.001~120.0 0.0001
protection
Constant “C” for the IDMT sensitive earth fault
27 50/51SEF4.C 0.00~1.00 0.0001
protection
Constant “α” for the ID MT sensitive earth fault
28 50/51SEF4.Alpha 0.01~3.00 0.0001
protection
4.5 Breaker Failure Protection
4.5.1 Principle of Breaker Failure Protection
The circuit breaker failure protection is specially applied for re-tripping the circuit breaker, when the
relay has transmitted the tripping command to the circuit breaker, but the fault is sti ll existed in the
system or the circuit breaker is still closed after an appointed time delay.
For some special faults (for example, mechanical protection or overvoltage protection operating),
maybe the faulty current is very small and the current criterion of the breaker failure protection can
not be satisfied, in order to make the breaker failure protection can operate in such a situation, the
auxiliary contact of the circuit breaker can be taken into account. So this relay provides four criteria
logics to meet different requirements.
Four criteria logics based on the phase currents and the circuit breaker state (based on the binary
input [BI_52b]) are selectable through the setting [50BF.Opt_LogicMode]. The criteria conditions
are list as below: (A) the maximum phase current is greater than the setting [50BF.I_Set]; (B) the
circuit breaker is still closed ([BI_52b] = 0).
Setting Value Criteria Condition Logic

1 Ipmax > [50BF.I_Set] Only A
2 NOT([BI_52b]) Only B
3 (Ipmax > [50BF.I_Set]) OR (NOT([BI_52b])) A OR B
4 (Ipmax > [50BF.I_Set]) AND (NOT([BI_52b])) A AND B

Date: 2016-09-28
4.5.2 Breaker Failure Protection Logic Diagram
Ia > [50BF.I_Set] 1 ONLY A

Ib > [50BF.I_Set] A 2 ONLY B
Ic > [50BF.I_Set] 3 A OR B
[BI_52b] B 4 A AND B [50BF.St]
[50BF.Opt_LogicMode]
tBFP1 0
50BF.In_Init & [50BF.Op]
[50BF.En]
[50BF.En1]
tBFP2 0
[50BF.Blk] & [50BF.ReTrp]
[50BF.En_ReTrp]
Figure 4.5-1 Logic diagram of the breaker failure protection
For the details about the breaker failure protection logic, see the “Instruction Manual” of the
PCS-9611 feeder relay.
4.5.3 Breaker Failure Initiation Setting Calculation
4.5.3.1 Current Setting Calculation
The current setting of the breaker failure initiation is set to be greater than the capacitor current
when the line is energized without any load, and it can ensure the sensitivity coefficient is not less
than 1.3 and to be greater than the load current in normal operation situation of the line.
The time setting of the breaker failure initiation is set as short as possible on the premise that the
protection selectivity is ensured. The time setting is calculated as following formula.
t  t0  t B   t
Where:
t0 —— the tripping time of the circuit breaker, taken as 0.03~0.05s;
tB —— the operation dropdown time of the protection, taken as 0.02~0.03s;
△t —— time difference, taken as 0.15~0.20s.

The current s etting of the breaker failure
1 50BF.I_Set 0.05In~5.0In 0.001A
protection
2 50BF.t_Op The time setting of the breaker failure protection 0~100s 0.001s
The re-trip time setting of the breaker failure
3 50BF.t_ReTrp 0~100s 0.001s
protection
The setting for selecting the criteria logic of the
4 50BF.Opt_LogicMode 1~4 1
breaker failure protection
5 50BF.En The logic setting of the breaker failure protection 0~1 1

Date: 2016-09-28
The logic setting of the re-trip function of the

6 50BF.En_ReTrp 0~1 1
breaker failure protection
The output matrix setting of the breaker failure 0x00000000 ~
7 50BF.OutMap 1
protection 0x7FFFFFFF
The output matrix setting of the re-trip function of 0x00000000 ~
8 50BF.OutMap_ReTrp 1
the breaker failure protection 0x7FFFFFFF
4.6 Overvoltage Protection
This relay provides two-stage overvoltage protection with definite time delay characteristics. The
two stages have same protection logics.
4.6.1 Principle of Overvoltage Protection

After the load shedding due to the system fault, the busbar voltage is increased because of the
superfluous reactive power in the system. So this relay provides overcurrent protection for
avoiding the excessive voltage.
4.6.2 Overvoltage Protection Logic Diagram
Uab > [59P1.U_Set]

Ubc > [59P1.U_Set] & &
Uca > [59P1.U_Set]
Uab > [59P1.U_Set]
Ubc > [59P1.U_Set] &
Uca > [59P1.U_Set]
[59P.Opt_1P/3P]
[59P.Opt_Up/Upp]
Ua > [59P1.U_Set]
Ub > [59P1.U_Set] & &
Uc > [59P1.U_Set]
Ua > [59P1.U_Set] &
Ub > [59P1.U_Set] & [59P1.St]
Uc > [59P1.U_Set]
[59P1.En1] tOV1 0
& [59P1.Op]
[59P1.Blk]
[59P1.En]
tOV1 0
& [59P1.Alm]
[59P1.En_Alm]
Figure 4.6-1 Logic diagram of the stage 1 overvoltage protection
For the details about the overvoltage protection logic, see the “Instruction Manual” of the
4.6.3 Overvoltage Protection Setting Calculation
4.6.3.1 Overvoltage Protection Setting Calculation
The voltage setting of the overvoltage protection is calculated as below.

Date: 2016-09-28
U op
 K rel
U N
Where:
UN —— the rated voltage of the line;
Krel —— the reliable coefficient, taken as 1.2.
The operation time setting can be set as 0.5s.

The setting for s electing the overvoltage
1 59P.Opt_1P/3P 0~1 1
protection calculation method
The setting for selecting the voltage input mode
2 59P.Opt_Up/Upp 0~1 1
for the overvoltage protection
The voltage setting of the stage 1 overvoltage
3 59P1.U_Set 57.7~200V 0.001V
protection
The time setting of the stage 1 overvoltage
4 59P1.t_Op 0~100s 0.001s
protection
The dropout coefficient setting of the stage 1
5 59P1.K_DropOut 0.93~0.97 0.001
overvoltage protection
The logic setting of the stage 1 overvoltage
6 59P1.En 0~1 1
protection
The logic setting of the stage 1 overvoltage alarm
7 59P1.En_Alm 0~1 1
function
8 59P1.OutMap 1
overvoltage protection 0x7FFFFFFF
The voltage setting of the stage 2 overvoltage
9 59P2.U_Set 57.7~200V 0.001V
protection
The time setting of the stage 2 overvoltage
10 59P2.t_Op 0~100s 0.001s
protection
11 59P2.K_DropOut 0.93~0.97 0.001
The logic setting of the stage 2 overvoltage
12 59P2.En 0~1 1
protection
The logic setting of the stage 2 overvoltage alarm
13 59P2.En_Alm 0~1 1
function
14 59P2.OutMap 1
overvoltage protection 0x7FFFFFFF
4.7 Undervoltage Protection
This relay provides two-stage undervoltage protection with definite time delay characteristics. The

Date: 2016-09-28
two stages have same protection logics.
4.7.1 Principle of Undervoltage Protection
The undervoltage protection can use the phase voltage or phase -to-phase voltage to operate
through a relevant setting. The single-phase criterion or three-phase criterion is selectable through
another relevant setting.
The circuit breaker state is taken into account in the undervoltage protection logic; when the circuit
breaker is opened, the undervoltage protection isn’t in service. If the fast voltage transformer
supervision function detects the busbar voltage transformer is failed, the undervoltage protection
is blocked. And if the system voltage is lost, the undervoltage protection is also blocked.
4.7.2 Undervoltage Protection Logic Diagram
Uab < [27P1.U_Set]

Ubc < [27P1.U_Set] & &
Uca < [27P1.U_Set]
Uab < [27P1.U_Set]
Ubc < [27P1.U_Set] &
Uca < [27P1.U_Set]
[27P.Opt_1P/3P]
[27P.Opt_Up/Upp]
Ua < [27P1.U_Set]
Ub < [27P1.U_Set] & &
Uc < [27P1.U_Set]
Ua < [27P1.U_Set]
Ub < [27P1.U_Set] & &
Uc < [27P1.U_Set]
[BI_52b] [27P1.St]
27P1.LostVolt
tUV1 0
[27P1.En1] & [27P1.Op]
[27P1.Blk]
[27P1.En]
tUV1 0
& [27P1.Alm]
[27P1.En_Alm]
Figure 4.7-1 Logic diagram of the stage 1 undervoltage protection
For the details about the undervoltage protection logic, see the “Instruction Manual” of the
4.7.3 Undervoltage Protection Setting Calculation
4.7.3.1 Undervoltage Protection Setting Calculation
The voltage setting of the undervoltage protection is calculated as below.
U op
 K rel
U N
Where:

Date: 2016-09-28
Krel —— the reliable coefficient, taken as 0.7.
Because the undervoltage is always used as backup protection, the operation time setting can be
set as greater than 1.5s.

The setting for s electing the undervoltage
1 27P.Opt_1P/3P 0~1 1
protection calculation method
The setting for selecting the voltage input mode
2 27P.Opt_Up/Upp 0~1 1
for the undervoltage protection
The voltage setting of the stage 1 undervoltage
3 27P1.U_Set 2~120V 0.001V
protection
The time setting of the stage 1 undervoltage
4 27P1.t_Op 0~100s 0.001s
protection
5 27P1.K_DropOut 1.03~3.0 0.001
undervoltage protection
The logic setting of the stage 1 undervoltage
6 27P1.En 0~1 1
protection
7 27P1.En_Alm 0~1 1
alarm function
8 27P1.OutMap 1
undervoltage protection 0x7FFFFFFF
The voltage setting of the stage 2 undervoltage
9 27P2.U_Set 2~120V 0.001V
protection
The time setting of the stage 2 undervoltage
10 27P2.t_Op 0~100s 0.001s
protection
11 27P2.K_DropOut 1.03~3.0 0.001
undervoltage protection
12 27P2.En 0~1 1
protection
13 27P2.En_Alm 0~1 1
alarm function
14 27P2.OutMap 1
undervoltage protection 0x7FFFFFFF
4.8 SOTF Overcurrent Protection
4.8.1 Principle of SOTF Overcurrent Protection
The SOTF overcurrent protection includes phase SOTF overcurrent element and zero sequence
SOTF overcurrent protection.
When the busbar is energized, the phase SOTF overcurrent protection or the zero sequence
SOTF overcurrent protection will be put into service automatically for an appointed time delay

Date: 2016-09-28
[SOTF.t_En] after this relay detects the state change of the circuit breaker: from opened state to
closed state. If there is a fault on the busbar in the time delay [SOTF.t_En], the phase SOTF
overcurrent protection or the zero sequence SOTF overcurrent protection will be in service until
the fault is removed, and it will be out of service automatically when the fault detector resets;
otherwise the phase SOTF overcurrent protection or the zero sequence SOTF overcurrent
protection will be out of service automatically after the appointed time delay [SOTF.t_En].
4.8.2 SOTF Overcurrent Protection Logic Diagram
Ia > [50PSOTF.I_SetF]
Ib > [50PSOTF.I_SetF]
Ic > [50PSOTF.I_SetF]
[50PSOTF.En] & [50PSOTF.St]
[50PSOTF.En1]
tSOTFOC 0
[50PSOTF.Blk] & [50PSOTF.Op]
[79.Ready]
[SOTF.Opt_Mode]
&
0 tEnSOTF
[79.Close_3PSx] (x:1~4)
&
[50GSOTF.St]
SOTF.ManClsCB
0 tEnSOTF
tSOTFROC 0
I01 > [50GSOTF.3I0_Set] & [50GSOTF.Op]
[50GSOTF.En]
&
[50GSOTF.En1]
[50GSOTF.Blk]
Figure 4.8-1 Logic diagram of the SOTF protection
For the details about the SOTF protection logic, see the “Instruction Manual” of the PCS-9611
feeder relay.
4.8.3 SOTF Overcurrent Protection Setting Calculation
4.8.3.1 Phase SOTF Overcurrent Protection Setting Calculation
1. It is set for avoiding the maximum load current that flows through the busbar section.
I op  K rel I fh . max
Where:
Krel —— Reliability coefficient, Krel ≥ 1.5;
If h.max —— Maximum load current that flows through the busbar section.
2. When the bus has a phase-to-phase fault in the minimum operation mode, this protection
shall have adequate sensitivity.
(2)
I min
I op 
K lm
Where:

Date: 2016-09-28
Klm —— Reliability coefficient, Klm ≥ 1.5;
If h.max —— Minimum short circuit current that flows through the busbar section when the
bus has a two-phase fault in the minimum operation mode.
3. Time Setting Calculation
Due to such a protection need not coordinate with the operating time of other protections, the
time is taken as 0.05~0.10s.
4.8.3.2 Zero Sequence SOTF Overcurrent Protection Setting Calculation
1. When the bus has an earth fault in the minimum operation mode, this protection shall have
adequate sensitivity.
3 I 0 . min
I 0 . op 
K lm
Where:
Klm —— Reliability coefficient, Klm ≥ 1.5;
I0.min —— Minimum zero sequence current that flows through the busbar section when
the bus has an earth fault in the minimum operating mode.
2. Time Setting Calculation
Due to such a protection need not coordinate with the operating time of other protections, the
time is taken as 0.05~0.10s

1 SOTF.t_En The enabling time setting of the SOTF protection 0~100s 0.001s
The setting for s electing the acceleration tripping
2 SOTF.Opt_ Mode 0~1 1
mode of the SOTF protection
The current s etting of the SOTF o vercurrent
3 50PSOTF.I_Set 0.05In~30In 0.001A
protection
The time setting of the SOTF overcurrent
4 50PSOTF.t_Op 0~100s 0.001s
protection
The logic s etting of the SOTF o vercurrent
5 50PSOTF.En 0~1 1
protection
The output matrix setting of the SOTF o vercurrent 0x00000000 ~
6 50PSOTF.OutMap 1
The current setting of the zero sequence SOTF
7 50GSOTF.3I0_Set 0.05In~30In 0.001A
The time setting of the zero sequence SOTF
8 50GSOTF.t_Op 0~100s 0.001s

Date: 2016-09-28
The logic setting of the zero sequence SOTF

9 50GSOTF.En 0~1 1
The output matrix setting of the zero sequence 0x00000000 ~
10 50GSOTF.OutMap 1
SOTF o vercurrent protection 0x7FFFFFFF
4.9 Negative sequence Overvoltage Protection
This relay provides a one-stage negative sequence overvoltage protection with definite time delay
characteristic. The negative sequence voltage is self-calculated.
4.9.1 Principle of Negative Sequence Overvoltage Protection

On a healthy three-phase power system, the negative sequence voltage is nominally zero.
However, when an unbalance situation occurs on the primary system, the negative sequence
voltage is produced.
4.9.2 Negative Sequence Overvoltage Protection Logic Diagram
U2 > [59Q.U2_Set]
[59Q.St]
[59Q.En] tNOV 0
& [59Q.Op]
[59Q.En1]
[59Q.Blk]
Figure 4.9-1 Logic diagram of the NOV protection
For the details about the negative sequence overvoltage protection logic, see the “Instruction
Manual” of the PCS-9611 feeder relay.
4.9.3 Negative Sequence Overvoltage Protection Setting Calculation
4.9.3.1 Negative Sequence Overvoltage Protection Setting Calculation
The voltage setting of the negative sequence overvoltage protection is calculated as below.
U op
 K rel
U N
Where:
Krel —— the reliable coefficient.

The voltage setting of the negative sequence
1 59Q.U2_Set 2~120V 0.001V
The time setting of the negative sequence
2 59Q.t_Op 0~100s 0.001s

Date: 2016-09-28
The logic setting of the negative sequence

3 59Q.En 0~1 1
The output matrix setting of the negative 0x00000000 ~
4 59Q.OutMap 1
sequence overvoltage protection 0x7FFFFFFF
4.10 Zero sequence Overvoltage Protection
This relay provides a two-stage zero sequence overvoltage protection with definite time delay
characteristics.
4.10.1 Principle of Zero Sequence Overvoltage Protection

On a healthy three-phase power system, the addition of each of the three-phase to earth voltages
is nominally zero. However, when an earth fault occurs on the primary system, the balance is
upset and a residual voltage is produced. Hence, a zero sequence overvoltage protection can be
used to offer earth fault protection on such a system.
The residual voltage could be measured at the secondary terminals of a voltage transformer
having a “broken delta” secondary connection, or it can be calculated from the three phase
voltages; which is decided by the setting [Opt_3U0].
4.10.2 Zero Sequence Overvoltage Protection Logic Diagram
U0 > [59G1.3U0_Set]
[59G1.St]
[59G1.En] tROV1 0
& [59G1.Op]
[59G1.En1]
[59G1.Blk]
Figure 4.10-1 Logic diagram of the stage 1 ROV protection
For the details about the zero sequence overvoltage protection logic, see the “Instruction Manual”
4.10.3 Zero Sequence Overvoltage Protection Setting Calculation
4.10.3.1 Zero Sequence Overvoltage Protection Setting Calculation
The voltage setting of the zero sequence overvoltage protection is calculated as below.
U op
 K rel
U N
Where:
Krel —— the reliable coefficient.

Date: 2016-09-28

The voltage setting of the stage 1 zero sequence
1 59G1.3U0_Set 2~160V 0.001V
The time setting of the stage 1 zero sequence
2 59G1.t_Op 0~100s 0.001s
The logic setting of the stage 1 zero sequence
3 59G1.En 0~1 1
The output matrix setting of the stage 1 zero 0x00000000 ~
4 59G1.OutMap 1
The voltage setting of the stage 2 zero sequence
5 59G2.3U0_Set 2~160V 0.001V
The time setting of the stage 2 zero sequence
6 59G2.t_Op 0~100s 0.001s
The logic setting of the stage 2 zero sequence
7 59G2.En 0~1 1
The output matrix setting of the stage 2 zero 0x00000000 ~
8 59G2.OutMap 1
4.11 Thermal Overload Protection
4.11.1 Principle of Thermal Overload Protection

The relay incorporates a current based thermal replica, using load current to model heating and
cooling of the protected plant.
The heat generated within an item of the plant, such as a cable or a transformer, is the resistive
2
loss (Ι R×t). Thus, heating is directly proportional to current squared. The thermal time
characteristic used in the relay is therefore based on current squared, integrated over time. The
relay automatically uses the largest phase current for input to the thermal model.
Equipment is designed to operate continuously at a temperature corresponding to its full load

rating, where heat generated is balanced with heat dissipated by radiation etc.
This relay provides a thermal overload model which is based on the IEC60255-8 standard. For the
details about the modes of the thermal overload protection, see the “Instruction Manual” of the

Date: 2016-09-28
4.11.2 Thermal Overload Protection Logic Diagram
Imax_rms > [49.K_Trp]×[49.Ib_Set]

[49.St]
[49.Blk] Thermal
[49.En1]
& Accumulator [49.Op]
CLR
[49.En_Trp]
[49.Clr]
Imax_rms > [49.K_Alm]×[49.Ib_Set]

Thermal
[49.Blk] & Accumulator [49.Alm]
CLR
[49.En_Alm]
[49.Clr]
Figure 4.11-1 Logic diagram of the thermal overload protection
For the details about the thermal overload protection logic, see the “Instruction Manual” of the
4.11.3 Thermal Overload Protection Setting Calculation
4.11.3.1 Thermal Overload Protection Setting Calculation
1. [49.Ib_Set] is the base current, generally recommended to be set equal to rated current of the
transformer.
2. [49.K_Trp] is the thermal overload coefficient which shall be set as actually req uired, and
generally, 1.2~1.5.
3. [49.K_ Alm] shall be set as actually required, generally set less than [49.K_Trp].

The reference current s etting of the thermal
1 49.Ib_Set 0.05In~3.0In 0.001A
overload protection
The time constant s etting of the IDMT o verload
2 49.Tau 10~6000s 0.001s
protection
The factor setting of the thermal overload
3 49.K_Trp protection which is associated to the thermal state 1.0~3.0 0.001
formula
The factor setting of the thermal overload alarm
4 49.K_Alm element which is associated to the thermal state 1.0~3.0 0.001
formula
The logic setting of the thermal overload
5 49.En_Trp 0~1 1
protection for tripping
The logic setting of the thermal overload
6 49.En_Alm 0~1 1
protection for alarming
The output matrix setting of the thermal overload 0x00000000 ~
7 49.OutMap 1

Date: 2016-09-28
4.12 Auto-recloser
4.12.1 Principle of Auto-recloser

This relay can support up to 4-shot auto-recloser. This relay will initiate the auto-recloser for fault
clearance by the phase overcurrent protection, the earth fault protection etc. (which can be
configured through PCS-PC). An auto-reclosing cycle can be internally initiated by operation of a
protection element or externally by a separate protection device, provided the circuit breaker (CB)
is closed until the instant of protection operation. At the end of the dead time of each shot, if all the
auto-reclosing conditions are satisfied, a circuit breaker close signal is given. The auto-reclosing
output time pulse width is configurable through the setting [79.t_DDO_AR].
The system conditions to be met for closing are that the system voltages are in synchronism or
dead line/live busbar or live line/dead busbar conditions exist, indicated by the internal check
synchronism element and that the circuit breaker closing spring, or other energy source, is fully
charged indicated from the binary input [BI_LowPres_Cls]. The CB close signal is cut-off when the
circuit breaker is closed.
If the CB position check function is enabled (the setting [79.En_FailChk] is set as “1”), the
auto-recloser detects the CB position in the period [79.t_Fail] after the auto -reclosing command is
issued. If the CB closed position condition is not met in the period [79.t_Fail], the auto -recloser can
not operate successfully, and the signal [79.Fail] will be issued.
When the auto-reclosing command is issued, the reclaim timer starts. If the circuit breaker does
not trip again, the auto-recloser resets at the end of the reclaim time. If the protection operates
during the reclaim time delay [79.t_Reclaim], this relay either advances to the next shot in the
programmed auto-reclosing cycle, or it goes to lockout if all programmed reclose attempts have
been made. The reclaim time should be set long enough to allow this relay to operate when the
circuit breaker is automatically closed onto a fault.
If any blocking condition is met in the process of the auto-recloser, the auto-recloser will be
blocked at once. And if any shot of the auto-recloser can not operate successfully, the signal
[79.Fail] will be issued.
For the details about the theory of the auto-recloser, see the “Instruction Manual” of the PCS-9611
feeder relay.

Date: 2016-09-28
4.12.2 Auto-recloser Logic Diagram
[79.En]
[79.En1]
[79.Ready]
[79.Blk]
[79.Inprog]
25A.Ok_SynChk
&
[79.En_SynChk]
25A.Ok_DdChk
[79.En_DdChk]
[79.OnLoad]
&
[79.Init]
tAR1 0
& [79.Close_3PS1]
[79.N_Rcls] = 1
tAR2 0
& [79.Close_3PS2]
[79.N_Rcls] = 2
tAR3 0
& [79.Close_3PS3]
[79.N_Rcls] = 3
tAR4 0
& [79.Close_3PS4]
[79.N_Rcls] = 4
Figure 4.12-1 Logic diagram of the auto-recloser
For the details about the auto-recloser logic, see the “Instruction Manual” of the PCS-9611 feeder
relay.
4.12.3 Auto-recloser Setting Calculation
4.12.3.1 Auto-recloser Setting Calculation
1. The time setting of the auto-recloser for single-ended source system should be greater than
the time delay in which the arc of the fault point is extinguished, also should be greater than
the time delay in which the circuit breaker and operation mechanism are restored for next
operation.
2. The time setting of the auto-recloser for double-ended source system not only takes the
above factor into account, but also should consider that the protections at two sides trip to cut
off the fault at different moment.
The time setting of the auto-recloser for double-ended source system is as below:
t  t II  t D   t  t K
Where:
t —— the minimum operation time of the auto-recloser;
tII —— the operation time of the protection at opposite side;
tD —— the de-energized time of the protected system, tD ≥ 0.3s;
△t —— the margin time;

Date: 2016-09-28
tK —— the closing time of the circuit breaker.
3. To the branch line, it should be considered that there has enough time for deionization of the
fault point if the circuit breakers at opposite side and branch line side are tripped one after
another, when the time setting of the auto-recloser is configured.
4. To improve the operation success rates of the auto-recloser, the operation time of the
auto-recloser can be delayed properly.
The settings of the auto-recloser are listed in the following table.

The time setting of the minimum time delay for
1 79.t_CBClsd 0.01~600s 0.001s
ensuring the CB is closed
The time pulse width for ensuring the AR blocking
2 79.t_DDO_BlkAR 0.01~600s 0.001s
signal
The time setting of the time delay for ensuring the
3 79.t_CBReady 0.01~600s 0.001s
CB is ready
The time setting of the time delay for checking the
4 79.t_Fail 0.01~600s 0.001s
CB position
5 79.t_3PS1 The time setting of the 1 st shot auto-recloser 0~600s 0.001s
nd
6 79.t_3PS2 The time setting of the 2 shot auto-recloser 0~600s 0.001s
rd
th
9 79.t_Reclaim The reclaim time setting of the auto-recloser 0~600s 0.001s
10 79.t_DDO_AR The pulse width of the auto-recloser 0-4.00s 0.001s
11 79.N_Rcls The shot number setting of the auto-recloser 1~4 1
The logic setting of the synchronism check
12 79.En_SynChk 0~1 1
function of the auto-recloser
The logic setting of the dead check function of the
13 79.En_DdChk 0~1 1
auto-recloser
The logic setting of the CB position check function
14 79.En_FailChk 0~1 1
of the auto-recloser
15 79.En The logic setting of the auto-recloser 0~1 1
0x00000000 ~
16 79.OutMap The output matrix setting of the auto-recloser 1
0x7FFFFFFF
The settings about the check function of the auto-recloser are listed in the following table

1 25.U_Dd The voltage setting of the system dead check 2~120V 0.001V
2 25.U_Lv The voltage setting of the system live check 2~120V 0.001V
The compensation coefficient setting of the
3 25.U_Comp 0.2~5.0 0.001
synchro-check voltage

Date: 2016-09-28
The compensation phase angle setting of the

4 25.phi_Comp 0~360° 1°
synchro-check voltage
The voltage type setting of the synchronism check
5 25.Opt_Usyn 0~5 1
closing function
The circuit breaker closing time setting of the
6 25.t_ClsCB 0.02~1.00s 0.001s
closing synchronism check function
The voltage difference setting of the auto-closing
7 25A.U_Diff 2~120V 0.001V
synchronism check function
The frequency difference setting of the
8 25A.f_Diff 0~2Hz 0.001Hz
auto-closing synchronism check function
The phase angle difference setting of the
9 25A.phi_Diff 0~60° 1°
auto-closing synchronism check function
The waiting time setting of the auto-closing
10 25A.t_Wait 0.01~60s 0.001s
synchronism check function
The setting for selecting the dead check mode of
11 25A.Opt_DdChk 1~7 1
the auto-closing synchronism check function
The time setting of the dead check function of the
12 25A.t_DdChk 0.01~25s 0.001s
auto-closer
The time setting of the synchronism check
13 25A.t_SynChk 0.01~25s 0.001s
function of the auto-closer
4.13 Broken Conductor Protection
4.13.1 Principle of Broken Conductor Protection
The relay incorporates an element which measures the ratio of negative to positive sequence
current (I2/I1). This will be affected to a lesser extent than the measurement of negative sequence
current alone, since the ratio is approximately constant with variations in load current. Hence, a
more sensitive setting may be achieved.
At the moment when the circuit breaker is closed, because the three poles of the circuit breaker
are discrepant for a very short time, and if the broken conductor protection is enabled, it is easy to
make the broken conductor protection pick up, and it will restore after the load current is stable.
The ratio of I2/I1 is calculated and is compared with the threshold and if the threshold is exceeded
then the delay timer is initiated.
4.13.2 Broken Conductor Protection Logic Diagram
I2/I1 > [50BC.I2/I1_Set]

[50BC.En1]
& [50BC.St]
[50BC.Blk]
tBCP 0
[50BC.En]
& [50BC.Op]
tBCP 0
& [50BC.Alm]
[50BC.En_Alm]
Figure 4.13-1 Logic diagram of the broken conductor protection

Date: 2016-09-28
For the details about the broken conductor protection logic, see the “Instruction Manual” of the
4.13.3 Broken Conductor Protection Setting Calculation
4.13.3.1 Current Ratio Setting Calculation
The setting is based on the transmission line connection of the power system, when one of the
transmission lines is cut off, the I2/I1 will be a certain value, and the current ratio setting should be
less than this value.
The time setting should be set to be greater than the longest timer of protection elements.
Because when there is a fault, it may pick up at the meantime, but actually it is not designed for
faults.

The ratio setting for the broken conductor
1 50BC.I2/I1_Set 0.10~1.00 0.001
protection
The time setting for the broken conductor
2 50BC.t_Op 0~200s 0.001s
protection
The logic setting for the broken conductor
3 50BC.En 0~1 1
protection
The logic setting for the broken conductor alarm
4 50BC.En_Alm 0~1 1
function
The output matrix setting of the broken conductor 0x00000000 ~
5 50BC.OutMap 1
4.14 Frequency Protection
4.14.1 Principle of Under-frequency Protection
It provides a four-stage under-frequency protection with independent definite time delay

characteristics in this relay, and the four stages have same protection logics.
This protection can be enabled after 100ms only when the frequency is greater than the frequency
setting [81Ux.f_Set] (x: 1~4) and three phase-to-phase voltages are greater than the setting
[81.Upp_VCE]. Meanwhile, this protection will be blocked when the system frequency is less than
“fn-15.00Hz” or greater than “fn+15.00Hz” for longer than 200ms (fn: system rated frequency).

Date: 2016-09-28
4.14.2 Under-frequency Protection Logic Diagram
Uab > [81.Upp_VCE]

Ubc > [81.Upp_VCE] &
Uca > [81.Upp_VCE] [81U1.St]
f < [81U1.f_Set] tUF1 0
& [81U1.Op]
[81U1.En]
[81U1.En1]
[81U1.Blk]
Figure 4.14-1 Logic diagram of the stage 1 under-frequency protection
For the details about the under-frequency protection logic, see the “Instruction Manual” of the
4.14.3 Under-frequency Protection Setting Calculation
4.14.3.1 Frequency Setting Calculation
Former three stages can adopt cascade connection, and small graduation can be set among them,
for example, taking 0.2Hz. For fourth stage (special stage), it can avoid system frequency always
keeping in a certain frequency. When some loads are shed after former three stages of
under-frequency protection operate to shed major part loads and make system frequency restore
to normal value.
In order to prevent under-frequency protection from mal-operation due to power swing, each stage
can be set as 0.3~0.5s.
4.14.4 Principle of Over-frequency Protection
It provides a four-stage under-frequency protection with independent definite time delay

characteristics in this relay, and the four stages have same protection logics.
This protection can be enabled after 100ms only when the frequency is less than the frequency
setting [81Ox.f_Set] (x: 1~4) and three phase-to-phase voltages are greater than the setting
[81.Upp_VCE]. Meanwhile, this protection will be blocked when the system frequency is less than
“fn-15.00Hz” or greater than “fn+15.00Hz” for longer than 200ms (fn: system rated frequency).
4.14.5 Over-frequency Protection Logic Diagram
Uab > [81.Upp_VCE]

Ubc > [81.Upp_VCE] &
Uca > [81.Upp_VCE] [81O1.St]
f > [81O1.f_Set] tOF1 0
& [81O1.Op]
[81O1.En]
[81O1.En1]
[81O1.Blk]
Figure 4.14-2 Logic diagram of the stage 1 over-frequency protection

Date: 2016-09-28
For the details about the over-frequency protection logic, see the “Instruction Manual” of the
4.14.6 Over-frequency Protection Setting Calculation
4.14.6.1 Frequency Setting Calculation
These four stages can be set based on the same graduation. After rejecting some power supplies
and each stage operating, the system frequency should be restored near rated frequency.
Because compound mode of generators (hydroelectric, thermal power, nuclear power with
different capacity and proportion, different adaptability to abnormal frequency), system structure
and operation mode are different in different power system, they should be set according to actual
situation.
In order to prevent over-frequency protection from mal-operation due to power swing, each stage
can be set as 0.3~0.5s.
4.14.7 Principle of rate-of-change of frequency Protection

This relay provides a four-stage rate-of-change of frequency protection with independent definite
time delay characteristic, and the four stages have same protection logics.
Depending upon whether the rate-of-change of frequency threshold is set above or below zero,
each stage can respond to either rising or falling rate-of-change of frequency conditions: if the
setting [81Rx.df/dt_Set] (x: 1~4) is less than zero, the corresponding rate-of-change of frequency
protection is used as falling rate-of-change of frequency protection; and if the setting
[81Rx.df/dt_Set] (x: 1~4) is greater than zero, the corresponding rate-of-change of frequency
protection is used as rising rate-of-change of frequency protection.
4.14.8 Rate-of-change of Frequency Protection Logic Diagram
The logic diagram of the stage 1 frequency rate-of-change protection is shown as below.
df/dt < [81R1.df/dt_Set]

f < [81R1.f_Pkp] &
[81R1.df/dt_Set] < 0
df/dt > [81R1.df/dt_Set]

[81R1.St]
f > [81R1.f_Pkp] &
[81R1.df/dt_Set] > 0 tFRCP1 0
& [81R1.Op]
[81R1.En]
[81R1.En1]
[81R1.Blk]
Figure 4.14-3 Logic diagram of the stage 1 frequency rate-of-change protection
For the details about the rate-of-change of frequency protection logic, see the “Instruction Manual”

Date: 2016-09-28
4.14.9 Rate-of-change of frequency Protection Setting Calculation
4.14.9.1 Rate-of-change of frequency Setting Calculation
If fast reduction of frequency caused due to large active power shortage after the system fault, it is
required to remove excess load line fast and prevent frequency reduction as early as possible, to
avoid frequency collapse accident, and the set value is recommended to be -0.8 ~ -2Hz/s.
If fast increase of frequency caused when the system power is too large(e.g. more than 20%) due
to sudden surplus, the measures for link tripping together with generator cutting shall be provided,
to avoid large increase of frequency, and the set value is recommended to be 0.8 ~ 2Hz/s.
It shall be set according to the requirements of the system on frequency, and recommended to be
set value 0.1~0.2s.

The setting of the low voltage blocking element of
1 81.Upp_VCE 10~120V 0.001V
the frequency protection (phase-to-phase voltage)
The frequency setting of the stage 1
2 81U1.f_Set 45~60Hz 0.001Hz
under-frequency protection
The time setting of the stage 1 under-frequency
3 81U1.t_Op 0~100s 0.001s
protection
The logic setting of the stage 1 under-frequency
4 81U1.En 0~1 1
protection
5 81U1.OutMap 1
under-frequency protection 0x7FFFFFFF
6 81U2.f_Set 45~60Hz 0.001Hz
7 81U2.t_Op 0~100s 0.001s
protection
8 81U2.En 0~1 1
protection
9 81U2.OutMap 1
10 81U3.f_Set 45~60Hz 0.001Hz
11 81U3.t_Op 0~100s 0.001s
protection
12 81U3.En 0~1 1
protection
13 81U3.OutMap 1

Date: 2016-09-28

14 81U4.f_Set 45~60Hz 0.001Hz
15 81U4.t_Op 0~100s 0.001s
protection
16 81U4.En 0~1 1
protection
17 81U4.OutMap 1
18 81O1.f_Set 50~65Hz 0.001Hz
over-frequency protection
The time setting of the stage 1 over-frequency
19 81O1.t_Op 0~100s 0.001s
protection
The logic setting of the stage 1 over-frequency
20 81O1.En 0~1 1
protection
21 81O1.OutMap 1
over-frequency protection 0x7FFFFFFF
22 81O2.f_Set 50~65Hz 0.001Hz
23 81O2.t_Op 0~100s 0.001s
protection
24 81O2.En 0~1 1
protection
25 81O2.OutMap 1
26 81O3.f_Set 50~65Hz 0.001Hz
27 81O3.t_Op 0~100s 0.001s
protection
28 81O3.En 0~1 1
protection
29 81O3.OutMap 1
30 81O4.f_Set 50~65Hz 0.001Hz
31 81O4.t_Op 0~100s 0.001s
protection
32 81O4.En 0~1 1
protection
33 81O4.OutMap 1
The setting of the stage 1 frequency 0.001
34 81R1.df/dt_Set -10~10Hz/s
rate-of-change protection Hz/s
The pickup frequency setting of the stage 1
35 81R1.f_Pkp 45~65Hz 0.001Hz
frequency rate-of-change protection

Date: 2016-09-28
The time setting of the stage 1 frequency

36 81R1.t_Op 0~100s 0.001s
rate-of-change protection
The logic setting of the stage 1 frequency
37 81R1.En 0~1 1
The output matrix setting of the stage 1 frequency 0x00000000 ~
38 81R1.OutMap 1
rate-of-change protection 0x7FFFFFFF
39 81R2.df/dt_Set -10~10Hz/s
40 81R2.f_Pkp 45~65Hz 0.001Hz
41 81R2.t_Op 0~100s 0.001s
42 81R2.En 0~1 1
43 81R2.OutMap 1
44 81R3.df/dt_Set -10~10Hz/s
45 81R3.f_Pkp 45~65Hz 0.001Hz
46 81R3.t_Op 0~100s 0.001s
47 81R3.En 0~1 1
48 81R3.OutMap 1
49 81R4.df/dt_Set -10~10Hz/s
50 81R4.f_Pkp 45~65Hz 0.001Hz
51 81R4.t_Op 0~100s 0.001s
52 81R4.En 0~1 1
53 81R4.OutMap 1
4.15 Dead Zone Protection
4.15.1 Principle of Dead Zone Protection
For some wiring arrangement (for example, the circuit breaker is located between the CT and the
line), if a fault occurs between the CT and the circuit breaker, the main protection can operate to
trip circuit breaker quickly, but the fault has not been cleared since the local circui t breaker is

Date: 2016-09-28
tripped. Here the dead zone protection is needed in order to trip relevant circuit breaker.
This relay provides a one-stage dead zone protection for above mentioned situation. If the circuit
breaker of the protected equipment is opened and the current is greater than the predefined
setting, the dead zone protection will operate.
4.15.2 Dead Zone Protection Logic Diagram
Ia > [50DZ.I_Set]
Ib > [50DZ.I_Set]
Ic > [50DZ.I_Set] [50DZ.St]
[BI_52b]
tOCDZ 0
50DZ.In_Init & [50DZ.Op]
[50DZ.En]
[50DZ.En1]
[50DZ.Blk]
Figure 4.15-1 Logic diagram of the dead zone protection
For the details about the dead zone protection logic, see the “Instruction Manual” of the PCS-9611
feeder relay.
4.15.3 Dead Zone Protection Setting Calculation
Because the fault is occurred between the CT and breaker, and taking the reliability into
consideration, the current setting can be set as the stage 1 overcurrent protection current setting,
see more information in Section 4.1.5.
After the main protection tripped, but the fault is still on, it shall trip the relevant circuit breaker as
soon as possible. The time setting is recommended to be set value 0.1 ~0.2s.

1 50DZ.I_Set The current setting of the dead zone protection 0.1In~5.0In 0.001A
2 50DZ.t_Op The time setting of the dead zone protection 0~100s 0.001s
3 50DZ.En The logic setting of the dead zone protection 0~1 1
The output matrix setting of the dead zone 0x00000000 ~
4 50DZ.OutMap 1
4.16 Undercurrent Protection
4.16.1 Principle of Undercurrent Protection
It provides a one-stage undercurrent protection for monitoring a motor or a capacitor. If the circuit
breaker of the protected equipment is closed and the current is less than the predefined setting,

Date: 2016-09-28
the undercurrent protection will operate.
4.16.2 Undercurrent Protection Logic Diagram
Ia < [37.I_Set]
Ib < [37.I_Set] &
[37.St]
Ic < [37.I_Set]
[BI_52a] tUC 0
& [37.Op]
[37.En]
[37.En1]
[37.Blk]
Figure 4.16-1 Logic diagram of the undercurrent protection
4.16.3 Undercurrent Protection Setting Calculation
Primary operating current of protection:
I op  ( 0 . 3 ~ 0 . 6 ) I N
The current setting of the undercurrent protection should reliably operate after the bus connected
with the capacitor loses the voltage, and should reliably restore after the bus voltage returns t o
normal, which is generally set as 0.3 to 0.6 times of the rated current.
The protection operating time should coordinate with the standby protection operating time of
outgoing line at this side.
Operating time of protection:
t  t '  t
Where:
t’ —— standby protection operating time required for coordination;
△t —— coordination time, taken as 0.3~0.5s.

1 37.I_Set The current setting of the undercurrent protection 0.1In~1.0In 0.001A
2 37.t_Op The time setting of the undercurrent protection 0~100s 0.001s
3 37.En The logic setting of the undercurrent protection 0~1 1
The output matrix setting of the undercurrent 0x00000000 ~
4 37.OutMap 1

Date: 2016-09-28
5 Common Settings
5 Common Settings
5.1 System Settings
5.1.1 Setting List
No. Item Range
1 Acti ve_Grp 1 ~ 10
2 Opt_SysFreq 0 or 1
3 PrimaryEquip_Name 1~7 characters
4 Prot.I1n 0~20000A
5 Prot.I2n 1/5A
6 Measmt.I1n 0~20000A
7 Measmt.I2n 1/5A
8 Neu1.I1n 0~20000A
9 Neu1.I2n 1/5A
10 Neu2.I1n 0~20000A
11 Neu2.I2n 1/5A
12 SEF.I1n 0~20000A
13 SEF.I2n 1/5A
14 Prot.U1n 0.1~500.0kV
15 Prot.U2n 100~200V
16 Syn.U1n 0.1~500.0kV
17 Syn.U2n 10~200V
18 Delt.U1n 0.1~500.0kV
19 Delt.U2n 10~200V
20 Opt_3I0 0 or 1
21 Opt_3U0 0 or 1
22 Opt_PwrDir 0 or 1
24 Prot.En_RevCT 0 or 1
25 Neu1.En_RevCT 0 or 1
26 Neu2.En_RevCT 0 or 1
27 SEF.En_RevCT 0 or 1
5.1.2 Setting Principle
1. Active_Grp
The number of active setting group, ten setting groups can be configured for busbar differential
protection and breaker failure protection, and only one is active at a time.

Date: 2016-09-28
5 Common Settings
2. Opt_SysFreq
Select the rated system frequency. Setting the value of as “1” means that the rated system
frequency is 60Hz, and setting the value as “0” means that the rated system frequency is 50Hz.
3. PrimaryEquip_Name
Name of the protected primary equipment, such as busbar, transformer, etc.
4. Prot.I1n
Rated primary value of protection phase CT.
5. Prot.I2n
Rated secondary value of protection phase CT.
6. Measmt.I1n
Rated primary value of metering phase CT.
7. Measmt.I2n
Rated secondary value of metering phase CT.
8. Neu1.I1n
Rated primary value of the No.1 zero sequence CT.
9. Neu1.I2n
Rated secondary value of the No.1 zero sequence CT.
10. Neu2.I1n
Rated primary value of the No.2 zero sequence CT.
11. Neu2.I2n
Rated secondary value of the No.2 zero sequence CT.
12. SEF.I1n
Rated primary value of sensitive zero sequence CT.
13. SEF.I2n
Rated secondary value of sensitive zero sequence CT.
14. Prot.U1n
Rated primary value of protection VT.
15. Prot.U2n
Rated secondary value of protection VT.
16. Syn.U1n

Date: 2016-09-28
5 Common Settings
Rated primary value of synchro-check VT.
17. Syn.U2n
Rated secondary value of synchro-check VT.
18. Delt.U1n
Rated primary value of zero sequence VT.
19. Delt.U2n
Rated secondary value of zero sequence VT.
20. Opt_3I0
The setting [Opt_3I0] is used to select the No.1 zero sequence current source. Setting the value of
[Opt_3I0] as “1” means that the No.1 zero sequence current is self-calculated, and setting the
value as “0” means that the No.1 zero sequence current is derived from specific zero sequence CT.
The default value is “0” when the equipment is delivered
21. Opt_3U0
The setting is used to select the zero sequence voltage source. Setting the value of [Opt_3U0] as
“1” means that zero sequence voltage is self-calculated, and setting the value as “0” means that
zero sequence voltage is derived from specific broken delta VT.
22. Opt_PwrDir
The setting is used to select the power measurement mode.The setting can be setting according
the following table.
Active Power Lagging reactive power

[Opt_PwrDir]
To line To busbar To line To busbar
0 +W -W +Var -Var
1 -W +W +Var -Var
2 +W -W -Var +Var
3 -W +W -Var +Var
23. Prot.En_RevCT
This setting is used to select the polarity of the protection phase CTs. If it is set as “0”, the polarity
of the protection phase CTs is positive polarity; and if it is set as “1”, the polarity is negative
polarity.
24. Neu1.En_RevCT
This setting is used to select the polarity of the No.1 zero sequence CT. If it is set as “0”, the
polarity of the No.1 zero sequence CT is positive polarity; and if it is set as “1”, the polarity is
negative polarity.
25. Neu2.En_RevCT
This setting is used to select the polarity of the No.2 zero sequence CT. If it is set as “0”, the

Date: 2016-09-28
5 Common Settings
polarity of the No.2 zero sequence CT is positive polarity; and if it is set as “1”, the polarity is
negative polarity.
26. SEF.En_RevCT
This setting is used to select the polarity of the sensitive zero sequence CT. If it is set as “0”, the
polarity of the sensitive zero sequence CT is positive polarity; and if it is set as “1”, the polarity is
negative polarity.
5.2 Device Settings
5.2.1 Setting List
No. Item Range

1 HDR_EncodeMode GB18030, UTF-8
2 Opt_Caption_103 Current_language, Fixed_Chinese, Fixed_English
3 BX.Un_BinaryInput 24V, 30V, 48V, 110V, 125V, 220V

4 En_DedicatedMeasmtCT 0 or 1
5 En_MDisk 0 or 1
6 Th_ZeroDrift 0~100%
1. HDR_EncodeMode
Select encoding format of header (HDR) file COMTRADE recording file
Default value is “UTF-8”.
2. Opt_Caption_103
Select the caption language sent to SAS via IEC103 protocol
Default value of [Opt_Caption_103] is “Current_language”, and please set it to “Fixed_Chinese” if

the SAS is supplied by China Manufacturer.
3. Bx.Un_BinaryInput
This setting is used to set voltage level of binary input module. If low-voltage BI module is
equipped, 24V, 30V or 48V can be set according to the actual requirement, and if high-voltage BI
module is equipped, 110V, 125V or 220V can be set according to the actual requirement.
Bx: this plug-in module is inserted in slot x.
4. En_ DedicatedMeasmtCT
This setting is selecting the source of the metering current values. If it is set as “1”, the calculation
of the metering current values is based on the sampled data from the dedicated metering current
transformers of this relay; and if it is set as “0”, the calculation of the metering current values is
based on the sampled data from the protection current transformers of this relay.

Date: 2016-09-28
5 Common Settings
5. En_MDisk
The setting is used to decide whether the moveable disk is in service. “1”(Enable): Use moveable
disk to realize the backup and recovery function; “0”(Disable): Moveable disk will be disabled. A
moveable disk is implemented on the main CPU module to backup and restore programs, settings
and configurations.
6. Th_ZeroDrift
The threshold of the zero drift percent value is used to solve the zero drift problem. If the zero drift
value is greater than this setting, the zero drift value will not be sent out; and if the zero drift value
is less than this setting, the zero drift value will be sent out.
5.3 Communication Settings
5.3.1 Setting List
No. Item Range
1 IEDName
2 IP_LAN1 000.000.000.000~255.255.255.255
3 Mask_LAN1 000.000.000.000~255.255.255.255
4 IP_LAN2 Disable or enable
5 Mask_LAN2 000.000.000.000~255.255.255.255
6 En_LAN2 000.000.000.000~255.255.255.255
8 Mask_LAN3 000.000.000.000~255.255.255.255
9 En_LAN3 000.000.000.000~255.255.255.255
11 Mask_LAN4 000.000.000.000~255.255.255.255
12 En_LAN4 000.000.000.000~255.255.255.255
13 Gateway Disable or enable
14 En_Broadcast 000.000.000.000~255.255.255.255
15 Addr_RS485A Disable or enable
16 Baud_RS485A 0, 1
17 Protocol_RS485A 0~255
18 Addr_RS485B 4800,9600,19200,38400,57600,115200 (bps)
19 Baud_RS485B IEC103, Modbus, Resv1
20 Protocol_RS485B 0, 1
21 Threshold_Measmt_Net 0, 1
22 Period_Measmt_Net 0~255
23 Format_Measmt 4800,9600,19200,38400,57600,115200 (bps)
24 Baud_Printer IEC103, Modbus, Resv1
25 En_AutoPrint 0, 1

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5 Common Settings
No. Item Range

26 Opt_TimeSyn 0, 1
27 IP_Server_SNTP 0~100%
28 OffsetHour_UTC 0~65535s
29 OffsetMinute_UTC 0, 1
30 B01.En_NetA_GOOSE 4800,9600,19200,38400,57600,115200 (bps)
31 ReDur_PreTrigDFR Disable or enable
32 En_TCPx_DNP 0 or 1
33 Addr_Slave_TCPx_DNP 0~65519
34 Addr_Master_TCPx_DNP 0~65519
35 IP_Master_TCPx_DNP 000.000.000.000~255.255.255.255
36 Opt_Map_TCPx_DNP 0~4
BISingleBit
37 Obj01DefltVar_TCPx_DNP
BIWithStatus
BIChWoutT
38 Obj02DefltVar_TCPx_DNP BIChWithAbsTime
BIChWithRelTime
AI32Int
AI16Int
39 Obj30DefltVar_TCPx_DNP AI32IntWoutF
AI16IntWoutF
AI32Flt
AI32IntEvWoutT
40 Obj32DefltVar_TCPx_DNP AI16IntEvWoutT
AI32FltEvWoutT
AO32Int
41 Obj40DefltVar_TCPx_DNP AO16Int
AO32Flt
42 t_AppLayer_TCPx_DNP 0~5 (s)
43 t_KeepAlive_TCPx_DNP 0~7200 (s)
44 En_UR_TCPx_DNP 0 or 1
45 Num_URRetry_TCPx_DNP 2~10
46 t_UROfflRetry_TCPx_DNP 1~5000 (s)
47 Class_BI_TCPx_DNP 0~3
48 Class_AI_TCPx_DNP 0~3
49 t_Select_TCPx_DNP 0~240 (s)
50 t_TimeSynIntvl_TCPx_DNP 0~3600 (s)
1. IEDNAME
The IED name defined in 61850 protocol

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5 Common Settings
2. IP_LAN1, IP_LAN2, IP_LAN3, IP_LAN4
IP address of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4
3. Mask_LAN1, Mask_LAN2, Mask_LAN3, Mask_LAN4
Subnet mask of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4
4. En_LAN2, En_LAN3, En_LAN4
Put Ethernet port 2, Ethernet port 3 and Ethernet port 4 in service
They are used for Ethernet communication based on the IEC 60870-5-103 protocol. When the IEC
61850 protocol is applied, the IP address of Ethernet A will be GOOSE source MAC address.
Ethernet port 1 is always in service by default.
5. Gateway
IP address of Gateway (router)
6. En_Broadcast
This setting is only used only for IEC 60870-5-103 protocol. If NR network IEC 60870-5-103
protocol is used, the setting must be set as “1”.
0: the device does not send UDP messages through network
1: the device sends UDP messages through network
7. Addr_RS485A, Addr_RS485B
They are the device′s communication address used to communicate with the SCADA or RTU via
serial ports (port A and port B).
8. Baud_RS485A, Baud_RS485B
Baud rate of rear RS-485 serial port A or B
9. Protocol_RS485A, Protocol_RS485B
Communication protocol of rear RS-485 serial port A or B
IEC103: IEC 60870-5-103 protocol
Modbus: Modbus Protocol
Resv1: Reserved 1
NOTICE!
Above table listed all the communication settings, the device delivered to the user
maybe only show some settings of them according to the communication interface
configuration. If only the Ethernet ports are applied, the settings about the serial ports
(port A and port B) are not listed in this submenu. And the settings about the Ethernet
ports only listed in this submenu according to the actual number of Ethernet ports.

Date: 2016-09-28
5 Common Settings
The standard arrangement of the Ethernet port is two, at most four (predetermined
when ordering). Set the IP address according to actual arrangement of Ethernet
numbers and the un-useful port/ports need not be configured. If PCS-Explorer
configuration tool auxiliary software is connected with this device through the Ethernet,
the IP address of PCS-Explorer must be set as one of the available IP address of this
device.
10. Threshold_Measmt_Net
Threshold value of sending measurement values to SCADA through IEC 60870-5-103 or

IEC61850 protocol via Ethernet port.
Default value: “1%”
11. Period_Measmt_Net
The time period for equipment sends measurement data to SCADA through IEC 60870-5-103
protocol via Ethernet port.
Default value: “60”
12. Format_Measmt
The setting is used to select the format of measurement data sent to SCADA through IEC
60870-5-103 protocol.
0: GDD data type through IEC103 protocol is 12
1: GDD data type through IEC103 protocol is 7, i.e. 754 short real number of IEEE standard
13. Baud_Printer
Baud rate of printer port
14. En_AutoPrint
If automatic print is required for fault report after protection operating, it is set as “1”. Otherwise, it
should be set to “0”.
15. Opt_TimeSyn
There are four selections for clock synchronization of device shown as follow.
 Conventional
PPS (RS-485): Pulse per second (PPS) via RS-485 differential level
IRIG-B (RS-485): IRIG-B via RS-485 differential level
PPM (DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn]
PPS (DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn]
 SAS
SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network

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5 Common Settings
SNTP (BC): Broadcast SNTP mode via Ethernet network
Message (IEC103): Clock messages through IEC103 protocol
 Advanced
IEEE1588: Clock message via IEEE1588
IRIG-B (Fiber): IRIG-B via optical-fibre interface
PPS (Fiber) PPS: Pulse per second (PPS) via optical-fibre interface
 NoTimeSync
When no time synchronization signal is connected to the device, please select this option and
the alarm message [Alm_TimeSyn] will not be issued anymore.
“Conventional” mode and “SAS” mode are always be supported by the device, but
“Advanced” mode is only supported when NET-DSP module is equipped. The alarm signal
[Alm_TimeSyn] may be issued to remind user loss of time synchronization signals.
1) When “SAS” is selected, if there is no conventional clock synchronization signal, the

device will not send the alarm signal [Alm_TimeSyn]. When “ Conventional” mode is
selected, if there is no conventional clock synchronization signal, “SAS” mode will be
enabled automatically with the alarm signal [Alm_TimeSyn] issued simultaneously.
2) When “Advanced” mode is selected, if there is no conventional clock synchronization

signal connected to NET-DSP module, “SAS” mode is enabled automatically with the
alarm signal [Alm_TimeSyn] issued simultaneously.
3) When “NoTimeSyn” mode is selected, the device will not send alarm signals without time
synchronization signal. But the device can be still synchronized if receiving time
synchronization signal.
NOTICE!
The clock message via IEC 60870-5-103 protocol is invalid when the device receives
the IRIG-B signal through RCS-485 port.
16. IP_Server_SNTP
It is the address of the SNTP time synchronization server which sends SNTP timing messages to
the relay or BCU.
17. OffsetHour_UTC, OffsetMinute_UTC
If the IEC61850 protocol is adopted in substations, the time tags of communication messages are
required according to UTC (Universal Time Coordinated) time.
The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT
(Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is
east 8th time zone, so this setting is set as “8”. The setting [OffsetMinute_UTC] is used to set the
minute offset of the current time zone to the GMT zone.

Date: 2016-09-28
5 Common Settings
Time zone GMT zone East 1 st East 2 nd East 3 rd East 4 th East 5 th

Setting 0 1 2 3 4 5
th th th th th
Time zone East 6 East 7 East 8 East 9 East 10 East 11 th
Setting 6 7 8 9 10 11
th st nd rd th
Time zone East/West 12 West 1 West 2 West 3 West 4 West 5 th
Setting 12/-12 -1 -2 -3 -4 -5
th th th th th
Time zone West 6 West 7 West 8 West 9 West 10 West 11 th
Setting -6 -7 -8 -9 -10 -11
18. En_TCPx_DNP
The logic setting is used to enable or disable network No.x DNP client. (x=1, 2, 3, 4)
1: enable
0: disable
When network No.x DNP client is not configured to be in service by PCS-Explorer, DNP client
settings corresponding to network No.x will be hidden.
19. Addr_Slave_TCPx_DNP
It is the slave address of network No.x DNP client. (x=1, 2, 3, 4)
20. Addr_Master_TCPx_DNP
It is the master address of network No.x DNP client. (x=1, 2, 3, 4)
21. IP_Master_TCPx_DNP
It is the IP address of network No.x DNP client. (x=1, 2, 3, 4)
22. Opt_Map_TCPx_DNP
It is the communication map number of network No.x DNP client. (x=1, 2, 3, 4)
23. Obj01DefltVar_TCPx_DNP
It is the “OBJ1” default variation of network No.x DNP client. (x=1, 2, 3, 4)
BISingleBit: Binary Input format is packed with single bit
BIWithStatus: Binary Input with status flag
BIChWoutT: Binary Input Event without time-of-occurrence
BIChWithAbsTime: Binary Input Event with absolute time-of-occurrence
BIChWithRelTime: Binary Input Event with relative time-of-occurrence

Date: 2016-09-28
5 Common Settings
AI32Int: Analog Input with a flag octet and a 32-bit, signed integer value
AI16Int: Analog Input with a flag octet and a 16-bit, signed integer value
AI32IntWoutF: Analog Input with a 32-bit (but without flags)
AI16IntWoutF: Analog Input with a 16-bit (but without flags)
AI32Flt: Analog Input with a flag octet and a single-precision, floating-point value
AI32IntEvWoutT: Analog Input Event with a flag octet and a 32-bit, signed integer value (but
without time-of-occurence)
AI16IntEvWoutT: Analog Input Event with a flag octet and a 16-bit, signed integer value (but
without time-of-occurence)
AI32FltEvWoutT: Analog Input Event with single-precision, floating-point value (but without
time-of-occurence)
AO32Int: Analog Output with a flag octet and a 32-bit, signed integer value
AO16Int: Analog Output with a flag octet and a 16-bit, signed integer value
AO32Flt: Analog Output with a flag octet and a single-precision, floating-point value
28. t_AppLayer_TCPx_DNP
It is the timeout of application layer of network No.x DNP client. (x=1, 2, 3, 4)
29. t_KeepAlive_TCPx_DNP
It is the heartbeat time interval of network No.x DNP client. (x=1, 2, 3, 4)
30. En_UR_TCPx_DNP
The logic setting is used to enable or disable the unsolicited message function of network No.x
DNP client. (x=1, 2, 3, 4)
1: enable
0: disable
31. Num_URRetry_TCPx_DNP
It is the online retransmission number of the unsolicited message of network No.x DNP client. (x=1,
2, 3, 4)

Date: 2016-09-28
5 Common Settings
32. t_UROfflRetry_TCPx_DNP
It is the offline timeout of the unsolicited message of network No.x DNP client. (x=1, 2, 3, 4)
33. Class_BI_TCPx_DNP
It is the class level of the “Binary Input” of network No.x DNP client. (x=1, 2, 3, 4)
34. Class_AI_TCPx_DNP
It is the class level of the “Analog Input” of network No.x DNP client. (x=1, 2, 3, 4)
35. t_Select_TCPx_DNP
It is the selection timeout of network No.x DNP client. (x=1, 2, 3, 4)
36. t_TimeSynIntvl_TCPx_DNP
It is the time interval of the time synchronization function of network No.x DNP client. (x=1, 2, 3, 4)

Date: 2016-09-28
6 Manual Version History

In the current version of the instruction manual, several descriptions on existing features have
been modified.
Manual version and modification history records
Manual Version
Date Description of Change
Source New
Beta 1.00 2013-05-13 Form the original manual.
1.00 2.00 2016-09-28 1. Update this manual according to the newest software of PCS-9611.

Date: 2016-09-28

Date: 2016-09-28

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PCS-9600 Series Relay

Setting Guide Manual

NR Electric Co., Ltd.

Copyright © 2016 NR. All rights reserved.

We reserve the rights to make technical improvements without notice.

NR ELECTRIC CO., LTD. Tel: +86-25-87178888

P/N: ZL_PCS-9600_X_Setting Guide_EN_Overseas General_X Version: R1.00

PCS-9600 Series Relay I

II PCS-9600 Series Relay

Table of Contents ..................................................................................... III

1 Introduction of Setting Calculation ..................................................... 1

1.1 Precondition of Setting Calculation .......................................................................... 1

2 Parameters for Setting Calculation ..................................................... 3

2.1 Demo System Figure ..................................................................................................... 3

3 Short Circuit Current Calculation ........................................................ 5

3.1 Engineering Configuration ........................................................................................... 5

3.2.2 Short Circuit Calculation under the Minimum Operating Mode............................................. 7

4 Feeder Protection Setting Calculation ................................................ 9

4.1 Overcurrent Protection ................................................................................................. 9

4.1.2 Voltage Control Element for Overcurrent Protection ............................................................ 9

4.1.3 Directional Element for Overcurrent Protection ................................................................. 10

4.1.4 Harmonic Blocking Element for Overcurrent Protection ......................................................11

4.1.5 Overcurrent Protection Setting Calculation.........................................................................11

4.1.6 Relevant Setting Sheet ..................................................................................................... 15

4.2 Zero Sequence Overcurrent Protection.................................................................. 17

PCS-9600 Series Relay III

4.2.2 Zero Sequence Overcurrent Protection Logic Diagram ..................................................... 18

4.2.3 Zero Sequence Overcurrent Protection Setting Calculation............................................... 18

4.2.4 Relevant Setting Sheet ..................................................................................................... 21

4.3 Negative Sequence Overcurrent Protection.......................................................... 22

4.3.2 Negative Sequence Overcurrent Protection Logic Diagram ............................................... 23

4.3.3 Negative Sequence Overcurrent Protection Setting Calculation ........................................ 23

4.3.4 Relevant Setting Sheet ..................................................................................................... 24

4.4 Sensitive Earth Fault Protection ............................................................................... 25

4.4.2 SEF Protection Logic Diagram .......................................................................................... 25

4.4.3 SEF Protection Setting Calculation ................................................................................... 25

4.4.4 Relevant Setting Sheet ..................................................................................................... 26

4.5 Breaker Failure Protection ......................................................................................... 27

4.5.2 Breaker Failure Protection Logic Diagram ......................................................................... 28

4.5.3 Breaker Failure Initiation Setting Calculation ..................................................................... 28

4.5.4 Relevant Setting Sheet ..................................................................................................... 28

4.6 Overvoltage Protection ............................................................................................... 29

4.6.2 Overvoltage Protection Logic Diagram .............................................................................. 29

4.6.3 Overvoltage Protection Setting Calculation ....................................................................... 29

4.6.4 Relevant Setting Sheet ..................................................................................................... 30

4.7 Undervoltage Protection ............................................................................................. 30

4.7.2 Undervoltage Protection Logic Diagram ............................................................................ 31

4.7.3 Undervoltage Protection Setting Calculation ..................................................................... 31

4.7.4 Relevant Setting Sheet ..................................................................................................... 32

4.8 SOTF Overcurrent Protection.................................................................................... 32

IV PCS-9600 Series Relay

4.8.2 SOTF Overcurrent Protection Logic Diagram .................................................................... 33

4.8.3 SOTF Overcurrent Protection Setting Calculation ............................................................. 33

4.8.4 Relevant Setting Sheet ..................................................................................................... 34

4.9 Negative sequence Overvoltage Protection .......................................................... 35

4.9.2 Negative Sequence Overvoltage Protection Logic Diagram .............................................. 35

4.9.3 Negative Sequence Overvoltage Protection Setting Calculation........................................ 35

4.9.4 Relevant Setting Sheet ..................................................................................................... 35

4.10 Zero sequence Overvoltage Protection ................................................................ 36

4.10.2 Zero Sequence Overvoltage Protection Logic Diagram ................................................... 36