B.

tech (3rd year)

Branch: ECE
Subject name: Embedded system
Subject Code: KOE062
Unit:1

Topics to be covered:
1. Introduction of Embedded system
2. Build Process
3. Structural Units
4. Selection of Processor and memory Devices
5. Memory management method
6. Timer and Counting Devices
7. Watchdog timer
8. Real-time clock
9. In the circuit emulator
10. Target hardware debugging
11. Direct Memory Access

1. Introduction of Embedded system:

What is an Embedded System?

An embedded system can be defined as one comprising a processor, associated

peripherals, and software used for a particular purpose. It performs a well-defined
task and the categories of the embedded system include the following.

Characteristics of an Embedded System

 Single-functioned − An embedded system usually performs a specialized
operation and does the same repeatedly. For example: A pager always
functions as a pager.
 Tightly constrained − All computing systems have constraints on design
metrics, but those on an embedded system can be especially tight. Design
metrics is a measure of an implementation's features such as its cost, size
 power, and performance. It must be of a size to fit on a single chip, must
perform fast enough to process data in real time and consume minimum power
to extend battery life.
 Reactive and Real time − Many embedded systems must continually react to
changes in the system's environment and must compute certain results in real
time without any delay. Consider an example of a car cruise controller; it
continually monitors and reacts to speed and brake sensors. It must compute
acceleration or de-accelerations repeatedly within a limited time; a delayed
computation can result in failure to control of the car.
 Microprocessors based − It must be microprocessor or microcontroller based.
 Memory − It must have a memory, as its software usually embeds in ROM. It
does not need any secondary memories in the computer.
 Connected − It must have connected peripherals to connect input and output
devices.
 HW-SW systems − Software is used for more features and flexibility. Hardware
is used for performance and security.

Build Process: The process which converts source code to executable

code is called as the build process.

The build process for embedded systems is different. This is because the
code to be run on an embedded system is written one platform i.e. general
purpose computer and executed in another platform i.e. the target
hardware.
An Embedded system would also use tools such as a Compiler, Linker,
Locater and Debugger to perform the entire build process. These tools ,
would be a part of a larger IDE.

A compiler that produces the executable code to be run on a different

platform that led a cross-compiler; else it is called a native compiler.
Ex. Turbo C++ is a native compiler. The compiler in case of embedded
systems development is a cross compiler.
The build process involves three steps:
1. Compiling
2. Linking
3. Locating
Compiling
1. The process of compiling is done by the compiler.
2. The compiler takes input as source code files and gives output as
multiple object files.
3. Compilers for embedded systems are essentially cross-compilers.
For example, while compiling the programmer has to select the
target processor for which the code has to be generated.
4. The contents of the object files depend on their format.
Two commonly used formats are: 1. Common Object file format
(COFF)

Extended file format (ELF) Object files generally have the

following structure:
 Linking
1. The process of linking is carried out by the linker.
2. The linker takes input as multiple object files and gives output as
a single object file which is also called as the relocatable code.
3. The output of compiler is multiple object files. These files are
incomplete in the sense that they may contain reference to
variables and functions across multiple object files which need to
be resolved.
4. The job of the linker is to combine these multiple object files and
resolve the unresolved symbols.
5. The Linker does this by merging the various sections like text,
data, and bss of the individual object files. The output of the
linker will be a single file which contains all of the machine
language code from all of the input object files that will be in the
text section of this new file, and all of the initialized and
uninitialized variables will reside in the new data section and bss
section respectively.

Locating
The process of relocating is carried out by the relocater.

 The relocator takes input as the relocatable code produced by the

linker and gives output as the final executable code.

 This output is a binary executable file which is called hex code.

 The locator needs to be given information about the memory

available on the target processor.

 The locator will use this information to assign physical memory

addresses to each of the code and data sections within the relocatable
program code. Finally, it produces an output file that contains a
 binary memory image that can be loaded into the target processor’s
ROM.
Basic Structure of an Embedded System
The following illustration shows the basic structure of an embedded system –

The embedded processor has three cache memory for fast operation:
1. Instruction Cache(I-Cache) sequentially stores the instructions in
FIFO mode. It lets the processor to execute the instructions at a
greater speed.
2. Branch Target Cache(BT Cache) facilitates the ready availability
of the next instruction set, when a branch instruction like jump,
call or loop is encountered. Its fetch unit foresees a branching
instruction in the I – cache.
3. Data Cache(D – Cache) stores the pre – fetched data from the
external memory. A data cache holds both the address and data
together at a location. It also stores the write-through data that is
to be transferred to the external memory addresses. Write-
through data is nothing but the output data from the execution
unit.
Control Units
1. The control unit(CU) is one of the important structural units in any
embedded processor. It is responsible for all the control of the bus
activities and unit functions needed for processing. It directs all the
units of a processor to respond to the instruction that is executed.
2. Pre fetch control Unit(PFCU) controls the fetching of data into the I-
Cache and D-Cache in advance from the memory unit. The instructions
and data are delivered when needed to the processor’s execution units.
3. Memory Management Unit(MMU) manages the memories such that
the instructions and data are readily available for processing. There are
several memory management methods for managing the memory in an
embedded processor such as fixed block allocation, dynamic block
allocation, dynamic page allocation, etc.

Processing Units
Processing units receive the input data, process it and produce the output.
Depending on the function of the embedded system, the processing is done
through different units like ALU, FLPU, AOU, and advanced units.

1. Arithmetic Logic Unit(ALU) is used for the execution of the arithmetic

and logic instructions according to the instruction present in the
Instruction Register.
2. Floating point processing unit(FLPU) is different from ALU and is used
primarily for floating point processing. It is essential for the fast
processing of mathematical functions in a microprocessor or Digital
Signal Processor.
3. Atomic operation unit(AOU) lets a user (compiler) instruction when
broken into the number of processor instructions called atomic
operations, finish before an interrupt of the processor occurs.
4. The embedded processor also has Advanced processing units for
multistage pipeline processing, and multi-line superscalar processing to
obtain processing speeds higher than one instruction per cycle.

Register Sets
Application Register Set(ARS) is a set of on-chip registers used during
processing of instructions of the application program of the user. A register
window consists of a subset of registers with each subset storing static
variables of software – routine.

System Register Set(SRS) is a set of registers used while processing the

instructions of the supervisory system program.
Floating point register set(FRS) is dedicated for storing floating point
numbers in the standard format and used by Floating point Processing Units
for its data.

Memory Registers
Registers are the smallest part of the CPU, where the data and address can be
stored and accessed quickly. There are various registers like accumulators,
general purpose registers, flag registers, memory address registers, memory
data registers, program counters, stack pointers, etc.

Memory Address Register(MAR) holds the address of the data byte or word
that is to be fetched from external memories. Memory Data
Register(MDR) holds the data byte or word that is fetched from external
memory or stored to the external memory.

Program Counter and Stack Pointer

The program counter is a register that stores the address of the next instruction
to be executed from the memory. It generates the instruction cycle to fetch the
address from memory through MAR.

A stack pointer is a register that stores the address of the last program request
in a stack. It is a pointer for an address that corresponds to a stack top in the
memory.

Selection of processor:
1. Speed and performance.
2. Optimal power usage
3. Peripheral support
4. Advanced Processing
5. Cost

Speed and Performance:

The most important factor to consider when choosing a processor for an
embedded system is its performance. A processor’s speed is primarily
determined by its architecture and silicon design.

The number of instructions executed per second and the number of operations
per clock cycle must be evaluated for assessing performance. At the same time,
the efficiency of the computation units is also important when talking about
performance.
Processor architectures that support additional instruction can aid in improving
performance for specific applications. Pipelining and super-scalar architectures
boost processor performance even further.

Optimal Power usage

Increasing the logic density and clock speed have an adverse impact on the
power requirement of the processor. Faster charging and discharging cycles in
the capacitor, leakage currents may lead to more power consumption.

More logic leads to higher power density thereby making the heat dissipation
difficult. With more emphasis on greener technologies and since many systems
are becoming battery operated, it is important to design the system for optimal
power usage. Silicon-on-Chip (SoC) comes with advanced power gating
techniques that can shut down clocks and power to unused modules.

Peripheral support
Apart from the processor, the embedded system has many other peripherals to
perform input and output operations. It is important to have the right
peripherals to assist the processor in optimized performance.

In recent days, almost all the processors used are SoCs. So it is better if the
necessary peripherals are available in the chip itself and are called on-chip
peripherals. It offers various benefits such as optimal power consumption and
effective data communication compared to external peripherals

Advanced Processing
Along with the core processor, the presence of various co-processors and
specialized processing units can add more value to the processing
performance. The instructions fetched by the core processor are executed by
the co-processors in parallel, thereby reducing the processing load.

Some of the popular co-processors include Floating Point Co-processor,

Graphics Processing Unit(GPU), Digital Signal Processors(DSP), etc. Floating
Point co-processor can be very helpful in applications involving complex
mathematical operations including multimedia, imaging, codecs, etc.

GPU is responsible for rendering the images on a digital display. It is a parallel

processing technology, which processes images faster than the normal unit. It
is sometimes called a Visual processing unit.
Cost
For all the required functionalities to be built up in a system, certainly the
price will be the determining factor during the selection of processor for an
embedded system.

Memory Management:
Memory management is the process of keeping track of the free and
allocated blocks of the RAM and assigning the free memory blocks to
processes.

• The task of subdividing the memory among different processes is called

memory management.
• Memory management is a method in the operating system to manage
operations between main memory and disk during process execution.
• The main aim of memory management is to achieve efficient utilization
of memory.

Why Memory Management is required:

1. Allocate and de-allocate memory before and after process execution.

2. To keep track of used memory space by processes.
3. To minimize fragmentation issues.
4. To proper utilization of main memory.

To maintain data integrity while executing of process.

• Memory Management Techniques are basically classified into two

categories:
 What is Memory partitioning ?

• Memory partitioning means dividing the main memory into chunks

of the same or different sizes so that they can be assigned to processes in
the main memory.
• There are two types of memory partitioning techniques:

1. Fixed-sized memory partitioning

2. Variable-sized memory partitioning

Fixed sized Partition:

This is the oldest and simplest technique used to put more than one process
in the main memory.

• In this partitioning, the number of partitions (non-overlapping) in RAM

is fixed but the size of each partition may or may not be the same.
• As it is a contiguous allocation, hence no spanning is allowed. Here
partitions are made before execution or during system configure.
• As illustrated in above figure, first process is only consuming 1MB out of
4MB in the main memory.
Hence, Internal Fragmentation in first block is (4-1) = 3MB.
Sum of Internal Fragmentation in every block = (4-1)+(8-7)+(8-7)+(16-
14)= 3+1+1+2 = 7MB.
• Suppose process P5 of size 7MB comes. But this process cannot be
accommodated in spite of available free space because of contiguous
allocation (as spanning is not allowed). Hence, 7MB becomes part of
External Fragmentation.

Variable partition:
It is a part of Contiguous allocation technique. It is used to alleviate the
problem faced by Fixed Partitioning. In contrast with fixed partitioning,
partitions are not made before the execution or during system configure.
Various features associated with variable Partitioning-
 1. Initially RAM is empty and partitions are made during the run-time
according to process’s need instead of partitioning during system
configure.
2. The size of partition will be equal to incoming process.
3. The partition size varies according to the need of the process so that the
internal fragmentation can be avoided to ensure efficient utilisation of
RAM
4. Number of partitions in RAM is not fixed and depends on the number of
incoming process and Main Memory’s size.

5.

Embedded have three different types of memory management

hardware—no extensions providing no protection, a memory
protection unit (MPU) providing limited protection, and a memory
management unit (MMU) providing full protection:

1. Nonprotected memory is fixed and provides very little

flexibility. It is normally used for small, simple embedded
systems that require no protection from rogue
applications.

2. MPUs employ a simple system that uses a limited

number of memory regions. These regions are controlled
with a set of special coprocessor registers, and each
region is defined with specific access permissions. This
type of memory management is used for systems that
 require memory protection but don't have a complex
memory map.

3. MMUs are the most comprehensive memory

management hardware available on the ARM. The MMU
uses a set of translation tables to provide fine-grained
control over memory. These tables are stored in main
memory and provide a virtual-to-physical address map
as well as access permissions. MMUs are designed for
more sophisticated platform operating systems that
support multitasking.

Timer: A timer is a specialized type of clock which is

used to measure time interval. The register incremented
for every machine cycle. Maximum count rate is 1/12 of
the oscillator frequency. A timer uses the frequency of
the internal clock and generates delay.

Counter: A counter is a device that stores (and sometimes

displays) the number of times a particular event or
process occurred, with respect to a clock signal. It is used
to count the events happening outside the
microcontroller. In electronics, counters can be implemented
quite easily using register-type circuits such as a flip-flop.
counters can be implemented quite easily using register-
type circuits such as a flip-flop.

Real time clock: real-time clock (RTC) is used in

embedded systems to keep track of the precise time and
date even when the device is not connected to the network
or the main power is off. The RTC is powered by its own
internal lithium battery, and even if the power of the system
is turned off, the RTC clock keeps running. Many
applications use real-Time Clocks, including industrial, and
consumer such as digital cameras, mobile GPS, TV, and
home healthcare.

In Circuits Emulator:
An in-circuit emulator (ICE) is a debugging tool that allows you to
access a target MCU for in-depth debugging. A genuine ICE requires
you to remove the microcontroller and insert the ICE in its place,
most commonly using an adapter. In-circuit emulation is rather rare
in these days of high-performance, relatively low-cost processors
because ICE needs to be invisible to the system, which is difficult to
do with extremely fast, memory-intensive chips. Nevertheless, not
every system requires a high-performance MCU, and it’s still possible
to use ICE. ICE is the best tool for finding difficult bugs and can
provide invaluable insight.

ICE consists of a hardware board with accompanying software for the

host computer. The ICE is physically connected between the host
computer and the target MCU. The debugger on the host establishes
a connection to the MCU via the ICE. ICE allows a developer to see
data and signals that are internal to the MCU, and to step through
the source code (e.g., C/C++ on the host) or set breakpoints; the
immediate ramifications of executed software are observed during
run time. Since the debugging is done via hardware, not software,
the MCU’s performance is left intact for the most part, and ICE does
not compromise MCU resources. This type of debugging is also
referred to as source-level or run-time debugging, except ICE is as
close to the real scenario as possible, as it’s not a simulation but a
substitution of the target MCU with an emulation, or accurate
mirror, of the target MCU in the ICE itself. The behaviour of the MCU
will be more accurately reflected in ICE, and in real time.

Features and capabilities available with an in-circuit emulator

include:
1. Ability to map resources between target and host. That is,
programs may be run in either the target or the host.
2. Ability to run and test code in real time without target
hardware.
 3. Ability to step or run programs from/to specified states or
breakpoints over and above other debugging tools
4. Ability to observe and modify microprocessor registers.
5. Ability to observe and modify memory contents.
6. Ability to trace program execution using internal logic
analyzers.

Target hardware Debugging:

https://www.studocu.com/in/n/27337008?sid=01679812257

DMAC : Direct Memory Access Controller

DMA stands for Direct Memory Access. It is designed by Intel to transfer data at the fastest
rate. It allows the device to transfer the data directly to/from memory without any
interference of the CPU.
Using a DMA controller, the device requests the CPU to hold its data, address and control bus,
so the device is free to transfer data directly to/from the memory. The DMA data transfer is
initiated only after receiving HLDA signal from the CPU.

How DMA Operations are Performed?

Following is the sequence of operations performed by a DMA −
 Initially, when any device has to send data between the device and the
memory, the device has to send DMA request (DRQ) to DMA controller.
 The DMA controller sends Hold request (HRQ) to the CPU and waits for the CPU
to assert the HLDA.
 Then the microprocessor tri-states all the data bus, address bus, and control
bus. The CPU leaves the control over bus and acknowledges the HOLD request
through HLDA signal.
 Now the CPU is in HOLD state and the DMA controller has to manage the
operations over buses between the CPU, memory, and I/O devices.

Features of 8257

Here is a list of some of the prominent features of 8257 −

 It has four channels which can be used over four I/O devices.
 Each channel has 16-bit address and 14-bit counter.
 Each channel can transfer data up to 64kb.
 Each channel can be programmed independently.
 Each channel can perform read transfer, write transfer and verify transfer
operations.
 It generates MARK signal to the peripheral device that 128 bytes have been
transferred.
 It requires a single phase clock.
 Its frequency ranges from 250Hz to 3MHz.
 It operates in 2 modes, i.e., Master mode and Slave mode.
8257 Architecture
The following image shows the architecture of 8257 −

Modes of DMA:
Mode-1
Burst Mode –
 In this mode Burst of data (entire data or burst of block containing
data) is transferred before the CPU takes control of the buses back
from DMAC.
 This is the quickest mode of DMA Transfer since at once a huge
amount of data is being transferred.
 Since at once only a huge amount of data is being transferred so time
will be saved in huge amounts.
Mode-2
Cycle Stealing Mode –
 Slow IO device will take some time to prepare data (or words) and
within that time CPU keeps the control of the buses.
 Once the data or the word is ready CPU gives back control of system
buses to DMAC for 1-cycle in which the prepared word is transferred
to memory.
  As compared to Burst mode this mode is a little bit slowest since it
requires a little bit of time which is actually consumed by the IO
device while preparing the data.

Mode 3
Transparent Mode:

 Whenever CPU does not require the system buses then only control of
buses will be given to DMAC.
 In this mode, CPU will not be blocked due to DMA at all.
 This is the slowest mode of DMA Transfer since DMAC has to wait might
be for so long time to just even get the access of system buses from the
CPU itself.
 Hence due to which less amount of data will be transferred.