UNIT-2 Two Marks

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Unit II

PART A (2 Marks)
INTRODUCTION TO EMBEDDEDSYSTEM DESIGN

1. What is an embedded system?


Any device that includes a programmable computer but is not itself intended to be a general- purpose
computer is called an embedded system. An embedded system employs combination of hardware and
software to perform a specific function and may work in a reactive and time-constrained environment. Eg:
Calculator, cell phone, car.
2. Why microprocessor is used in an embedded system?
Microprocessor is used in embedded system because of its small size and low power consumption.
It is easier to design and debug a system with a microprocessor. It allows the possibility of upgrades.
3. Enumerate some embedded computers that exists from origin of the embedded systems.
Aircraft simulator(Whirlwind computer)
• Calculator(HP-35)
• Autombolies(Engine control)
4. List the major levels of abstraction in the embedded design process.

The major levels of abstraction in the embedded design process are:


• Requirements
• Specification
• Architecture
• Components Design
• System Integration

5. Mention the types of relationships that can exist between objects and classes.
Relationships that can exist between objects and classes:
• Association occurs between objects that communicate with each other but have no ownership
relationship between them.
• Aggregation describes a complex object made of smaller objects
• Composition is a type of aggregation in which the owner does not allow access to the
component objects
• Generalization allows to define one class in terms of another
6. What are the applications of embedded system?
Embedded System Applications:
• Consumer electronics, e.g., camera, calculator, etc.,
• Household appliances, e.g., washing machine, microwave oven, etc.,
• Automobiles (anti-lock braking, engine control, etc.,)
• Industrial process controllers & avionics/defense applications
• Computer/Communication products, e.g., printers, FAX machines, etc.,

7. List the major goals of design process.


The major goals of design process are:
• Less manufacturing cost
• Performance (both overall speed and deadlines)
• Low power consumption
8. What are the challenges of embedded
system?
The challenges present in embedded system are:
• Hardware needed for the design
• Meeting the deadlines
• Minimizing the power consumption
• Design for upgradeability
• Complex testing
• Limited observability and controllability
• Restricted development environment
9. What are the typical characteristics of an embedded system?
Typical characteristics of an embedded system:
• Complex Algorithms
• Sophisticated user interface
• Real-Time operations
• Multi-rate system
10. Differentiate top-down approach from bottom-up approach in embedded system design.

1. Top down design proceeds from abstract 1. Bottom up approach gives perfect insight
description of the system and conclude into how later stages of the design
with concrete details. process will turn out.
Requirements Requirements

Specification Specification

Architecture Architecture

Components Design Components Design

System Integration System Integration


2. It is most often used in designing new 2. It is sometimes used when one is reverse
embedded systems. engineering a design, (i.e.) when one is
trying to figure out what somebody else
designed in an existing design.

11. What are the requirements for embedded system design?


Requirements for embedded system design are informal descriptions of what the customer
wants. The overall goal of creating a requirements document is to have effective communication
between the customers and the designers. There are two types of requirements: functional and non-
functional. Functional requirements states what the system must do. Non-functional requirements
include attributes like physical size, cost, performance and design time.What are the tests to be satisfied
for a good set of requirements?
The tests to be satisfied for a good set of requirements are:
• Correctness
• Unambiguousness
• Completeness
• Verifiability
• Consistency
• Modifiability
• Traceability
12. Differentiate between requirements and specification.
Requirements are informal descriptions of what the customer wants, while specifications are
more detailed, precise, and consistent descriptions of the system that can be used to create the
architecture.

13. What are the various components in embedded computed system?


• CPU
• BUS
• Memory devices
• Input and Output devices

PART A (2 Marks)
ARM PROCESSOR AND PERIPHERALS
1. List the features of RISC architecture.
• Fixed 32-bit instruction size with predefined formats
• Load - store architecture
• Large register bank of 32–bit registers

2. List the features of RISC processor.


• Hardwired decode logic.
• Pipelined execution
• Single cycle execution
• Smaller die size.
• Shorter development time.
• Higher performance.
• Higher clock rate with single cycle execution

3. What are the basic components of a Processor?


The basic components of processor are a program counter (PC), an accumulator; an
arithmetic-logic unit (ALU) and an instruction register (IR)

4. List the Disadvantages of RISC Processor.


• RISCs generally have poor code density.
• RISCs don’t execute x86 code

5. Mention the features of RISC which are used and rejected in ARM processors.
Features used:
1. Load store architecture
2. Fixed-length 32-bit instructions
3. 3-address instruction formats.
Features rejected:
1. Register windows
2. Delayed branches
3. Single cycle execution of all instructions.
6. List the types of ARM instructions.
All ARM instructions fall into one of the following three categories:
1. Data processing instructions
2. Data transfer instructions
3. Control flow instructions

7. What are the important features ARM instruction set?


➢ The load-store architecture
➢ 3-address data processing instructions
➢ conditional execution of every instruction
➢ the inclusion of very powerful load and store multiple register instructions
➢ Open instruction set extension through the coprocessor instruction set, including adding
new registers and data types to the programmer's model
➢ Very dense 16-bit compressed representation of the instruction set in the Thumb
architecture.

8. What are the Data Transfer Instructions in ARM?


➢ Single register load and store instructions
➢ Multiple register load and store instructions
➢ Single register swap instructions

9. Give the sequence of Pipeline in ARM.


➢ Fetch the instruction from memory (fetch)
➢ Decode it to see what sort ofinstruction it is (dec)
➢ Access any operands that may be required from the register bank (reg)
➢ Combine the operands to form the result or a memory address (ALU)
➢ Access memory for a data operand, if necessary (mem)
➢ Write the result back to the register bank (res)

10. List the features of ARM instruction set.


The most notable features of the ARM instruction set are:
• The load-store architecture
• 3-address data processing
• Conditional execution of every instruction;
• load and store multiple register instructions;
• Single instruction that executes in a single clock cycle;
• Open instruction set extension through the coprocessor instruction set
• Highly dense 16-bit compressed representation of the instruction setin the Thumb
architecture.

11. Mention the development tools available for ARM.


• ARM C compiler.
• ARM assembler.
• The linker.
• ARM symbolic debugger.
• ARMulator

12. How performance of a processor can be


increased?
There are only two ways to increase performance:
• Increase the clock rate, fclk. - This requires the logic in each pipeline stage to be simplified
and, therefore, the number of pipeline stages to be increased.
• Reduce the average number of clock cycles per instruction, CPI .- This requires either that
instructions which occupy more than one pipeline slot in a 3-stage pipeline ARM are re-
implemented to occupy fewer slots, or that pipeline stalls caused by dependencies between
instructions are reduced, or a combination of both.

13. What is meant by Von-Neumann bottleneck?


• Any stored-program computer with a single instruction and data memory will have its
performance limited by the available memory bandwidth.
• The fundamental problem with reducing the CPI relative to a 3-stage core is related to the
von Neumann bottleneck.
• To get a significantly better CPI the memory system must deliver more than one value in
each clock cycle.

14. Explain the ARM CPSR format.

15. Explain the types of multiplier used in ARM processors.


Two styles of multiplier have been used:
• Older ARM cores include low-cost multiplication hardware that supports only the 32-bit
result multiply and multiply-accumulate instructions.
• Recent ARM cores have high-performance multiplication hardware andsupport the 64-bit
result multiply and multiply-accumulate instructions.

16. Mention the data types supported by ARM processors.


ARM processors support six data types:
• 8-bit signed and unsigned bytes.
• 16-bit signed and unsigned half-words; these are aligned on 2-byteboundaries.
• 32-bit signed and unsigned words; these are aligned on 4-byte boundaries

17. Explain the types of memory organization in ARM.


• little-endian
• big-endian
Most ARM chips remain strictly neutral in the dispute and can be configured to work with either
memory arrangement, though they default to little-endian.

18. List the operating modes of ARM processor.


• Normal user mode.
• Software interrupt mode.
• Fast interrupt mode.
• Abort mode.
• System mode.
• Standard interrupt mode.
• Undefined trap mode.
19. Mention the flags used in ARM.
• The N flag is set if the result is negative, otherwise it is cleared (that is, N equals bit 31 of
the result).
• The Z flag is set if the result is zero, otherwise it is cleared.
• The C flag is set to the carry-out from the ALU when the operation is arithmetic (ADD,
ADC, SUB, SBC, RSB, RSC, CMP, and CMN) or to the carry-out from the shifter
otherwise. If no shift is required, C is preserved.
• The V flag is preserved in non-arithmetic operations. It is set in an arithmetic operation if
there is an overflow from bit 30 to bit 31 and cleared if no overflow occurs.

20. What is the state of ARM after a data abort?


The state of the ARM after a data abort depends on the particular processor and, with some
processors, on the early/late abort configuration:
• In all cases the PC is preserved (so on data abort exception entryr14_abt contains the
address of the faulting instruction plus eight bytes).
• The base register will either be unmodified, or will contain a value modified by auto-
indexing (it will not be overwritten by a loaded value).
• Other load destination registers may have been overwritten, but the correct value will be
loaded when the instruction is retried.

21. Define supervisor mode.


The ARM processor supports a protected supervisor mode. The protection mechanism
ensures that user code cannot gain supervisor privileges without appropriate checks being carried
out to ensure that the code is not attempting illegal operations. These functions generally include
any accesses to hardware peripheral registers, and to widely used operations such as character input
and output

22. List the features of LPC2148?


• The LPC2148 is a 16 bit or 32 bit ARM7 family based microcontroller available in a small
LQFP64 package.
• ISP (in system programming) or IAP (in application programming) using on-chip boot
loader software.
• On-chip static RAM is 8 kB-40 kB, on-chip flash memory is 32 kB-512 kB, the wide
interface is 128 bit, or accelerator allows 60 MHz high-speed operation.
• It takes 400 milliseconds time for erasing the data in full chip and 1 millisecond time for 256
bytes of programming.

23. Explain about Timer/Counter in LPC2148?

• LPC2148 Timer has input of peripheral clock (PCLK) or an external clock. It counts the clock
from either of these clock sources for its operation.
• LPC2148 Timer/Counter can generate an interrupt signal at specified time value.
• LPC2148 has match registers that contain count value which is continuously compared with the value
of the Timer register. When the value in the Timer register matches the value in the match register,
specific action (timer reset, or timer stop, or generate an interrupt) is taken.

24. Discuss in detail about different types of Stack operation in ARM Processor?

ARM stacks are very flexible since the implementation is completely left to the software. Stack
pointer is a register that points to the top of the stack. Normally, there are four different stack
implementations depending on which way the stack grows.

1. Ascending stack

An Ascending stack grows upwards. It starts from a low memory address and, as items are pushed onto
it, progresses to higher memory addresses.

2. Descending stack

A Descending stack grows downwards. It starts from a high memory address, and as items are pushed
onto it, progresses to lower memory addresses. The previous examples have been of a Descending
stack.

3. Empty stack

In an Empty stack, the stack pointers points to the next free (empty) location on the stack, i.e. the place
where the next item to be pushed onto the stack will be stored.

4. Full stack

In a Full stack, the stack pointer points to the topmost item in the stack, i.e. the location of the last item
to be pushed onto the stack.

PART B
1. Write a note on ARM Processor.
2. With examples explain various instruction sets in ARM processor.
3. Write a note on CPU Programming input and output , Supervisor mode, exception and traps.
4. Draw the memory hierarchy in ARM processor and explain each block?
5. Discuss about RISC and compare RISC with CISC.
6. Draw and explain different registers organization available in ARM processors.
7. Discuss in detail about ARM LPC2148.
8. List the functions of ARM processor in different modes.

PART C

1. Why does ARM have a ‘link register’? Which is the branch instruction that takes advantages of the
link register?
UNIT III – EMBEDDED PROGRAMING

1. What is mean by linking and loading? [Apr./May 2019]


Linking: Combining a set of programs, including library routines, to create a loadable image.
➢ Resolving symbols defined within the set
➢ Listing symbols needing to be resolved by loader
Loading: Copying the loadable image into memory, connecting it with any other programs
already loaded, and updating addresses as needed.
➢ (in all systems) kernel image is special (own format)

2. Define embedded programming? [Apr./May 2019]


Embedded programming is a specific type of programming that supports the creation of devices that
don't operate on traditional operating systems. The idea of embedded programming is part of what drives the
evolution of the digital appliances and equipment.

3. Outline the significance of CDFG. [Nov.\Dec. 18]


A data flow graph is a model of program with no conditionals. A code segment with no
conditional means a basic block with one entry and one exit point. It is an acyclic graph that uses single-
assignment code.

5. What is the disadvantage of nested loops in embedded programs?


[Apr./May 2017]
The disadvantage of nested loops in embedded program is that there will be more overhead due to the
lot of conditions that must be checked each time before entering the actual processing which will
increase the processing time of the loop which is not
desirable in case of embedded systems.

6. How power can be optimized at the program level? [Nov./Dec. 17]


❖ Power consumption is a particularly important design metric for battery powered systems
because the battery has a very limited life time.
❖ The following technique to reduce the power consumption
➢ To replace the algorithm with other algorithm which contains less power consume.
➢ Memory accesses are major component of power consumption in many
applications. By optimizing memory accesses significantly reduce power.

7. What is Data Flow Graph and Control/Data Flow Graph (CDFG)?


[Nov./Dec. 2016]
❖ A Data Flow Graph is a model of program with no conditionals. A code segment with no
conditionals means a basic block with one entry and one exit point. It is an acyclic graph that uses
single-assignment code.
❖ A Control/Data Flow Graph is a program with conditionals. It contains branching and looping.

8. What does a linker do? [Nov. 2012]


A linker allows a program to be stitched together out of several smaller pieces of code. The
linker operates on the object files created by the assembler and modifies the assembled code to make
the necessary links between files. It finds the starting address of each object file and merges the symbol
tables into a large table and resolves the address.
.
9. List out the various compiler optimizations. [Nov. 2013]
Some of the compiler optimization techniques are:
❖ Loop unrolling
❖ Loop fusion
❖ Loop distribution
❖ Loop tiling
❖ Array padding
❖ Dead code elimination

10. What are the different CPU buses? State the function of each one.
[May 2013, Nov. 2014]
The different CPU buses are:
❖ Data bus – Bus that can carry data to or from the CPU
❖ Address bus – Bus that transmits address for the access
❖ Control bus
❖ Clock – Provides synchronization to the bus components
❖ R/W – True when the bus is reading or false if the bus is writing
❖ Data Ready – Signals when the values on the data bundle are valid

11. Draw the CDFG for the following code fragment. [Apr. 2011]
for (i=0; f=0; i<N; i++)
f = f+c[i] * x[i];
12. State the principle of basic compilation technique. [May 2013]
Compilation = Translation + Optimization
Compilation begins with high-level language code such as C or C++ and generally produces
assembly code. The high-level language program is parsed to break it into statements and expressions.
In addition a symbol table is generated which includes all the named objects in a program. Some
compilers may then perform high-level optimizations that can be viewed as modifying the high-level
language program input without reference to instructions.

13. What is a cross-compiler? [Apr. 2011]


A cross-compiler is a compiler that runs on one type of machine but generates code for another.
After compilation, the executable code is typically downloaded to the embedded system by USB. eg:
Keil compiler.

14. Differentiate a reentrant program from a non-reentrant program by giving an example.

A program is reentrant, if it can be interrupted If a program changes the value of global


by another call to the function without changing variables, it may give different answer
the results of either call. when it is called recursively. This is said
to be a non-reentrant
program.
int task1(int foo) int foo = 1;
{ int task1 ( )
return foo+1; {
} foo = foo + 1;
return foo;
}
15. Give the difference between assembler and compiler.
❖ Compiler turns a high level language into assembly code by using translation and optimization
❖ Assembler turns the assembly code into an object code by two pass method and it also
generates a symbol table.
Give the difference between compiler and Interpreter.Examples of Interpreter

➢ Python
➢ Ruby
➢ PHP
❖ Examples of Compiler
➢ C
➢ C++
➢ GO

16. What is a symbol table and how is it built?


➢ The name of each label and its address is stored in a symbol table that is built during the first pass
of an assembler.
➢ The symbol table is built by scanning from the first instruction to the last. During scanning the
current location in memory is kept in Program Location Counter (PLC).
➢ If the instruction begins with a label a new entry is made into the symbol table which includes the
label name and its value which is equal to the current value of the PLC.
PART B (16 Marks)
1. Explain how embedded system is useful in competing with computing platform.
2. Explain the platform-level performance level by considering the bus bandwidth and memory
access time.
3. Discuss in detail the components of embedded program.
4. Explain the various programming models.
5. For the basic block given below, obtain the single assignment form and also show the DFG
for that form.
x=a+b; y=c+d;
z=x+e;
6. Discuss in detail about assembly and linking with examples.
7. Describe the basic compilation techniques. (or) Explain in detail about the compilation process
in high level languages.
8. Write in detail about the compiler optimization techniques.
9. Write about the program level performance analysis of embedded computing system design.
10. Explain any three loop optimization techniques with suitable examples.

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