Processor Power Management Subsystem: Description Features
Processor Power Management Subsystem: Description Features
Processor Power Management Subsystem: Description Features
DESCRIPTION FEATURES
WM8310 is an integrated power-management subsystem Power Management
which provides a cost-effective, flexible, single-chip solution for • 2 x DC-DC synch. buck converter (0.6V - 1.8V, 1.2A, DVS)
power management, specifically targeted at the requirements • 1 x DC-DC synch. buck converter (0.85V - 3.4V, 1A)
of a range of low-power portable applications. WM8310 is • 1 x DC-DC boost converter (up to 30V, up to 170mA)
specifically designed to operate as a system PMIC supporting
• 1 x LDO regulator (0.9V - 3.3V, 300mA, 1Ω)
a variety of industry standard processors and accessories in a
wide range of applications. • 2 x LDO regulators (0.9V - 3.3V, 200mA, 1Ω)
• 3 x LDO regulators (0.9V - 3.3V, 100mA, 2Ω)
The start-up behaviour and configuration is fully programmable
• 2 x Low-noise LDO regulators (1.0V - 3.5V, 200mA, 1Ω)
in an integrated OTP non-volatile memory. This highly flexible
solution helps reduce time-to-market, as changing application • 2 x Low-noise LDO regulators (1.0V - 3.5V, 150mA, 2Ω)
requirements can be very easily accommodated in the OTP • 1 x ‘always on’ regulator (0.8V – 1.55V, up to 10mA)
contents. Backlight LED Current Sinks
The WM8310 power management subsystem comprises of • 2 x programmable constant current sinks, suitable for
four programmable DC-DC converters, eleven LDO regulators multi-LED display backlight control
(four of which are low-noise for supplying sensitive analogue Battery Charger
subsystems). The integrated OTP bootstrap circuitry controls • Programmable single-cell lithium-ion / lithium-polymer
the start-up sequencing and voltages of the converters and battery charger (1A max charge current)
regulators as well as the sequencing of system clocks. • Battery monitoring for temperature and voltage
WM8310 can be powered from a battery, a wall adaptor or • Autonomous backup battery charging and switching
from a USB power source. An on-chip regulator provides System Control
power for always-on PMIC functions such as register map and •
2
I C or SPI compatible primary control interface
the RTC. The device provides autonomous backup battery
• Interrupt based feedback communication scheme
switchover. A low-power LDO is included to support ‘always-
on’ processor power domains external to the WM8310. • Watchdog timer and system reset control
• Autonomous power sequencing and fault detection
A linear on-chip battery charger supports trickle charging and
• Intelligent power path and power source selection
constant current / constant voltage charging of single-cell
lithium-ion / lithium-polymer batteries. The charge current, • OTP memory bootstrap configuration function
termination voltage, and charger time-out are programmable. Additional Features
WM8310 detects and handles battery fault conditions with a • Auxiliary ADC for multi-function analogue measurement
minimum of system software involvement. • 128-bit pseudo-random unique ID
A 12-bit Auxiliary ADC supports a wide range of applications • Secure Real-time clock with wake-up alarm
for internal as well as external analogue sampling, such as • 12 x configurable multi-function (GPIO) pins
voltage detection and temperature measurement. • Comprehensive clocking scheme: low-power 32kHz RTC
WM8310 includes a crystal oscillator, an internal RC oscillator crystal oscillator, Frequency Locked Loop, GPIO clock
and Frequency Locked Loop (FLL) to generate all clock signals output and 4MHz RC clock for power management
for autonomous system start-up and processor clocking. A • System LED outputs indicating power state, battery
Secure Real-time Clock (S-RTC) and alarm function is charger or fault status
included, capable of waking up the system from low-power • Selectable USB current limiting up to 1.8A (in accordance
modes. A watchdog function is provided to ensure system with USB Battery Charging specification Rev 1.1)
integrity. Package Options
To maximise battery life, highly-granular power management • 7x7mm, 169-ball BGA package, 0.5mm ball pitch
enables each function in the WM8310 subsystem to be
independently powered down through a control interface or APPLICATIONS
alternatively through register and OTP-configurable GPIOs.
The device offers a standby power consumption of <10uA, • Portable Media Players
making it particularly suitable for portable applications. • Portable Navigation Devices
• Cellular Handsets
The WM8310 is supplied in a 7x7mm 169-ball BGA package,
ideal for use in portable systems. The WM8310 forms part of • Electronic Books
the Wolfson series of audio and power management solutions. • Electronic Gaming Devices
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WM8310 Product Brief
BLOCK DIAGRAM
TYPICAL APPLICATIONS
The WM8310 is designed as a system PMIC device that manages multiple power supply paths (wall
adapter, USB, battery) and generates configurable DC supplies to power processors and associated
peripherals within a system. The WM8310 provides three step-down DC-DC converters and one step-
up DC-DC converter. Eleven LDO regulators provide a high degree of flexibility to provide power to
multiple devices, with the capability to power-up and power-down different circuits independently.
Two of the DC-DC step-down converters are specifically designed to handle rapid changes in load
current, as required by modern application processors; selectable operating modes allow the
converters to be optimally configured for light, heavy or transient load conditions they can also be
tailored for minimum PCB area, maximum performance, or for maximum efficiency. The analogue
LDOs provide low-noise outputs suitable for powering sensitive circuits such as RF / Wi-Fi / cellular
handset applications.
The WM8310 powers up the converters and LDOs according to a programmable sequence. A
configurable ‘SLEEP’ state is also available, providing support for an alternate configuration, typically
for low-power / standby operation. The power control sequences and many other parameters can be
stored in an integrated user-programmable OTP memory or may loaded from an external memory.
The WM8310 supports the programming and verification of the integrated OTP memory.
The WM8310 provides power path management which seamlessly switches between wall adapter,
USB and battery power sources according to the prevailing conditions. A backup battery supply is
also supported in order to maintain the Real Time Clock (RTC) in the absence of any other supplies.
The WM8310 provides a battery charger for the main battery aswell as the backup battery; these can
be powered from either the wall adapter or USB supplies.
Programmable GPIO pins may be configured as hardware inputs for general use or for selecting
different power management configurations. As outputs, the GPIOs can provide indications of the
device status, or may be used as control signals for other power management circuits. The WM8310
also provides two LED drivers, which can be controlled manually or configured as status indicators for
the OTP memory programmer, operating power state or battery charger.
PIN CONFIGURATION
1 2 3 4 5 6 7 8 9 10 11 12 13
BATTFETEN
A PVDD1 DC3FB DC3VDD DC3LX DC3GND DC2VDD DC2LX DC2GND DC1GND DC1LX DC1VDD DC1FB A
A_N
B GND GND GND DC3VDD DC3LX DC3GND DC2VDD DC2LX DC2GND DC1GND DC1LX DC1VDD GND B
C LDO6VDD LDO6VOUT GND GND DNC DC2FB GND GND GND GND GND GND IRQ_N C
D LDO5VDD LDO5VOUT GND PROGVDD SDOUT1 GND SDA1 SCLK1 DBVDD1 CS_N RESET_N GND GPIO2 D
E LDO4VDD LDO4VOUT GND GND GPIO1 GPIO3 GPIO7 GPIO8 DBVDD1 LDO13VOUT DC4FB GND GPIO9 E
F LDO10VDD LDO10VOUT LDO9VOUT GND GND GND GPIO5 GPIO6 GPIO4 GND GND GND DC4VDD F
G LDO8VDD LDO9VDD LDO8VOUT GND AUXADCIN4 GND GND GND GND GPIO12 GPIO11 DC4LX DC4GND G
BACKUPVD
H LDO7VDD LDO7VOUT DNC NTCBIAS NTCMON VREFC GND SDA2 DNC DNC GPIO10 DBGND H
D
J LDO3VDD LDO3VOUT CIFMODE WALLVDD SYSVDD SYSVDD USBVMON IREFR AUXADCIN1 GND LED1 DBVDD3 DNC J
WALLFETE
K LDO2VDD LDO2VOUT DBGND SYSVDD SYSVDD USBVDD BATTVMON GND GND LED2 DNC LDO11VOUT K
NA_N
L LDO1VDD LDO1VOUT DBGND CLKOUT USBVDD BATTVDD SYSVDD GND GND XTI ISINKGND ISINK2 REFGND L
M GND DNC DNC DBGND USBVDD GND GND GND SCLK2 XTO ISINKGND ISINK1 AUXADCIN2 M
N DNC DNC DBVDD2 CLKIN SYSVMON SYSVDD BATTVDD USBVDD PVDD2 LDO12VOUT ON_N XOSCGND AUXADCIN3 N
ORDERING INFORMATION
ORDER CODE TEMPERATURE PACKAGE MOISTURE SENSITIVITY PEAK SOLDERING
RANGE (TA) LEVEL TEMPERATURE
WM8310GEB/V -40°C to +85°C 169-ball (7 x 7mm) MSL3 260°C
(Pb-free)
WM8310GEB/RV -40°C to +85°C 169-ball (7 x 7mm) MSL3 260°C
(Pb-free, tape and reel)
Note:
Reel quantity = 2200
PIN DESCRIPTION
Notes:
1. Pins are sorted by functional groups.
2. The power domain associated with each pin is noted; VPMIC is the domain powered by LDO12 for the ‘always-on’
functions; INTVDD is the domain powered by LDO13 which supplies the control circuitry for many of the power
management blocks.
PIN NAME TYPE POWER DESCRIPTION
DOMAIN
Auxiliary ADC
J7 USBVMON Analogue Input USBVDD USBVDD Supply Voltage Monitor
N5 SYSVMON Analogue Input SYSVDD SYSVDD Supply Voltage Monitor
K8 BATTVMON Analogue Input BATTVDD BATTVDD Supply Voltage Monitor
Analogue Auxiliary Analogue Input 1 /
J9 AUXADCIN1
Input/Output Battery Charge Current Monitor Output
SYSVDD
M13 AUXADCIN2 Analogue Input Auxiliary Analogue Input 2
N13 AUXADCIN3 Analogue Input Auxiliary Analogue Input 3
G5 AUXADCIN4 Analogue Input DBVDD3 Auxiliary Analogue Input 4
Clocking and Real Time Clock
M10 XTO Analogue Output Crystal Drive Output
VPMIC
L10 XTI Analogue Input Crystal Drive Input or 32.768kHz CMOS Clock Input
N12 XOSCGND Supply Crystal Oscillator Ground
L4 CLKOUT Digital Output CMOS Clock Output
DBVDD2
N4 CLKIN Digital Input CMOS FLL Clock Input
General Purpose Input / Output
E5 GPIO1 Digital I/O GPIO Pin 1
DBVDD1 or
D13 GPIO2 Digital I/O GPIO Pin 2
VPMIC
E6 GPIO3 Digital I/O GPIO Pin 3
F9 GPIO4 Digital I/O GPIO Pin 4
DBVDD1 or
F7 GPIO5 Digital I/O GPIO Pin 5
SYSVDD
F8 GPIO6 Digital I/O GPIO Pin 6
E7 GPIO7 Digital I/O GPIO Pin 7
DBVDD1 or
E8 GPIO8 Digital I/O GPIO Pin 8
VPMIC
E13 GPIO9 Digital I/O GPIO Pin 9
H12 GPIO10 Digital I/O GPIO Pin 10
DBVDD1 or
G11 GPIO11 Digital I/O GPIO Pin 11
SYSVDD
G10 GPIO12 Digital I/O GPIO Pin 12
Processor Interface and IC Control
ON Request Pin
N11 ¯¯¯
ON Digital Input VPMIC
(Internal pull-up)
System Reset Input and Open Drain Output.
D11 RESET
¯¯¯¯¯¯ Digital I/O DBVDD1
(Internal pull-up)
PMIC Interrupt Flag Output.
C13 IRQ
¯¯¯ Digital Output DBVDD1 Configurable Open Drain / CMOS mode.
(Internal pull-up in Open Drain mode.)
Primary Control Interface Mode Select:
2
J3 CIFMODE Digital Input DBVDD2 0 = I C Compatible Control Interface Mode
1 = SPI Compatible Control Interface Mode
2
SPI Compatible Control I C Compatible Control
Interface Mode Interface Mode
Control Interface Serial
D5 SDOUT1 Digital Output DBVDD1 No Function
Data Out
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The WM8310 has been classified as MSL3.
CONDITION MIN MAX
OTP Programming Supply (PROGVDD) -0.3V 7.0V
BATTVDD, WALLVDD and USBVDD supplies -0.3V 7.0V
Input voltage for LDO regulators -0.3V 7.0V
Input voltage for DC-DC converters -0.3V 7.0V
Digital buffer supply (DBVDD1, DBVDD2, DBVDD3) -0.3V 4.5V
Voltage range for digital inputs -0.3V DBVDD + 0.3V
Operating Temperature Range, TA -40°C +85°C
Junction Temperature, TJ -40°C +125°C
Thermal Impedance Junction to Ambient, θJA 45°C/W
o
Storage temperature prior to soldering 30 C max / 60% RH max
Storage temperature after soldering -65°C +150°C
Soldering temperature (10 seconds) +260°C
Note: These ratings assume that all ground pins are at 0V.
The OTP Programming Supply PROGVDD should only be present when programming the OTP. At other times, this pin should be
left unconnected.
PACKAGE DIAGRAM
B: 169 BALL BGA PLASTIC PACKAGE 7 X 7 X 1.17 mm BODY, 0.50 mm BALL PITCH DM062.B
5
D
2 A DETAIL 1
A2 13 12 11 10 9 8 7 6 5 4 3 2 1
A
A1
B
4
CORNER
C
F
e
G E1 E
H 6
J
N
2X 0.10 Z
e
2X 0.10 Z
DETAIL 2 D1 TOP VIEW
SIDE VIEW BOTTOM VIEW
SOLDER BALL
bbb Z
aaa Z
1 Z b
A1
3
DETAIL 2
DETAIL 1 ccc Z X Y
ddd Z
NOTES:
1. PRIMARY DATUM -Z- AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS .
2. THIS DIMENSION INCLUDES STAND-OFF HEIGHT ‘A1’.
3. DIMENSION ‘b’ IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER, PARALLEL TO PRIMARY DATUM -Z-.
4. A1 CORNER IS IDENTIFIED BY INK/LASER MARK ON TOP PACKAGE.
5. BILATERAL TOLERANCE ZONE IS APPLIED TO EACH SIDE OF THE PACKAGE BODY .
6. ‘e’ REPRESENTS THE BASIC SOLDER BALL GRID PITCH.
7. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE.
8. FALLS WITHIN JEDEC, MO-195
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