Lab Number: 6

Lab Title:
Minimization of the equation
using K-maps

DEPARTMENT OF COMPUTING
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Experiment No 6

Minimization of the equation using K-Maps

6.1 Objectives
After completing this experiment, student will be able to:

• Use a Karnaugh map to simplify the expression.

• Use don’t care condition in K-Map based simplification.
• Design a logic circuit based on K-Map.
• Build and test a circuit that implements the simplified expression.

6.2 Background Theory

A combinational circuit is the digital logic circuit in which the output depends on the
combination of inputs at that point of time with total disregard to the past state of the inputs.
The digital logic gate is the building block of combinational circuits. The function implemented
by combinational circuit is depend upon the Boolean expressions. On the other hand, sequential
logic circuits, consists of both logic gates and memory elements such as flip-flops. Figure1
below shows the combinational circuit having n inputs and m outputs. The n number of inputs
shows that there are 2𝑛 possible combinations of bits at the input. Therefore, the output is
expressed in terms m Boolean expressions.

Figure 1: Combinational Circuit

Karnaugh maps or K-maps for short provide another means of simplifying and optimizing
logical expressions. This is a graphical technique that utilizes a sum of product (SOP) form.
SOP forms combine terms that have been ANDed together that then get ORed together. This
format lends itself to the use of De Morgan's law which allows the final result to be built with
only NAND gates. The K-map is best used with logical functions with four or less input
variables. One of the advantages of using K-maps for reduction is that it is easier to see when

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a circuit has been fully simplified. Another advantage is that using K-maps leads to a more
structured process for minimization.

In order to use a K-map, the truth table for a logical expression is transferred to a K-map grid.
The grid for two, three, and four input expressions are shown in figure 2. Each cell corresponds
to one row in a truth table or one given state in the logical expression. The order of the items
in the grid is not random at all; they are set so that any adjacent cell differs in value by the
change in only one variable. Because of this, items can be grouped together easily in rectangular
blocks of two, four, and eight to find the minimal number of groupings that can cover the entire
expression. Note that diagonal cells require that the value of more than two inputs change, and
that they also do not form rectangles.

Figure 2: K-Map Grid

6.2.1 Overview of 3 variables K-Map

Three Variables Karnaugh's Map often known as 3 variables K-Map is a special method used
in the context of digital electronics to minimize the AND, OR & NOT gates logical expressions.
The variables A, B & C are used to address the cells of KMAP table to place the 1s based on
the Boolean expression. A is the most significant bit (MSB) and B is the least significant bit
(LSB) in the logical expressions used in the KMAP solver. Each variable A, B & C equals to
value 1. Similarly, each inverted variable A, B & C equals to 0.

Figure 3: Three variables K-Map

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Now we get the following truth table and we want to simplify it.
Table 1: Truth Table

Sr. No X Y Z Output

1 0 0 0 1

2 0 0 1 0

3 0 1 0 1

4 0 1 1 0

5 1 0 0 1

6 1 0 1 0

7 1 1 0 1

8 1 1 1 1

a) Find SOP (Sum of Product)

Solution:
By circling the ones

F=Z'+XY
b) Find POS (Product of Sum)
Solution:
By circling the zeros

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 F' = X'Z+ Y'Z
F = (X'Z+ Y’Z)'
F = (X+Z')(Y+Z')
6.2.2 Overview of 4 variables K-Map
Four Variables Karnaugh's Map often known as 4 variables K-Map. It's an alternate method to
solve or minimize the Boolean expressions based on AND, OR & NOT gates logical
expressions or truth tables. The four variables A, B, C & D are the binary numbers which are
used to address the min-term SOP of the Boolean expressions. The gray code conversion
method is used to address the cells of K-Map table.

Figure 4: Four variables K-Map

Simplify the following Boolean function.

F = A’B’CD+A'BCD +ABCD+AB'CD+ABC'D'+ABC'D+ABCD'

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6.2.3 Don’t Care Condition
One of the very significant and useful concepts in simplifying the output expression using K-
Map is the concept of “Don’t Cares”. The “Don’t Care” conditions allow us to replace the
empty cell of a K-Map to form a grouping of the variables which is larger than that of forming
groups without don’t cares. While forming groups of cells, we can consider a “Don’t Care”
cell as 1 or 0 or we can also ignore that cell. Therefore, “Don’t Care” condition can help us to
form a larger group of cells.

A Don’t Care cell can be represented by a cross(X) in K-Maps representing an invalid

combination. For example, in Excess-3 code system, the states 0000, 0001, 0010, 1101, 1110
and 1111 are invalid or unspecified. These states are called don’t cares.

A standard SOP function having don’t cares can be converted into a POS expression by keeping
don’t cares as they are, and writing the missing minterms of the SOP form as the maxterm of
POS form. Similarly, a POS function having don’t cares can be converted to SOP form keeping
the don’t cares as they are and writing the missing maxterms of the POS expression as the
minterms of SOP expression.

For Example:

Minimise the following function in SOP minimal form using K-Maps:

i) F = m (1, 5, 6, 11, 12, 13, 14) + d (4)

The SOP K-map for the given expression is

Therefore, SOP minimal is:

F = BC' + BCD' + A'C'D + AB'CD
ii) F (A, B, C, D) = m (0, 1, 2, 3, 4, 5) + d (10, 11, 12, 13, 14, 15)

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Writing the given expression in POS form:
F (A, B, C, D) = m (6, 7, 8, 9) + d (12, 13, 14, 15)
The POS K-map for the given expression is:

Therefore, POS minimal is:

F = (A'+ C) (B' + C')

iii) F (A, B, C, D) = m (1, 2, 6, 7, 8, 13, 14, 15) + d (0, 3, 5, 12)

The SOP K-map for the given expression is:

Therefore,

F = AC'D' + A'D + A'C + AB

6.2.3.1 Significance of Don’t Care Conditions

Don’t Care conditions have the following significance in designing of the digital circuits:

Simplification of the output

These conditions denote inputs that are invalid for a given digital circuit. Thus, they can used
to further simplify the Boolean output expression of a digital circuit.

Reduction in number of gates required

Simplification of the expression reduces the number of gates to be used for implementing the
given expression. Therefore, don’t cares make the digital circuit design more economical.

Reduced Power Consumption

While grouping the terms long with don’t cares reduces switching of the states. This decreases
the memory space that is required to represent a given digital circuit which in turn results in
less power consumption.

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Represent Invalid States in Code Converters
These are used in code converters. For example- In design of 4-bit BCD-to-XS-3 code
converter, the input combinations 1010, 1011, 1100, 1101, 1110, and 1111 are don’t cares.

Prevention of Hazards in Digital Circuits

Don’t cares also prevent hazards in digital systems.

6.3 Lab Activities

6.3.1 Task-1: Simplify given logic expression using 3 variable K-Map
Implement the resulting logic circuit and perform truth table-based verification.
F (A, B, C) =Σ (1,2,3,5,6,7)

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6.3.2 Task-2: Simplify given logic expression using don’t care condition
and 4 variable K-Map
Implement the resulting logic circuit and perform truth table-based verification.
F (A, B, C) = Σ m (1, 5, 6, 12, 13, 14) + d (2, 4)

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6.3.3 Task-3: Design a 4-bit even parity generator
Simplify the circuit using K-Map and Implement the resulting logic circuit. Perform truth
table-based verification.

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 Lab Exercise and Summary

Summary should cover Introduction, Procedure, Data Analysis and Evaluation.

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Student’s Signature: ________________ Date: ________________

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 Evaluation Criteria
Method of Evaluation: Viva, File submitted on LMS.

Excellent Good Satisfactory Unsatisfactory Poor Marks

Obtained
10 9-7 6-4 3-1 0

Assignment All tasks Most tasks Some tasks Most tasks All tasks were
completed were were were incomplete or
correctly in completed completed incomplete or incorrect.
given time correctly. correctly and incorrect and
and have a Tasks could have an have no Didn’t
complete be improved incomplete understanding perform tasks
understanding further and understanding and have no
have a understanding
complete
understanding

Total

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