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Electronic Circuits 2: EC 432 - Lecture # 10

Service manual

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0% found this document useful (0 votes)
5 views20 pages

Electronic Circuits 2: EC 432 - Lecture # 10

Service manual

Uploaded by

karamsobieh
Copyright
© © All Rights Reserved
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Download as pps, pdf, or txt
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EC 432 - Lecture # 10

ELECTRONIC CIRCUITS 2

Intro
duct
Tech ion to I
nolo C
gies

Hani Fikry – Khaled Shehata


What is an Integrated Circuit ?

•A combination of interconnected
elements (components and
devices) inseparably fabricated
on a single crystal substrate
(mostly silicon).
Types of Integrated Circuits

Standard Custom

Logic Families
(mostly TTL and CMOS)
Application-Specific
HW Programmable Integrated Circuits :
(mostly PLA and ROM) ASICs
(mixed analog/digital)
SW Programmable
(mostly EPROM, P)

Analog
(mostly Opamps, Regulators)
Types of Integrated Circuits

Custom

Application-Specific
Integrated Circuits :
ASICs
(mixed analog/digital)
The complete
application-
specific board
is integrated
in a single chip
Why Integrated Circuits ? (1)

• Better reliability (lower failure rate)


• More than 50 to 60 % of failures  dry solder joints
Example: 20 bit register (TTL: 1FF=6 gates, 1 Gate=5 Tr + 4 resistances)

solution Discrete TTL IC Single


# joints at Chip
Package 1800 160 24

PCB 1600 180 Non

PCB 180 Non Non


Racks
Total 3580 340 24
Why Integrated Circuits ? (2)

• Higher performance
• Lower power consumption
• Lower cost
• Simpler testing and troubleshooting
• Higher security (hard reverse engineering)
• Faster design
• Small size
DEFINING TERMS

* Wafer
• Chip (Die)
• System
• Electronic-Grade (EG) Silicon
•Single-Crystalline EG Silicon
• Silicon ingot
• Batch processing for mass production
* Packaged Chip (IC)
* Die Bonding
* Wire Bonding
* Production Cycle
WHAT IS A WAFER ?

* A large circular sheet of single


crystalline silicon
( = 8”, 10” or 12”, thickness =
0.5 - 1 mm, resistivity 0.1- 20 
cm, p-type or n-type, CZ grown,
mirror-like polished surface).
* Many identical chips are to be
fabricated on a single wafer
( typically 500 chip/wafer).
* Many wafers are to be
processed simultaneously (batch
processing).
WHAT IS A CHIP ?

*A small piece of silicon (nearly square) on


which the entire circuit is fabricated.

* Typical size = many mms to few cms per


side

* Standard P Chip in the year 2005:


size 0.95” per side
# of transistors 200 Million
Transistor channel length 0.1 m
Clk frequency 2 - 3.5 GHz
Supply voltage 1 V
Power dissipation 160 W
WHAT IS A SYSTEM ?

A chip set
in a given
application
Electronic Grade (EG) Silicon from Sand

*Starting raw material = Quartzite (relatively pure sand)


*Carbon reduction at 1200oC:
SiO2(impure)+2C=Si(MG)+2CO

*Purification (Siemens process) at 300oC:


Si(MG)+3HCl(g)= H2(g)+ SiHCl3(g)+imp. chlorides
*SiHCl3 (TCS: Tri-Chloro-Silane) boiling pt.=32oC
*Multiple fractional distillation gives EG pure TCS
*Back hydrogen reduction at 1000oC:
H2(g)+ SiHCl3(pure gas) = Si(EG polycrystals)+3HCl(g)

* Load a crucible by EG polycrstalline Si


* Melt the EG Si (1430oC)
* Crystallization from the melt (Czochralski Method):
Liquid (melt) Solid by cooling
Liquid (melt) Crystal by slow cooling + seed
CZOCHRALSKI
CRYSTAL PULLER

Pull rate = 2 mm/mn


Seed holder
Rotation speed = 2 rpm
seed

crystal
Silicon melt
Silicon melt
TYPICAL
CRYSTAL
FAB
FACILITY
Wafer
slicing

8”
(200mm)
to
12” >3m
(300mm)

Weight > 60 kg
Potential for Mass
Production

Batch Processing
Batch= 50 - 250 wafer

Die (Chip) Slicing


Wafer = 100-500 chips
Packaged Chip (IC) (DIP: Dual In-line Package)

Bonding Wire

Chip
L
Mounting
Cavity

L’ Lead Frame

Pin
Through-Hole

SM
Make Rise- and Fall Times as slow as possible
Die Bonding

* Fixing a chip inside a


package cavity.

* Apply a glue on the


cavity surface and
press
the chip backside
down
Connecting chip terminals (pads)
To
Package terminals (pins)

Package
Chip
Wire Bonding

A special sewing machine


is
used for wire bonding
using
Production Cycle

Market study - Idea - Feasibility study - Design - Prototype fabrication -


Packaging - Testing and evaluation - Mass production

Design
Fabrication
Packaging
Final Product

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