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DLC Ut2

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Soorya Priya Gopala Krishna
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6 views

DLC Ut2

Question Paper

Uploaded by

Soorya Priya Gopala Krishna
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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LOYOLA INSTITUTE OF TECHNOLOGY Roll No.

:
UT 2 Sem: SEMESTER 3
B.E-ELECTRICAL AND ELECTRONICS ENGINEERING Date:
Time:1.30 hrs

Course: EE3302- DIGITAL LOGIC CIRCUITS Mark(s):50

Instruction: ****ATTEND ALL THE QUESTIONS*******


****ALL THE VERY BEST***************
Part A
[5*2=10]

Q.No Question

1 What do you mean by race around condition in a flip-flop? CO 3 [2] [K2]

2 Difference between synchronous and asynchronous counter. Synchronous counter CO 3 [2] [K2]

3 Mention the applications of counter? CO 3 [2] [K2]

4 What is a modulo counter, ring and johnson counter? CO 3 [2] [K1]

5 What is the difference between truth table and excitation table? CO 3 [2] [K2]

Part B
[2*13=26]

Q.No Question

6 Describe the design and procedure with neat diagram about 4 bit bidirectional shift register with CO 3 [13] [K2]

parallel load?

7 Discuss about a 3 bit (MOD 8) Synchronous UP/Down counter with neat state diagram, state table, CO 3 [13] [K2]

excitation table, K-map simplification and its circuit diagram.

Part C
[1*14=14]

Q.No Question

8.1 Explain the operation ,state diagram,and characteristics of T flip flop and master slave JK flip flop. CO 3 [14] [K2]

(or)

8.2 A sequential circuit with two D flip flops A and B, input X and output Y is specified by the CO 3 [14] [K2]

following next state and output equations: A (t+1) = AX+BX; B (t+1) = A’X; Y= (A+B) X’. (i)
Draw the logic diagram. (ii) Construct the state table. (iii) Draw the state diagram.

Level Competence level under revised Bloom’s Taxonomy Question Number Marks Allotted % of Marks

1 Remembering(K1) 0 0

2 Understanding(K2) 8 14 28

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