INTERFACE
INTERFACE
The method that is used to transfer information between internal storage and
external I/O devices is known as I/O interface. The CPU is interfaced using
special communication links by the peripherals connected to any computer
system. These communication links are used to resolve the differences
between CPU and peripheral. There exists special hardware components
between CPU and peripherals to supervise and synchronize all the input and
output transfers that are called interface units.
Mode of Transfer:
The binary information that is received from an external device is usually stored
in the memory unit. The information that is transferred from the CPU to the
external device is originated from the memory unit. CPU merely processes the
information but the source and target is always the memory unit. Data transfer
between CPU and the I/O devices may be done in different modes. Data
transfer to and from the peripherals may be done in any of the three possible
ways
1. Programmed I/O.
2. Interrupt- initiated I/O.
3. Direct memory access( DMA).
Now let’s discuss each mode one by one.
1. Programmed I/O: It is due to the result of the I/O instructions that are
written in the computer program. Each data item transfer is initiated by an
instruction in the program. Usually the transfer is from a CPU register and
memory. In this case it requires constant monitoring by the CPU of the
peripheral devices.
Example of Programmed I/O: In this case, the I/O device does not have
direct access to the memory unit. A transfer from I/O device to memory
requires the execution of several instructions by the CPU, including an input
instruction to transfer the data from device to the CPU and store instruction
to transfer the data from CPU to memory. In programmed I/O, the CPU stays
in the program loop until the I/O unit indicates that it is ready for data
transfer. This is a time consuming process since it needlessly keeps the
CPU busy. This situation can be avoided by using an interrupt facility. This is
discussed below.
2. Interrupt- initiated I/O: Since in the above case we saw the CPU is kept
busy unnecessarily. This situation can very well be avoided by using an
interrupt driven method for data transfer. By using interrupt facility and
special commands to inform the interface to issue an interrupt request signal
whenever data is available from any device. In the meantime the CPU can
proceed for any other program execution. The interface meanwhile keeps
monitoring the device. Whenever it is determined that the device is ready for
data transfer it initiates an interrupt request signal to the computer. Upon
detection of an external interrupt signal the CPU stops momentarily the task
that it was already performing, branches to the service program to process
the I/O transfer, and then return to the task it was originally performing.
The I/O transfer rate is limited by the speed with which the processor can
test and service a device.
The processor is tied up in managing an I/O transfer; a number of
instructions must be executed for each I/O transfer.
3. Direct Memory Access: The data transfer between a fast storage media
such as magnetic disk and memory unit is limited by the speed of the CPU.
Thus we can allow the peripherals directly communicate with each other
using the memory buses, removing the intervention of the CPU. This type of
data transfer technique is known as DMA or direct memory access. During
DMA the CPU is idle and it has no control over the memory buses. The DMA
controller takes over the buses to manage the transfer directly between the
I/O devices and the memory unit.
1. Bus grant request time.
2. Transfer the entire block of data at transfer rate of device because the
device is usually slow than the speed at which the data can be
transferred to CPU.
3. Release the control of the bus back to CPU So, total time taken to
transfer the N bytes = Bus grant request time + (N) * (memory transfer
rate) + Bus release control time.
4. Buffer the byte into the buffer
5. Inform the CPU that the device has 1 byte to transfer (i.e. bus grant request)
6. Transfer the byte (at system bus speed)
7. Release the control of the bus back to CPU.
Advantages:
Disadvantages:
Input/Output Controller
Input/Output Controller is a component that attaches with each device and is used to
accept input and provide output to these devices. Applications access I/O devices with
the help of these I/O controllers. Thus I/O controller is a peripheral device that enables
the main processor to transfer data between the host system and I/O devices. The I/O
controller is a special purpose processor and are autonomous in nature. Autonomous
means that I/O controllers carry out operations on I/O devices while the main CPU
continues to execute programs.. The CPU controls the activities of an I/O controller by
writing into and reading from I/O ports. I/0 controllers have certain registers to store
data and control signals. These registers are:
1. The Control register contains that show the functioning of devices i.e. one bit
shows whether the device communicates in half duplex or full duplex mode,
another bit shows party checking and third bit shows the word length of data.
2. The Status register holds bits that show the status of I/O command. These bits
indicate the success, busy or failure status of a command.
3. Input registers contain the input read by the end user.
4. The output registers hold the output written by the host. The program counter
holds the address of next instruction to be executed by the processor.
Polling
Polling is a technique used by units such as CPU or a program to check the status of I/O
devices. If the device is not in the required status, checking unit will continue with its
work without waiting for the device to achieve required status Polling is also called
busy-waiting because a device is busy in checking the status of other device. Polling is a
common approach to handling multiple I/O device by expanding the busy-waiting loop
of checking status. When a device is found with the desired status CPU branch the
device with corresponding Interrupt Service Routine (ISR) so that interrupts produced by
that device is handled by ISR. ISR, after performing an I/O operation, terminates. The
device is again branched into the busy-waiting loop. Busy-wait loop ensures that CPU
services each device as status of device is checking continuously.
Interrupts
Whenever a process needs to perform I/O it can use an interrupt. Interrupts stop the
execution of a program to perform other tasks, such as numerical computation.
Interrupt signal an event to occur. If an interrupt occurs, the CPU stores the current
status of the process in the program registers and stop the program execution. CPU
starts executing the interrupt. When CPU finishes its processing, it regains the status of
process and continue its execution. I/O devices that halt the normal functioning of the
processor generate various types of interrupts:
1. Synchronous I/O. Halts the program and execute the I/O operation. After the
completion of the I/O operation; the previous state of the program is resumed. At
the time of processing, I/O operation CPU remains idle.
2. Asynchronous I/O. Execute the 1/0 operation without halting the program in
between. The I/O operations run with other operations of a program
simultaneously.
Flag Register:
Accumulator:
There are six general-purpose registers. These registers can hold 8-bit values.
These 8-bit registers are B,C,D,E,H,L. These registers work as 16-bit registers
when they work in pairs like B-C, D-E, and H-L. Here registers W and Z are
reserved registers. We can’t use these registers in arithmetic operations. It is
reserved for microprocessors for internal operations like swapping two 16-bit
numbers. We know that to swap two numbers we need a third variable hence
here W-Z register pair works as temporary registers and we can swap two 16-
bit numbers using this pair.
Program Counter :
Program Counter holds the address value of the memory to the next instruction
that is to be executed. It is a 16-bit register.
For Example: Suppose current value of Program Counter : [PC] = 4000H
(It means that next executing instruction is at location 4000H.After
fetching,program Counter(PC) always increments
by +1 for fetching of next instruction.)
Stack Pointer :
It works like a stack. In stack, the content of the register is stored that is later
used in the program. It is a 16-bit special register. The stack pointer is part of
memory but it is part of Stack operations, unlike random memory access. Stack
pointer works in a continuous and contiguous part of the memory. whereas
Program Counter(PC) works in random memory locations. This pointer is very
useful in stack-related operations like PUSH, POP, and nested CALL
requests initiated by Microprocessor. It reserves the address of the most recent
stack entry.
Temporary Register:
It is an 8-bit register that holds data values during arithmetic and logical
operations.
It is an 8-bit register that holds the instruction code that is being decoded. The
instruction is fetched from the memory.
The timing and control unit comes under the CPU section, and it controls the
flow of data from the CPU to other devices. It is also used to control the
operations performed by the microprocessor and the devices connected to it.
There are certain timing and control signals like Control signals, DMA Signals,
RESET signals and Status signals.
Interrupt control:
The data bus is bidirectional and carries the data which is to be stored. The
address bus is unidirectional and carries the location where data is to be stored.
In the 8085 microprocessor, the address bus and data bus are two separate
buses that are used for communication between the microprocessor and
external devices.
The Address bus is used to transfer the memory address of the data that needs
to be read or written. The address bus is a 16-bit bus, allowing the 8085 to
access up to 65,536 memory locations.
The Data bus is used to transfer data between the microprocessor and external
devices such as memory and I/O devices. The data bus is an 8-bit bus, allowing
the 8085 to transfer 8-bit data at a time. The data bus can also be used for
instruction fetch operations, where the microprocessor fetches the instruction
code from memory and decodes it.
The combination of the address bus and data bus allows the 8085 to
communicate with and control external devices, allowing it to execute its
program and perform various operations.
It controls the serial data communication by using Serial input data and Serial
output data.
Serial Input/Output control in the 8085 microprocessor refers to the
communication of data between the microprocessor and external devices in a
serial manner, i.e., one bit at a time. The 8085 has a serial I/O port (SID/SOD)
for serial communication. The SID pin is used for serial input and the SOD pin is
used for serial output. The timing and control of serial communication is
managed by the 8085’s internal circuitry. The 8085 also has two special
purpose registers, the Serial Control Register (SC) and the Serial Shift Register
(SS), which are used to control and monitor the serial communication.
The 8085 microprocessor is a versatile 8-bit microprocessor that has been used
in a wide variety of applications, including:
1. Embedded Systems: The 8085 microprocessor is commonly used in
embedded systems, such as industrial control systems, automotive
electronics, and medical equipment.
2. Computer Peripherals: The 8085 microprocessor has been used in a variety
of computer peripherals, such as printers, scanners, and disk drives.
3. Communication Systems: The 8085 microprocessor has been used in
communication systems, such as modems and network interface cards.
4. Instrumentation and Control Systems: The 8085 microprocessor is
commonly used in instrumentation and control systems, such as temperature
and pressure controllers.
5. Home Appliances: The 8085 microprocessor is used in various home
appliances, such as washing machines, refrigerators, and microwave ovens.
6. Educational Purposes: The 8085 microprocessor is also used for educational
purposes, as it is an inexpensive and easily accessible microprocessor that
is widely used in universities and technical schools.