G100RF-Shemy
G100RF-Shemy
G100RF-Shemy
PHASE 1 F5A
K5
~ +
E23 INVERTER BOARDS DEPENDING ON GENERATOR OUTPUT POWER
~
REFER TO PAGE 5 FOR LOGIC LEVELS, PHASE 2
E1 + E1 + E1 +
F5B 560 VDC INVERTER INVERTER INVERTER
NOTES, ETC, REFERENCED BY OUT
HEXAGONAL SYMBOL: 3 PHASE AC ** BOARD
E2 -
BOARD
E2 -
BOARD
E2 -
~
PHASE 3 F5C
MAINS INPUT E11
-
NEUTRAL
E16 E9 F2
GROUND + DUAL SPEED STARTER
IS OPTIONAL. LOW SPEED
-**
560 VDC
E8 E10 F1 STARTER IS STANDARD
IN INDICO 100 GENERATORS
BUFFER &
K1
DRIVER DUAL SPEED STARTER BOARD
+12VDC
F2 CIRCUIT
JW3
T1
JUMPER POSITION:
1 PHASE GENERATORS 2
1
SOFT START OK
F1
J6-1 380/400/480 VAC
*
JUMPER PINS 2-3 PROTECTION 1 J6-3
3 PHASE GENERATORS 3 CIRCUIT D2 DC 240 VAC
JUMPER PINS 1-2 2 J4-10 J4-10
K1 BUS
D3 OK 208 VAC
J4-8 J4-8 N/C
J4-18 J4-18
TUBE 1 / TUBE 2 SELECT 5 J3-9 J2-9
COMMAND TO MD-0787 REFER TO MD-0764
K3
J4-17 J4-17 LOW SPEED STARTER BOARD
DC BUS ASSEMBLY
P1-1 P1-4
J6-1 380/400/480 VAC TAPS
*
K1
J12-1 J12-4 NO CONNECTION
T1
F2 240 VAC
BUFFER & J6-3
DRIVER
F1 CIRCUIT 208 VAC
J4-14 J4-14
J4-15 J4-15 D9 J3-9
+12VDC
J4-16 J4-16 OK +12V
J4-18 J4-18
J10-3
K3 FAN(S) USED ON FLUORO GENERATORS
K4
J4-17 J4-17 J10-1 ONLY. DEPENDING ON THE APPLICATION,
ONE OR TWO FANS MAY BE USED
+12V
6 K3
J11-4
J11-6
H.T. TANK
J4-5 J4-5 K4 REFER TO PAGE 1
J8-3
E21 E17 OPTIONAL 230 VAC
J8-1
J1-1 F2 +12V
J1-25 J1-6 J1-10 J1-29 J1-18 J1-19 J2-14 J2-6 J2-15 J2-7 J1-4
CONTROL BOARD
J1-3
J10-25 J10-6 J10-10 J10-29 J10-18 J10-19 J3-14 J3-6 J3-15 J3-7 J1-2 F1
+5V 13 -12V
OPTO-COUPLER
J1-5
"ON" = K5
CLOSED
-35V
TP2
+5V +5V +5V J1-6
CONT. 10 11 12
DS9 DS10 + - FILAMENT BOARD
GRN RED BUFFER /
BUFFER AND P/S ON DRIVER CIRCUIT DRIVER CIRCUIT DRIVER
DRIVER CIRCUIT
TO 2.1 V DS34 DS35 DS22 DS23 CIRCUIT DS2 DS4
CURRENT
SINK GRN RED
TO 2.1 V
TUBE 1/TUBE 2
SELECT SIGNAL
TO MD-0787
FLUORO FLUORO
TO 2.1 V
LOW HIGH
TO 2.1 V
* THE POWER SUPPLY ON COMMAND (P/S ON) WHICH ENERGIZES
K1 / K2 ON THE POWER INPUT BOARD IS ISSUED BY THE GENERATOR
CPU BOARD AFTER THE +5 VDC RAIL IS DETECTED BY THE CPU.
14 15 CURRENT 16 CURRENT 17 CURRENT
SINK SINK SINK THE DC RAILS, INCLUDING THE +5 VDC RAIL, ARE ESTABLISHED
WHEN THE SYSTEM ON COMMAND IS RECEIVED. REFER TO MD-0762.
REGISTER
INVERTING
REGISTER AND REGISTER REGISTER
BUFFER
BUFFER
DRAWN DATE
DATA BUS
* G. SANWALD
CHECKED________
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
D0..D7 DES.\MFG.\AUTH.
HTW 10 MAR 2000 MD-0788 REV F
GENERATOR CPU BOARD
PAGE 3 SHEET 3 OF 5
J4-12 J5-12 +5V
REFER TO SYSTEM ON, MD-0762
24 VDC RETURN J4-14 J5-14
TP2 TP4
TP3 CONSOLE BOARD & LCD DISPLAY
K3 ASSEMBLY SHOWN WITHIN DASHED
24 VDC J4-13 J5-13 24 VDC F1 + 5 / -12VDC
POWER SUPPLY LINES USED ON 31 X 42 CM CONSOLE
J4-15 J5-15 & REGULATOR ONLY. REFER TO PAGE 5 FOR
+24V +15V
23 X 56 CM CONSOLE AND FOR
TP5
TP13 TP1 RAD-ONLY CONSOLE.
+15 V -12V
REGULATOR
T2 J1-2 24 VDC
18 VAC F5 +5V
RECTIFIER &
FILTER CIRCUIT J10-1
J1-1 TP3 300 VAC FLUORESCENT LAMP
0V +12V
BACKLIGHT
F6 + 5 / +16VDC TP2 POWER SUPPLY J10-4
J1-3 F3 K2 POWER SUPPLY -12V
18 VAC CIRCUIT +12 V
+/- 24 VDC REGULATOR LCD DISPLAY ASSEMBLY
FROM J1-4
RECTIFIER & TP6
PAGE 1, 2 0V
FILTER CIRCUIT
J1-5 F4 -12 V
18 VAC REGULATOR
CONSOLE BOARD
J1-7 F2 TP7
110 VAC -24V
-12V 220 VAC 220 VAC
J1-9 F1 -15 V
220 VAC REGULATOR 110 VAC J2-1 J1-1 110 VAC
110 VAC
K1 TP5 +24V J2-3 J1-3 +24VDC
220 VAC -15V
J2-6 J1-6
18 s
K1
TOP: CONSOLE BOARD &
KEYBOARD ASSEMBLY P1-3 J3-3 J5-10
AS USED ON 31 X 42 CM REFER TO DC BUS &
CONSOLES. GENERATOR ON/OFF LOGIC AND
K2 POWER DISTRIBUTION,
MIDDLE: CONSOLE CPU RELAY DRIVER CIRCUIT
P1-2 J3-2 J5-11 MD-0788, PAGE 4
BOARD, DISPLAY BOARD, ON DS1
AND KEYBOARD ASSY 3
AS USED ON 23 X 56 CM OFF
K3
CONSOLES. P1-1 J3-1 J5-12
BOTTOM: CONSOLE BOARD
& KEYBOARD ASSEMBLY
AS USED ON RAD-ONLY CONSOLE
CONSOLES. BOARD
KEYBOARD ASSEMBLY
OFF
P1-1 J2-1 J3-5 J6-5 J5-12 J4-12
CONSOLE CPU
KEYBOARD ASSEMBLY DISPLAY BOARD BOARD
OFF
P1-17 J7-17 J8-3 J4-12
CONSOLE
KEYBOARD ASSEMBLY BOARD GENERATOR INTERFACE BOARD
USE DRAWING DC BUS & POWER DISTRIBUTION, MD-0788, IN CONJUNCTION WITH THIS DOCUMENT
NOTE
REMARKS
REFERENCE
MOMENTARILY PRESSING ON CONNECTS THIS LINE TO “24 VDC RETURN”. THIS LATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD,
1 ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING). SEE NOTE ADJACENT TO JW1 ON THIS DOCUMENT. DRAWN DATE
G. SANWALD 02 JUN 2000
CHECKED_________ SYSTEM ON
MOMENTARILY PRESSING OFF CONNECTS THIS LINE TO “24 VDC RETURN”. THIS UNLATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD, _________
2 DE-ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING). DES.\MFG.\AUTH.
L. FOSKIN 02 JUN 2000
MD-0762 REV C
DS1 LIT INDICATES THE PRESENCE OF THE 24 VDC SUPPLY SHOWN. THIS 24 VDC SUPPLY WILL BE PRESENT IF THE GENERATOR IS CONNECTED TO A
3
LIVE AC MAINS SUPPLY. SHEET 1 OF 1
+24V
NOTE *
TB1-5 J2-15 J9-15
TABLE 4 3 2 1 JW7
STEPPER TB1-4 J2-16 J9-16
INPUT +24V
NOTE *
TB2-5 J2-13 J9-13
+24V
BUCKY 4 3 2 1 JW10
NOTE *
CONTACTS TB2-4 J2-14 J9-14
4 3 2 1 JW9
TB2-7 J2-11 J9-11
COLLIMATOR
INTERLOCK TB2-6 J2-12 J9-12 +24V
NOTE *
TB3-5 J2-24 J9-24
4 3 2 1 JW2
REMOTE TOMO
SELECT TB3-4 J2-25 J9-25 ** J12-1 J6-1
D0
TOMO
J12-2 J6-2
EXPOSURE TB3-6 J2-23 J9-23 D1
+24V
TB4-4 J2-21 J9-21
4 3 2 1 JW3
TB4-6 J2-20 J9-20
D3 J12-4 J6-4
THERMAL +24V
SWITCH 2 TB4-7
REGISTER, BUFFER,
AND ADDRESS
TB4-8 J2-19 J9-19 T2 FROM MD-0787
DECODER CIRCUITS D4 J12-5 J6-5
THERMAL
SWITCH 1 TB4-9
T1 FROM MD-0787
TB5-12 J2-17 J9-17 D5 J12-6 J6-6
REMOTE
PREP TB6-7 J2-6 J9-6 +24V
NOTE *
TB6-10 J2-3 J9-3
4 3 2 1 JW14
REMOTE
+24V
EXPOSURE TB6-9 J2-4 J9-4
NOTE *
REGISTERS ON THE GENERATOR INTERFACE
4 3 2 1 JW15 BOARD LATCH THE OPTO-COUPLER OUTPUTS
TP14 J2-1 J9-1 (”LOW” OR “HIGH” LOGIC LEVEL). THE
** APPROPRIATE OUTPUT REGISTER(S) ARE
J2-2 J9-2
SELECTED BY THE ADDRESS DECODERS, AND
THE REGISTER CONTENTS ARE
TRANSFERRED TO THE DATA BUS VIA
BUFFER CIRCUITS
ROOM INTERFACE BOARD GENERATOR INTERFACE BOARD GENERATOR CPU BOARD
THIS PAGE SHOWS THE ROOM INTERFACE INPUTS. ROOM INTERFACE OUTPUTS ARE
SHOWN ON PAGE 2
* * DRAWN DATE
24 VDC EXTERNAL INPUT POSITION DRY CONTACT INPUT POSITION G. SANWALD 13 APR 2000 ROOM
FOR JW2, JW3, JW6, JW7, JW8, JW9, FOR JW2, JW3, JW6, JW7, JW8, JW9, CHECKED
14 APR 2000
INTERFACE
** ADDITIONAL CIRCUITS ARE USED IN THE AREAS INDICATED **. THESE CIRCUITS ARE NOT JW10, JW14, JW15 SHOWN. JW10, JW14, JW15 SHOWN. JUMPER S. BLAKE
JUMPER CONNECTS PINS 2-3; 24 VDC CONNECTS PINS 1-2 AND 3-4; AN DES.\MFG.\AUTH.
RELEVANT TO THIS ROOM INTERFACE DIAGRAM, HOWEVER, THEY ARE PART OF THE X-RAY APPLIED EXTERNALLY ACTIVATES EXTERNAL DRY CONTACT CLOSURE
EXPOSURE FUNCTION AND ARE SHOWN ON MD-0761 ACTIVATES THE INPUT(S) BY ENERGIZING L. FOSKIN 13 APR 2000 MD-0763 REV B
THE INPUT(S) BY ENERGIZING THE
APPROPRIATE OPTO-COUPLER. THE APPROPRIATE OPTO-COUPLER.
SHEET 1 OF 2
FOR +24 VDC SOURCE, REFER TO
MD-0788, PAGE 4, TP13 ON +24V
GENERATOR INTERFACE BOARD
J9-40 J2-40 TB1-2
JW12
TOMO / BUCKY 4
J9-39 J2-39 K1 TB1-1
SELECT
THIS PAGE SHOWS THE ROOM INTERFACE * LIVE CONTACT LIVE CONTACT ** LIVE CONTACT 24VDC LIVE CONTACT 24VDC
DRAWN DATE
OUTPUTS. ROOM INTERFACE INPUTS ARE G. SANWALD 13 APR 2000 ROOM
SHOWN ON PAGE 1 CHECKED INTERFACE
DRY CONTACT DRY CONTACT S. BLAKE 14 APR 2000
DRY CONTACT DRY CONTACT DES.\MFG.\AUTH.
DRY CONTACT POSITION FOR LIVE CONTACT 24VDC POSITION
DRY CONTACT POSITION LIVE CONTACT POSITION JW6 TO JW8 SHOWN. FOR JW6 TO JW8 SHOWN. L. FOSKIN 13 APR 2000 MD-0763 REV B
FOR JW1 TO JW5 SHOWN. FOR JW1 TO JW5 SHOWN. JUMPER CONNECTS JUMPERS CONNECT
JUMPER CONNECTS PINS 4-6 JUMPER CONNECTS PINS 6-8 PINS 2-3 PINS 1-2 AND 3-4 SHEET 2 OF 2
1. NOTE: THE PORTION OF THE REMOTE FLUORO EXPOSURE,
REMOTE EXPOSURE, AND REMOTE TOMO SELECT INPUTS +24V +24V
J12-17 J6-17 EXPOSURE ENABLE COMMAND
SHOWN WITHIN THE DASHED OUTLINES IS DETAILED ON TO J10-35 (PAGE 2)
MD-0763, PAGE 1 3
TP6
J5-9 J4-9
ADDRESS DECODERS, J12-7 J6-7
BUFFER, REGISTER
AND DRIVER CIRCUITS
REGISTER
4
KV CONTROL
DATA BUS +24V
REFER TO MD-0759
D0..D7
J13-7 J9-3
MA CONTROL
FOOT REFER TO MD-0760
SWITCH J13-9
J9-4
J9-24
PREP P1-19
J9-25
J6-8
X-RAY DATA BUS
P1-20 ADDRESS DECODERS, J12-8 D0..D7
THE CONSOLE BOARD & BUFFER, REGISTER
KEYBOARD ASSEMBLY AND DRIVER CIRCUITS GENERATOR CPU BOARD
SHOWN WITHIN DASHED REMOTE REGISTER, BUFFER, 4
TOMO AND ADDRESS
LINES IS USED ON 31 X 42 CM SELECT DRAWN DATE
CONSOLE ONLY. REFER TO PAGE DECODER CIRCUITS
INPUT G. SANWALD 26 APR 2000 X-RAY EXPOSURE
3 FOR 23 X 56 CM CONSOLE CHECKED
AND RAD-ONLY CONSOLE.
KEYBOARD ASSEMBLY S. BLAKE 26 APR 00
RAD/FLUORO
DES.\MFG.\AUTH.
GENERATOR INTERFACE BOARD
26 APR 2000
MD-0761 REV D
L. FOSKIN
SHEET 1 OF 4
TUBE 1 / TUBE 2 MISMATCH &
THERMOSTAT OPEN SIGNAL
FROM MD-0787
13
J1-4
AUXILIARY BOARD
KV
EN INVERTER RESET COMMAND TO MD-0759, PAGE 1 &
DS30 DS31 +5V DS26 X-RAY 14 CIRCUIT MD-0760, PAGE 2
TP10
GRN RED YEL KV ENABLED
J1-14
DETECTOR ENABLE COMMAND TO MD-0764
6 TO 2.1 V 8 CIRCUIT
CURRENT PREP
SINK
DS27 DS28 9 J10-14
J1-33 J9-9 J3-9
GRN RED
10 J9-7 J3-7
7 TO 2.1 V
CURRENT J10-33 15
SINK H.T. TANK
TP18
J1-15 PREP ENABLED
BUFFER AND J10-15 DETECTOR PREP COMMAND TO MD-0764 & MD-0765
REGISTER CIRCUIT
DRIVER CIRCUIT
J10-34
J1-34 J1-3
BUFFER / DRIVER CONTINUED
CIRCUIT J1-22
11 “GENERATOR ON PAGE 3
J10-16
READY”
DETECTOR
DATA BUS
CIRCUIT
18
D0..D7 12
EXPOSURE ENABLE COMMAND J10-35
FROM PAGE 1 +/- 12V/SS FAULT FROM MD-0788,
PAGE 3 (CONTROL BOARD)
J1-16 X-RAY REQUEST
DETECTOR FILAMENT FAULT FROM MD-0760, PAGE 1
CIRCUIT
STATOR FAULT FROM MD-0764 & MD-0765
DRAWN DATE
G. SANWALD 26 APR 2000 X-RAY EXPOSURE
CHECKED RAD/FLUORO
S. BLAKE 26 APR 00
DES.\MFG.\AUTH.
L. FOSKIN 26 APR 2000
MD-0761 REV D
SHEET 2 OF 4
+5V
+5V
P/S
READY
DS17 DS18
GRN RED
1
19 TO 2.1 V
CURRENT
SINK J5-6
OPTO-COUPLER “ON” J4-6
= GENERATOR READY J5-7
INVERTING J4-7 TO
J5-8 GENERATOR
BUFFER J4-8
J1-3 J10-3 INTERFACE
FROM BOARD
J1-22 J10-22
PAGE 2 (PG 1)
J5-9
J4-9
REGISTER
DATA BUS
D0..D7
CONTROL BOARD GENERATOR CPU BOARD
DATA BUS
D0..D7
1
TB1-1
TP12 TP13
FOOT
J8-4 TO SWITCH
+5V +5V J4-7 GENERATOR TB1-2
J8-5
J4-8 INTERFACE
J8-3 BOARD
J4-9 (PG 1) TB1-3
PREP
HAND TB1-4
X-RAY
SWITCH
CPU
TB1-5
COM
PREP P1-2
X-RAY
P1-1 DRAWN DATE
G. SANWALD 26 APR 2000 X-RAY EXPOSURE
CHECKED RAD/FLUORO
KEYBOARD ASSEMBLY CIRCUITS SHOWN WITHIN S. BLAKE 26 APR 00
DASHED LINES ARE USED DES.\MFG.\AUTH.
ON RAD-ONLY CONSOLE. L. FOSKIN 26 APR 2000
MD-0761 REV D
SHEET 3 OF 4
NOTE
REMARKS
REFERENCE
“LOW” (APPROXIMATELY 0 VDC) AT THESE POINTS INDICATES FOOT SWITCH INPUT CLOSED, PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED RESPECTIVELY. “HIGH” (APPROXIMATELY 24 VDC) =
1 OPEN CIRCUIT (I.E. NOT PRESSED) FOOT SWITCH, OR PREP SWITCH, OR X-RAY SWITCH. FOR RAD-ONLY CONSOLE, “LOW” INDICATES PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED, RESPECTIVELY.
2 “LOW” (APPROXIMATELY 1 VDC) = AN X-RAY EXPOSURE HAS BEEN REQUESTED VIA ONE OF SEVERAL EXPOSURE INPUTS. “HIGH” (APPROXIMATELY 24 VDC) = NO X-RAY EXPOSURE HAS BEEN REQUESTED.
3 EXPOSURE ENABLE LINE. “LOW” (APPROXIMATELY 0 VDC) INDICATES AN X-RAY EXPOSURE REQUEST, “HIGH” (APPROXIMATELY 5 VDC) = NO X-RAY EXPOSURE HAS BEEN REQUESTED.
THE CATHODE OF THE ASSOCIATED LED IS HELD “LOW” UNDER CPU CONTROL DURING AN X-RAY EXPOSURE REQUEST ONLY. NO MEANINGFUL MEASUREMENTS CAN BE MADE ON THIS LINE AS THIS IS A
4 DATA LINE. THE REQUIRED DATA IS LATCHED BY THE REGISTER CIRCUIT(S) AT THE APPROPRIATE TIME.
THE OUTPUT OF THE ASSOCIATED LED IS LATCHED BY A REGISTER. THIS IS THEN READ BY THE DATA BUS AT THE APPROPRIATE TIME. AS THIS IS A DATA LINE, NO MEANINGFUL MEASUREMENTS CAN BE
5 MADE AT THIS CONNECTION.
6 DS30 LIT = KV ENABLE REQUEST SENT. THIS IS NECESSARY TO MAKE AN X-RAY EXPOSURE. DS31 LIT = KV ENABLE NOT REQUESTED.
7 DS27 LIT = PREP REQUEST SENT. DS28 LIT = PREP NOT REQUESTED.
8 DS26 LIT = X-RAY EXPOSURE IN PROCESS.
9 “HIGH” (APPROXIMATELY 5 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED.
10 “HIGH” (APPROXIMATELY 5 VDC) = PREP REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED.
11 “HIGH” (APPROXIMATELY 5 VDC) = X-RAY REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED.
12 “LOW” = X-RAY EXPOSURE REQUESTED AS PER # 3. THIS LINE MUST BE “LOW” IN ORDER FOR THE X-RAY EXPOSURE LED’S ON THE CONTROL BOARD TO BE ENERGIZED (SEE # 16).
13 “LOW” = (APPROXIMATELY 0 VDC) = TUBE 1 / TUBE 2 MISMATCH OR THERMOSTAT OPEN FAULT. “HIGH” (APPROXIMATELY 12 VDC) = NO FAULT.
14 “HIGH” (APPROXIMATELY 12 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED.
15 “HIGH” (APPROXIMATELY 12 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED.
16 “HIGH” (APPROXIMATELY 12 VDC) = X-RAY REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED.
17 “HIGH” (APPROXIMATELY 5 VDC) = OUTPUT DRIVE ENABLED, “LOW” (APPROXIMATELY 0 VDC) = OUTPUT DRIVE DISABLED.
ALL INPUTS TO THE “GENERATOR READY DETECTOR CIRCUIT” MUST BE AT THE CORRECT LOGIC LEVEL IN ORDER TO BE ABLE TO MAKE AN X-RAY EXPOSURE. THIS MEANS ALL FOUR FAULT INPUTS SHOWN
18
MUST BE CLEARED, AND THE KV ENABLE AND PREP COMMANDS MUST BE PRESENT.
DS17 LIT INDICATES GENERATOR READY TO MAKE AN EXPOSURE. THIS REQUIRES THAT ALL CONDITIONS PER # 18 BE SATISFIED. DS18 LIT INDICATES A “GENERATOR READY DETECTOR CIRCUIT” INPUT IS
19
NOT SATISFIED TO ENABLE AN X-RAY EXPOSURE.
DRAWN DATE
G. SANWALD 26 APR 2000 X-RAY EXPOSURE
CHECKED RAD/FLUORO
S. BLAKE 26 APR 00
DES.\MFG.\AUTH.
L. FOSKIN 26 APR 2000 MD-0761 REV D
SHEET 4 OF 4
REFER TO PAGE 4 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
BUFFER / J9-6
2 2 AMPLIFIER
TP6 TP8 TP9 TP8
J9-5
J10-12 J1-12 BUFFER DIFFERENCE KV FEEDBACK SIGNAL
BUFFER / CIRCUIT AMPLIFIER R215 FROM PAGE 3
J9-7
AMPLIFIER J10-31 J1-31
BUFFER / J9-8
HIGH KV / INVERTER FAULT AMPLIFIER
TO GENERATOR READY
DETECTOR CIRCUIT ON
CONTROL BOARD, RESET COMMAND
SEE MD-0761, PG 2 FROM MD-0761, PG 2 ANODE OVERVOLTAGE SIGNAL TO MD-0760, PG 2
HV ON SIGNAL CATHODE OVERVOLTAGE SIGNAL TO MD-0760, PG 2
TO MD-0767, PG 1
+12V
A/D 3
CONVERTER TP26 LOGIC +12V
D69
INVERTER
D82
kV
HIGH KV J14-1
DETECTOR INV 1 INVERTER 1 INVERTER 1
& LATCH FAULT FAULT J14-3
LATCH DETECTOR
COMPARATOR +12V
CIRCUIT
JW3 D81
125kV 150kV J15-1
INV 2 INVERTER 2 INVERTER 2 INVERTER FAULT SIGNAL
JUMPER POSITION: FAULT FAULT J15-3 FROM PAGE 2
125kV GENERATORS LATCH DETECTOR
JUMPER “125kV”
150 kV GENERATORS +12V
JUMPER “150kV”
D80
1 “OR” J16-1
CIRCUIT INV 3 INVERTER 3 INVERTER 3
TP2 FAULT FAULT J16-3
LATCH DETECTOR
J10-1
D/A BUFFER J10-7 J1-7
CONVERTER CIRCUIT ERROR J10-2
DIFFERENCE
AMPLIFIER
J10-26 J1-26 AMPLIFIER
CIRCUIT VCO GATING & MOSFET J10-3
PHASE LOGIC DRIVER
J10-4
DETECTOR CIRCUITS CIRCUITS
& RAMP
+12V GENERATOR
TP17 TP19 J11-1
D70 J11-2
4
PRIMARY INVERTER DRIVE SIGNAL
OVERCURRENT Ir J11-3 CONTINUED ON PAGE 2
DETECTOR J11-4
DATA BUS & LATCH
D0..D7
J12-1
J12-2
DRIVE ENABLE
COMMAND FROM J12-3
MD-0761, PAGE 2
J12-4
J13-1 J13-4
GENERATOR CPU BOARD CONTROL BOARD
E3
J10-3 J1-3
J10-4 J1-4 MOSFET MOSFET
SWITCHES SWITCHES
*
E4
J2-1
TO J15-1 INVERTER FAULT
J2-3 SIGNAL, TO PAGE 1
TO J15-3
E4
J2-1
TO J16-1 INVERTER FAULT
J2-3 SIGNAL, TO PAGE 1
TO J16-3
E4
C S
L
J3-7
KV FEEDBACK TO J9-7
SIGNAL
J3-8
TO PAGE 1 TO J9-8
ANODE
H.T. BOARD
J3-6
KV FEEDBACK TO J9-6
SIGNAL
J3-5
TO PAGE 1 TO J9-5
E9
FROM
PAGE 2
E10
C L
S
J2 **
CATHODE CATHODE
H.T. BOARD
12 VDC
0 VDC
FIGURE 1
DRAWN DATE
G. SANWALD 18 MAY 2000 KV CONTROL &
CHECKED FEEDBACK
S. BLAKE 18 MAY 2000
DES.\MFG.\AUTH.
18 MAY 2000
MD-0759 REV B
L.FOSKIN
SHEET 4 OF 4
+5V J2-8 5.5 A 6.5 A JW1 SELECTS MAXIMUM
JW1 1 2 3 FILAMENT CURRENT
5.5 OR 6.5 AMPS
J2-7
HV
DS11 DS12 FILAMENT SUPPLY BOARD (SMALL)
J10-5 J1-5
GRN RED
HV / MA FAULT
BUFFER / DRIVER
TO 2.1 V FROM MD-0761,
CIRCUIT J2-6 5.5 A 6.5 A JW1 SELECTS MAXIMUM
CURRENT PAGE 2
SINK J10-24 J1-24 JW1 1 2 3 FILAMENT CURRENT
5.5 OR 6.5 AMPS
J2-5
REGISTER OPTO-COUPLER
“ON” = NO HV / MA J3-2 J2-2 J3-8 BUFFER &
FAULT
J2-9 CURRENT LIMIT ERROR
CIRCUIT AMPLIFIER &
J3-10 J2-10 J3-7 DRIVER CIRCUIT
TP2
1 3
J3-9 TP1
TP3 J2-10
JUMPER POSITION:
INDICO GENERATORS INDICO 100 GENERATORS WITH STANDARD SINGLE FILAMENT BOARD (TYPICALLY USED IN RAD
JUMPER PINS 1-2
DO NOT USE JUMPER
ONLY GENERATORS) USE THE FILAMENT BOARD CONFIGURATION SHOWN BELOW
DS24 DS25 POSITION 2-3
8
J2 **
J5-1 J4-1 CATHODE 7 TP22 TP23
J5-3 J4-3
SMALL J5-4 J4-4
CATHODE
H.T. BOARD
FILAMENT SUPPLY
BOARD H.T.TANK
10 HIGH MA FAULT TO
TP3 TP2 GENERATOR READY A/D
DETECTOR CIRCUIT CONVERTER
+12V
ANODE OVERVOLTAGE ON CONTROL BOARD,
SIGNAL FROM MD-0759, PG 1 SEE MD-0761, PAGE 2
J1 ** D72
ANODE
ANODE I
S C 9 11
J3-1 J9-1 HIGH ANODE
L BUFFER / CURR DETECTOR Set Rad mA Gain TP4 TP5 11
J3-2 J9-2 AMPLIFIER & LATCH R216
ANODE TP10 TP7
H.T. BOARD
RAD MA Set Rad
J1-11 J10-11
FEEDBACK mA Fdbk
BUFFER /
CIRCUIT J1-30 J10-30 AMPLIFIER R34
E18 (-)
MA / mAs
E17 (+) SHORTING
LINK
RESET COMMAND
FROM MD-0761, PG 2 12
+12V Set Fluoro Set fluoro
mA Gain mA offset TP6 TP7 12
D71 R212 R213
CATHODE OVERVOLTAGE TP14 TP11
SIGNAL FROM MD-0759, PG 1
CATHODE I
9
J3-4 J9-4 HIGH CATHODE FLUORO MA J2-1 J3-1
L BUFFER / CURR DETECTOR FEEDBACK BUFFER /
C J3-3 J9-3 & LATCH CIRCUIT J2-9 J3-9
AMPLIFIER AMPLIFIER
S R88
CATHODE Set Fluoro
H.T. BOARD mA Fdbk DATA BUS
J2 ** D0..D7
CATHODE
DRAWN DATE
G. SANWALD 12 MAY 2000 FILAMENT DRIVE
CHECKED & MA CONTROL
S. BLAKE 12 MAY 2000
DES.\MFG.\AUTH.
L. FOSKIN 15 MAY 2000 MD-0760 REV D
SHEET 2 OF 3
NOTE
REMARKS
REFERENCE
1 FILAMENT REFERENCE OUTPUTS, GENERATED BY THE CPU. SCALING IS 1 VOLT OUT = 1 AMP OF FILAMENT CURRENT.
2 “HIGH” (APPROXIMATELY 5 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) = SMALL FOCUS SELECTED. THIS SIGNAL IS USED IN SINGLE FILAMENT SUPPLY GENERATORS ONLY.
3 “HIGH” (APPROXIMATELY 12 VDC) = FILAMENT FAULT (FILAMENT CURRENT < 2 A). “LOW” (APPROXIMATELY 0 VDC) = NO FILAMENT FAULT.
4 “HIGH” (APPROXIMATELY 12 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) SMALL FOCUS SELECTED.
PRIMARY FILAMENT CURRENT AT THESE POINTS SHOULD BE CONFIRMED USING A CURRENT PROBE ON ONE OF THE OUTPUT LEADS ON THE SMALL OR LARGE PAIR OF OUTPUTS. IF A CURRENT PROBE
6
IS NOT AVAILABLE, USE A VOLTMETER FROM TP6 ON THE FILAMENT BOARD TO GROUND (SEE # 5).
7 THE VOLTAGE AT THESE POINTS WHEN MEASURED DIFFERENTIALLY (I.E. FROM J3-3 TO J3-4, OR J3-1 TO J3-2) WILL BE APPROXIMATELY 0.5 VDC = 1 AMP OF FILAMENT CURRENT.
8 THE VOLTAGE AT THESE TEST POINTS WILL BE APPROXIMATELY 1 VDC = 1 AMP OF FILAMENT CURRENT.
OUTPUT CURRENT IN THE TANK IS SAMPLED ACROSS A 4 OHM RESISTOR ON EACH H.T. BOARD. THE RESISTANCE “LOOKING INTO” THE H.T. TANK FROM J3-1 AND J3-2, OR FROM J3-3 AND J3-4 SHOULD BE
9 APPROXIMATELY 4 OHMS. A DIFFERENTIAL VOLTAGE MEASUREMENT (I.E. FROM J3-1 TO J3-2, OR FROM J3-3 TO J3-4) SHOULD INDICATE APPROXIMATELY 0.4 VDC / 100 mA OF OUTPUT CURRENT. DUE TO
SHORT RAD EXPOSURE TIMES THAT THE CURRENT IS PRESENT, VOLTAGE MEASUREMENTS SHOULD BE MADE WITH A STORAGE DEVICE I.E. STORAGE ‘SCOPE OR VOLTMETER WITH “HOLD” CAPABILITY.
10 THESE TEST POINTS ALLOW MEASUREMENT OF A VOLTAGE PROPORTIONAL TO ANODE CURRENT. THE SCALING IS 0.4 VDC = 100 mA. AS PER # 9, SHORT EXPOSURE TIMES MUST BE CONSIDERED AND
APPROPRIATE MEASUREMENT TECHNIQUES MUST BE USED.
11 THESE TEST POINTS ARE SCALED 1 VDC = 100 mA OF X-RAY CURRENT.
12 THESE TEST POINTS ARE SCALED 1 VDC = 2.5 mA OF X-RAY CURRENT (R&F GENERATORS ONLY).
DRAWN DATE
G. SANWALD 12 MAY 2000 FILAMENT DRIVE
CHECKED & MA CONTROL
S. BLAKE 12 MAY 2000
DES.\MFG.\AUTH.
L. FOSKIN 15 MAY 2000 MD-0760 REV D
SHEET 3 OF 3
REFER TO PAGE 2 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
TUBE 1
J1-1 J3-9 SHIFT
K4 COMM
K1 TUBE 2
CURRENT J3-7 SHIFT
SENSOR
(MAIN)
J3-5 MAIN
J3-1 COMM
JW1
CONTROL BOARD AUXILIARY BOARD POWER INPUT BOARD LOW SPEED STARTER BOARD
DRAWN DATE
G. SANWALD 10 MAR 2000 LOW SPEED
CHECKED________ ________ STARTER
DES.\MFG.\AUTH.
HTW 10 MAR 2000 MD-0764 REV D
SHEET 1 OF 2
+5V
ROTOR
DS20 DS21
GRN RED
TO 2.1 V
9 OPTO-COUPLER
CURRENT
“ON” = NO FAULT
SINK
J10-1 J1-1
REGISTER
FROM
PAGE 1
J10-20 J1-20
DATA BUS
D0..D7
NOTE
REMARKS
REFERENCE
1 “HIGH” (APPROXIMATELY 6-11 VDC) = NO STATOR FAULT, “LOW” (<APPROXIMATELY 2 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT).
2 “LOW” (APPROXIMATELY 0 VDC) = NO STATOR FAULT, “HIGH” (APPROXIMATELY 12 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT).
3 “HIGH” (APPROXIMATELY 10 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 1 VDC) = PREP NOT REQUESTED.
4 “LOW” (APPROXIMATELY 0 VDC) = BOOST REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = BOOST NOT REQUESTED (BOOST REQUESTED FOR APPROXIMATELY 1.5 SEC AFTER PREP INITIATED).
5 “LOW” (APPROXIMATELY 0 VDC) = RUN REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = RUN NOT REQUESTED (RUN REQUESTED AFTER BOOST COMPLETE, AND FOR DURATION THAT PREP IS PRESSED).
6 “HIGH” (APPROXIMATELY 12 VDC) = LOW SPEED STARTER ENABLED, “LOW” (APPROXIMATELY 0 VDC) = STARTER DISABLED (SEE # 7).
THIS POINT MUST BE “HIGH” (AS PER # 6) TO ENABLE THE LOW SPEED STARTER. THIS REQUIRES THE ENABLE COMMAND TO BE PRESENT (”HIGH”), AND THE TUBE 1 /TUBE 2 MISMATCH &THERMOSTAT
7 OPEN SIGNAL TO BE “HIGH”. IF THE 12 VDC / SOFT START FAULT SIGNAL IS LOW (INDICATING A FAULT), J1-4 WILL NOT BE PULLED LOW DUE TO THE DIODE SHOWN CONNECTED TO THIS PIN ON PAGE 1.
“LOW” (APPROXIMATELY 0 VDC) ENERGIZES K1 ON THE LOW SPEED STARTER BOARD, ENABLING THE STARTER. “HIGH” (APPROXIMATELY 12 VDC) DE-ENERGIZES K1 ON THE LOW SPEED STARTER BOARD.
8 AS PER # 6 AND 7, NO ENABLE COMMAND, OR PRESENCE OF A TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN FAULT, OR A 12 VDC / SOFT START FAULT WILL INHIBIT LOW SPEED STARTER OPERATION.
9 DS20 LIT INDICATES NORMAL STATOR CURRENTS. DS 21 LIT INDICATES STATOR FAULT, OR LOW SPEED STARTER IS IN STANDBY MODE.
DRAWN DATE
G. SANWALD 10 MAR 2000 LOW SPEED
CHECKED________ ________ STARTER
DES.\MFG.\AUTH.
HTW 10 MAR 2000 MD-0764 REV D
SHEET 2 OF 2
+5V
* *
INVERTER
DIP SWITCH DIP SWITCH +5V FAULT
SW1 SW2 560 / 650 VDC (+)
DETECTOR
DS1
DS8 DS7
INVERTER
HS LS 5 FAULT
1 TO 2.1 V
CURRENT
SINK
J10-2 J1-2 2 J4-6 J1-6
IGBT IGBT
BUFFER AND SWITCH SWITCH
REGISTER DRIVER
DRIVER CIRCUIT
J10-21 J1-21 J4-8 J1-8 CIRCUIT AND
FAULT
CURRENT
HIGH SPEED LATCH
SELECT IGBT IGBT
SWITCH SWITCH
J4-4 J1-4
3 TUBE 1
PREP
INITIATED DUAL SPEED K1-A TB2-3 SHIFT
STARTER CPU CURRENT
CONTACTOR SENSOR
CLOSED (MAIN)
SIGNAL FROM
K2-A
MD-0788, PAGE 3 K1
+12V
TB2-2 MAIN
J4-14 J1-14 LOW STATOR
K2
CURRENT
DETECTOR TB2-1 COMM
J4-16 J1-16
+5V 4
TUBE 2 K3 HIGH SPEED
SELECT PHASE SHIFT
TUBE 1/TUBE 2 CAPACITOR K1-B
SELECT SIGNAL CURRENT
ROTOR FROM MD-0788, SENSOR TUBE 2
PAGE 3 K4 (SHIFT)
DS20 DS21 TB3-3 SHIFT
K2-B
GRN RED
8 TO 2.1 V
CURRENT OPTO-COUPLER
SINK “ON” = NO FAULT
J10-1 J1-1 K3
REGISTER
TB3-2 MAIN
J4-10 J1-10
7
BUFFER / DRIVER
DRIVER LOW SPEED
CIRCUIT TB3-1 COMM
PHASE SHIFT
J10-20 J1-20 CAPACITOR
STATOR FAULT TO
GENERATOR READY
DETECTOR CIRCUIT
ON CONTROL BOARD,
SEE MD-0761
DATA BUS
D0..D7
DRAWN DATE
G. SANWALD 30 MAR 2000 DUAL SPEED
CHECKED STARTER
STEVE BLAKE 30 MAR 2000
DES.\MFG.\AUTH.
L.FOSKIN 30 MAR 2000 MD-0765 REV B
SHEET 2 OF 2
NOTE
REMARKS
REFERENCE
D36 LIT INDICATES RAD OR PULSED FLUORO
1 MODE. D36 NOT LIT INDICATES CONTINUOUS
FLUORO MODE.
REFER TO MD-0759 “LOW” (APPROXIMATELY 0 VDC) = K1 ON
K1
PAGE 2 RESONANT BOARD ENERGIZED IN RAD / PULSED
2 FLUORO MODE. “HIGH” (APPROXIMATELY 12 VDC)
= K1 ON RESONANT BOARD DE-ENERGIZED IN
THESE CIRCUITS USED CONTINUOUS FLUORO MODE.
+12V +12V
ON R&F GENERATORS
D36 ONLY “LOW” (APPROXIMATELY 0 VDC) = K1 ON POWER
J2-1 J2-1 MODE SELECT BOARD ENERGIZED IN FLUORO OR
RAD LOW POWER RAD MODE (< 20 kW APPROX). “HIGH”
MODE 3 (APPROXIMATELY 12 VDC) = K1 ON POWER MODE
FROM J1-5 (AUXILIARY J2-2 J2-2 K1
DRIVER
BOARD), SEE MD-0788,
PAGE 3
CIRCUIT SELECT BOARD DE-ENERGIZED IN HIGH POWER
1 2 RAD MODE (> 20kW APPROX).
RESONANT BOARD
+12V
J10-1 J3-1
POWER MODE SELECT
FROM J1-3 (AUXILIARY
DRIVER J10-2 J3-2 K1 BOARD USED ON 65 / 80 kW
BOARD) SEE MD-0788,
PAGE 3
CIRCUIT
3 GENERATORS WITH THREE
INVERTER BOARDS ONLY
AUXILIARY BOARD
ENERGIZING K1
DISABLES DRIVE
TO INVERTER
BOARD No. 3
J12-1 J1-1 K1
J4-1 J1-1
J12-2 J1-2
INVERTER DRIVE SIGNAL J4-2 J1-2
J12-3 J1-3 INVERTER DRIVE SIGNAL
FROM MD-0759 J4-3 J1-3
J12-4 J1-4 TO MD-0759
J4-4 J1-4
DRAWN DATE
G. SANWALD 21 MAR 2000 RAD / FLUORO AND
CHECKED________ ________ POWER MODE SELECT
DES.\MFG.\AUTH.
HTW 21 MAR 2000 MD-0786 REV A
SHEET 1 OF 1
ON OFF JUMPER POSITION: +12V
1 2 3 R&F GENERATORS (WITH THERMAL SWITCH)
JW4 JUMPER JW4 PINS 1-2 (ON)
RAD GENERATORS (NO THERMAL SWITCH) D42
JUMPER JW4 PINS 2-3 (OFF)
THERMAL
CUTOFF
J2-4 DRIVER / OPEN
INVERTER
4
+12V
J2-3
DRIVER /
THERMAL SWITCH ON TUBE 1 / TUBE 2 INVERTER
INVERTER HEATSINK TELLBACK LOGIC CIRCUIT
(R&F UNITS ONLY) CIRCUIT 5 +5V +5V
2
OPTO COUPLER
“ON” = TUBE 2 SELECTED
POWER INPUT
H.T. TANK BOARD AUXILIARY BOARD CONTROL BOARD GENERATOR CPU BOARD
REFER TO MD-0763 (ROOM INTERFACE) FOR INTERLOCKS ACCESSED VIA THE ROOM INTERFACE BOARD
TUBE 1
STATOR
TERMINAL
BLOCK
J5-1 TUBE 1 THERMOSTAT TO T1
ON MD-0763, PAGE 1
THERMAL
NOTE SWITCH
REMARKS J5-2
REFERENCE
1 “LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 10 VDC) = TUBE 1 SELECTED.
TUBE 2
2 “LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 1 SELECTED. STATOR
TERMINAL
DS6 LIT INDICATES TUBE 1 SELECTED. DS5 LIT INDICATES TUBE 2 SELECTED. NEITHER LED LIT INDICATES A MISMATCH BETWEEN THE BLOCK
3
TUBE THAT HAS BEEN REQUESTED, AND THE TUBE THAT HAS ACTUALLY BEEN SELECTED (SEE # 5). J5-3
TUBE 2 THERMOSTAT TO T2
“LOW” (APPROXIMATELY 0 VDC) = INVERTER THERMAL SWITCH CLOSED (OR JUMPERED VIA JW4), “HIGH” (APPROXIMATELY 12 VDC) = THERMAL ON MD-0763, PAGE 1
4 INVERTER THERMAL SWITCH OPEN, OR JW4 JUMPER OMITTED ON RAD GENERATORS. SWITCH J5-4
THE TUBE 1 / TUBE 2 TELLBACK LOGIC CIRCUIT ENSURES THAT THE TUBE ACTUALLY SELECTED MATCHES THE TUBE THAT WAS
5 REQUESTED. FOR EXAMPLE, IF TUBE 2 WAS REQUESTED BY THE CONSOLE BUT TUBE 1 WAS ACTUALLY SELECTED BY THE H.T. TANK, GENERATOR INTERFACE BOARD
THE LOGIC CIRCUIT WILL INDICATE A FAULT CONDITION.
DRAWN DATE
G. SANWALD 18 MAY 2000
INTERLOCKS &
CHECKED TUBE 1 / TUBE 2
S. BLAKE 18 MAY 2000 TELLBACK
DES.\MFG.\AUTH.
L. FOSKIN 18 MAY 2000 MD-0787 REV B
SHEET 1 OF 1
REFER TO PAGE 3 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
GAIN CONTROL SIGNAL (NOT USED AT THIS TIME)
FROM MD-0758
J6-1 J12-1
J6-2 J12-2
4 CH 4 SELECT J10-2 J2-2 J1-5
J1-E
J6-3 J12-3
4 CH 3 SELECT J10-3 J2-3 J1-6
J1-F
4 CH 2 SELECT J10-4 J2-4 J1-7
J1-H
J6-4 J12-4 4 CH 1 SELECT J10-5 J2-5 J1-8
BUFFERS, DRIVERS, J1-J
ADDRESS DECODERS, 5 “L” FIELD SELECT J10-7 J2-7 J1-10
J6-5 J12-5 REGISTERS J1-L
5 “M” FIELD SELECT J10-8 J2-8 J1-11
J1-M
5 “R” FIELD SELECT J10-9 J2-9 J1-12
J6-6 J12-6
J1-N
J12-8 J6-8
7 START J10-6 J2-6 J1-9
J1-K
+12V
THIS CIRCUIT USED ON CPU BOARD 734573 ONLY 1
TP10
J7-19 J11-19
LOGIC
CPU
INVERTER
TP11
2
J11-4 PTRAMP J10-15 J2-15 J1-17
2 J1-U
TP12
TP12 TP9 3
J11-1 PTREF J10-10 J2-10 J1-14
J1-R
A/D BUFFER J7-4
CONVERTER CIRCUIT
+12V
3 -12V
AEC TRANSITION
J14-6 J14-7 J14-14 J14-3 J14-1 J14-2 J14-4 J14-12 J14-13 J14-15 J14-8 J14-9 J14-10 J14-11
TP4 GENERATOR INTERFACE BOARD BOARD
2 2
DATA BUS TO A EC DETECTOR CIRCUIT
DO..D7 CONTINUED ON PAGE 3 DRAWN DATE
G. SANWALD 02 JUN 2000
GENERATOR CPU BOARD CHECKED AEC
__________ __________
DES.\MFG.\AUTH.
L. FOSKIN 02 JUN 2000 MD-0757 REV A
SHEET 1 OF 3
ANALOG * *
SWITCH
L SELECT
M SELECT
FROM AEC
CHANNEL 4
AEC INPUT
CHAMBER # 4
R SELECT
CH 4 SELECT
START
CH 3 SELECT
CH 2 SELECT
CH 1 SELECT
ANALOG * *
SWITCH
DRIVER AND / L SELECT
“L” FIELD SELECT L SELECT
OR INVERTER ALL CHANNELS
M SELECT
FROM AEC
CHANNEL 3
R SELECT AEC INPUT CHAMBER # 3
DRIVER AND / M SELECT START
“M” FIELD SELECT
OR INVERTER ALL CHANNELS
FROM
PAGE 1
DRIVER AND / R SELECT
“R” FIELD SELECT
OR INVERTER ALL CHANNELS
ANALOG * *
SWITCH
DRIVER AND / START
START L SELECT
OR INVERTER ALL CHANNELS
M SELECT
FROM AEC
CHANNEL 2
R SELECT AEC INPUT CHAMBER # 2
PTRAMP START
PTREF
PTSTOP
ANALOG * *
SWITCH
L SELECT
M SELECT
FROM AEC
SOME INDICO 100 MODELS DO NOT USE THE AEC CHANNEL 1
CHAMBER # 1
TRANSITION BOARD SHOWN ON PAGE 1. THE AEC R SELECT AEC INPUT
BOARD WILL CONNECT TO J1 ON THE AEC START
TRANSITION BOARD (IF USED), OR TO J10 ON THE
GENERATOR INTERFACE BOARD IF THE AEC
TRANSITION BOARD IS NOT USED. TO DETERMINE ION CHAMBER H.V.
WHICH PINS ON THOSE CONNECTORS THE AEC APPROXIMATELY
BOARD IS CONNECTED TO, SIMPLY MATCH THE 300 TO 500 VDC
FUNCTIONAL DESIGNATIONS ON THE AEC BOARD
WITH THE CORRESPONDING DESIGNATIONS ON
PAGE 1 (I.E. PTREF ON AEC BOARD CONNECTS TO ** **
PMT H.V.
THE LINE “PTREF” ON PAGE 1). APPROXIMATELY
ION CHAMBER / PMT -1000 VDC PMT H.V.
DUE TO THE DIVERSITY OF AEC CIRCUITS USED IN INDICO 100 GENERATORS, HIGH VOLTAGE SUPPLY CONNECTOR
THE AEC BOARD IS SHOWN IN BLOCK DIAGRAM FORM ONLY. THIS DIAGRAM
REPRESENTS THE MAIN FUNCTIONAL BLOCKS OF INDICO 100 AEC CIRCUITS.
AEC BOARD
* REFER TO CHAPTER 3D OF THE SERVICE MANUAL FOR AEC CALIBRATION PROCEDURES, POTENTIOMETER DESIGNATIONS, AND AEC CONNECTOR PINOUTS
** THE ION CHAMBER / PMT H.V. SUPPLY IS ONLY USED ON AEC BOARDS REQUIRING HIGH VOLTAGE, APPROXIMATELY 200 VDC TO 1000 VDC, FOR PMT OR ION
CHAMBER USE. THE PMT H.V. CONNECTOR IS USED ON PMT-COMPATIBLE AEC CHAMBERS. REFER TO CHAPTER 3D AND 3E OF THE SERVICE MANUAL FOR
DETAILS. DRAWN DATE
G. SANWALD 02 JUN 2000
CHECKED AEC
__________ __________
DES.\MFG.\AUTH.
L. FOSKIN 02 JUN 2000 MD-0757 REV A
SHEET 2 OF 3
FROM GENERATOR INTERFACE
BOARD, PAGE 1
J2-3 J2-4 J2-1 J2-6 J2-7 J2-14 J2-2 J2-12 J2-13 J2-15 J2-8 J2-9 J2-10 J2-11
OPTO-COUPLER
"ON" = AEC START
S1
+8V
+8 VDC -8 VDC
REGULATOR REGULATOR
ANALOG CIRCUIT CIRCUIT
SWITCH
J1-1 -8V
J1-2 COMPARATOR
& DRIVER
PHOTO DIODE INTEGRATOR AMPLIFIER CIRCUIT
DETECTORS J1-3 CIRCUIT CIRCUIT
J1-4
OPTIONAL A2EC2
NOTE
REMARKS
REFERENCE
1 “HIGH” (APPROXIMATELY 5 VDC) = NO PTSTOP (PHOTOTIMER STOP) SIGNAL RECEIVED FROM AEC BOARD. “LOW” (APPOXIMATELY 0 VDC) = PTSTOP SIGNAL RECEIVED FROM AEC BOARD.
“PTRAMP” IS THE AEC RAMP FROM THE AEC BOARD. THE RAMP SLOPE AND MAGNITUDE WILL DEPEND ON THE AEC TECHNIQUE IN USE. THE MAXIMUM POSSIBLE RAMP MAGNITUDE IS 5 TO 10 VDC,
2
DEPENDING ON MODEL.
3 “PTREF” (THE AEC REFERENCE VOLTAGE FROM THE CONSOLE) WILL VARY FROM 0 TO 10 VDC, DEPENDING ON TECHNIQUE.
4 “HIGH” (> 10 VDC) = AEC CHANNEL DESELECTED, “LOW” (APPROXIMATELY 0 VDC) = AEC CHANNEL SELECTED.
5 “HIGH” (> 10 VDC) = L, M, R, FIELD DESELECTED, “LOW” (APPROXIMATELY 0 VDC) = L, M, R, FIELD SELECTED.
6 “HIGH” (> 10 VDC) = NO AEC STOP REQUEST (INSUFFICIENT RAMP TO TERMINATE AEC EXPOSURE), “LOW” (APPROXIMATELY 0 VDC) = AEC STOP REQUESTED (AEC EXPOSURE TERMINATED).
7 “HIGH” (> 10 VDC) = AEC START NOT REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = AEC START REQUESTED.
DRAWN DATE
G. SANWALD 02 JUN 2000
CHECKED AEC
__________ __________
DES.\MFG.\AUTH.
L. FOSKIN 02 JUN 2000 MD-0757 REV A
SHEET 3 OF 3
“DIGITAL IMAGING” ABS
FROM MD-0767, PAGE 1
**
JW24 JW25
+12V (IN) (OUT)
J7-4
J7-5
PMT / PHOTO DIODE /
PROPORTIONAL DC TP8
J7-7 CONTROL SIGNALS
VIDEOINPUT -12V DIGITAL
FROM DATA BUS
ADDRESS REGISTERS
POTENTIOMETER 1
J7-12
REFER TO CHAPTER TP9 DATA BUS
3E OF SERVICE MANUAL ** D0..D7
FOR DETAILS ON
ABS INPUT CONNECTIONS JW19 *
1
J8
COMPOSITE VIDEO 2 GAIN CONTROL SIGNAL TP14
TO MD-0757
INPUT 3
BUFFER /
JW5 * 75 AMPLIFIER
CIRCUIT
JW20 *
DRAWN DATE
G. SANWALD 16 MAY 2000
ABS
CHECKED
(AUTOMATIC BRIGHTNESS
KVR 16 MAY 2000 STABILIZATION)
DES.\MFG.\AUTH.
L. FOSKIN 16 MAY 2000 MD-0758 REV A
SHEET 1 OF 1
J1-1 J2-1
J1-2 J2-2
J1-3 J2-3
J1-4 J2-4
+5V +5V
J1-5 J2-5
J1-6 J2-6
J1-7 J2-7
J1-8 J2-8
LED
DS15 DS19 J1-9 J2-9 DISPLAYS
J1-10 J2-10 (7 SEGMENT
TXD RXD DISPLAYS &
J1-11 J2-11 REGISTERS DRIVERS
STATUS LEDs)
J1-12 J2-12
J11-3 P1-3 MICRO-
CONTROLLER J1-13 J2-13
RS-232 J11-7 P1-7
RS-232 (CPU, EPROM **, J1-14 J2-14
UART TRANSMITTER / J11-2 P1-2 RECEIVER / ADDRESS
RECEIVER DRIVER DECODERS
J11-8 P1-8
& LOGIC
CIRCUITS)
GENERATOR CPU BOARD REMOTE FLUORO CONTROL BOARD REMOTE FLUORO DISPLAY BOARD KEYBOARD ASSEMBLY
LIMITED TROUBLESHOOTING CAN BE PERFORMED ON THE REMOTE FLUORO CONTROL ASSEMBLY IN THE FIELD. THE DC RAILS CAN BE CHECKED (REFER TO MD-0788),
AND THE TXD AND RXD LEDs ON THE GENERATOR CPU BOARD MAY BE OBSERVED (THESE WILL FLASH ON AND OFF TO INDICATE DATA FLOW). MEANINGFUL MEASUREMENTS
CANNOT BE MADE ON COMMUNICATIONS, DATA, AND CONTROL LINES.
DRAWN DATE
G. SANWALD 02 JUN 2000 REMOTE FLUORO
CHECKED _________ _________ CONTROL
DES.\MFG.\AUTH.
L. FOSKIN 02 JUN 2000 MD-0766 REV B
SHEET 1 OF 1
D0 J6-1 J12-1 J13-1 J1-1
D1 J6-2 J12-2 J13-2 J1-2
D2 J6-3 J12-3 J13-3 J1-3
D3 J6-4 J12-4 J13-4 J1-4
D4 J6-5 J12-5 J13-5 J1-5
D5 J6-6 J12-6 J13-6 J1-6
D6 J6-7 J12-7 J13-7 J1-7
D7 J6-8 J12-8 J13-8 J1-8
BUFFERS, DRIVERS.
J6-9 J12-9 J13-9 J1-9 ADDRESS DECODERS,
REGISTERS
2 REFER TO TABLES ON
3 JW22
PG 2, 3 FOR CONNECTOR
LINE SYNC FROM 1
DESIGNATION AND
SYNC 2 MD-0788, PAGE 4 PINOUTS
JW3
JUMPER POSITION:
1 INTERNAL (LINE SYNC)
JUMPER PINS 1-2
JUMPER POSITION: EXTERNAL (DIGITAL IMAGING SYNC)
INVERTED SYNC JUMPER PINS 2-3
DATA, ADDRESS, JUMPER PINS 1-2
AND CONTROL BUS NON-INVERTED SYNC
JUMPER PINS 2-3
DRAWN DATE
G. SANWALD 16 MAY 2000 DIGITAL
CHECKED
KVR 17 MAY 2000
INTERFACE
DES.\MFG.\AUTH.
L. FOSKIN 17 MAY 2000 MD-0767 REV A
SHEET 1 OF 3
PINS (J2) CIRCUIT INFIMED IMACOM SYRACUSE
1 (+) FLUORO ON FLR+ EXT VCC
2 (-) 1 RETURN FLUORO ON FLR- FIN
+24V
FROM INTERNAL
7 (+) SPOT SELECT PFL+ N/C CIRCUITS
+24V
PIN 1 2200
F1 OUTPUT TO
+ DIGITAL
REFER TO TABLES ON
2200 TO INTERNAL
+
IMAGING CIRCUITS OUTPUT TO
PIN 2 THIS PAGE FOR LED
- SYSTEM
REFERENCE DESIGNATIONS
DIGITAL
IMAGING
SYSTEM
INPUT FROM
CIRCUIT 5
DIGITAL + FROM INTERNAL
CIRCUITS -
IMAGING CIRCUIT 9
SYSTEM - CIRCUIT 7
+24V
+24V
+24V
REFER TO TABLES ON 2200
THIS PAGE FOR LED
TO INTERNAL
REFERENCE DESIGNATIONS TP1 TP2 2200 CIRCUITS
OUTPUT TO
DS3 +24V
DIGITAL
IMAGING INPUT FROM PIN 20
FROM INTERNAL DIGITAL INPUT FROM
CIRCUITS SYSTEM
IMAGING PIN 21 MULTIPLEXER TO J1-20 DIGITAL
IMAGING
+ 2200
DRAWN DATE
SYSTEM
SYSTEM - G. SANWALD 16 MAY 2000 DIGITAL
CIRCUIT 6 CIRCUIT 8
TO INTERNAL
CIRCUITS
CHECKED
KVR 17 MAY 2000
INTERFACE
DES.\MFG.\AUTH.
L. FOSKIN 17 MAY 2000 MD-0767 REV A
CIRCUIT 10
SHEET 3 OF 3
+15V +15V
TRANSISTOR
SWITCHES
+5V
+5V J2-1
SWITCHED +15V
J2-6
TEST +15V
+5V +5V J2-7
TEST +15V
+5V J2-4
DS1 OPTO
+5V +5V J2-5 DAP CHAMBER
RELAY
J2-2
#1
DS32 DS29 + DOSE
J2-3
DS3 - DOSE
J2-2 J1-2 J2-8
GROUND
RS-232 J2-3 J1-3 RS-232 MICRO- RS-422 J2-9
UART GROUND
DRIVER DRIVER CONTROLLER DRIVER
J2-7 J1-7
J2-5 J1-5
+15V +15V
DATA BUS
D0..D7
TRANSISTOR
SWITCHES
+5V
J3-1
SWITCHED +15V
24 VDC +15V +5V
TP2 TP3 J3-6
TB8 TEST +15V
J3-7
1 TEST +15V
+5V J3-4
2 OPTO
3 +5V +5V J3-5 DAP CHAMBER
RELAY
J3-2
#2
4
+ DOSE
5 J3-3
DS2 - DOSE
J4-2 SWITCHING & J3-8
LINEAR REGULATORS GROUND
TB7 J4-1 J3-9
RS-422
GROUND
1 DRIVER
TP1
2
3
4
5
DRAWN DATE
G. SANWALD 16 JULY 2001
CHECKED DAP
M. LODER 21 AUG 2001
DES.\MFG.\AUTH.
L. FOSKIN 28 AUG 2001 MD-0828 REV A
SHEET 1 OF 1
* +5V +5V
CONSOLE
CABLE FOR RS-232: U1, U2, AND R16 ARE NOT FITTED.
* FOR RS-422: U12, RN3C, RN3D, RN3A, AND RN3B DS3 DS1
FOR RS-232: U27, U28, JP2, AND R67 ARE NOT FITTED. ARE NOT FITTED.
FOR RS-422: U33, RN11A, RN11B, RN11C, AND R68 ARE RXD TXD
R18
R15
NOT FITTED.
* U27 U12 U20
*
6 J5-1 J4-1 J11-7 J7-7 RXD (RS-232) 14 RN3C 3 2 15
4 RS-422
*
O/P 7 J5-2 J4-2 J11-18 J7-18 CTS (RS-232) 13 RN3D 4 4 13
* RN3A
16 1 3 14
RN10A
+5V * U2 OR SCHEMATIC 734571 FOR
+5V *JP2 J5-3 J4-3
R67
J11-11 J7-11 TXD- (RS-422) MILLENIA GENERATORS.
7
DS42 3
* RS-422 4
DS40 Q7 RXD J11-10 J7-10 TXD+ (RS-422) C40
2 6 O/P
TP1
RN10B
1 Hz Y2
1
R93
R98
J1 U42
RS-232
R68 5 RN12E 12 3 14
* 3
6 RN12F 11 5 12
-12V 7
J6-1
7 RN12G 10 2 15
2
J6-2
8 RN12H 9 4 13
8
ALTERNATE +5V +5V
5 RS-232
R72
CONSOLE
CONNECTIONS DS32 DS29 DUART
+5V J6-3
R71
R69
J2 U38
TXD
+5V RS-232
1 RN12A 16
RN10C
(LAPTOP) 3 14
3
DS44 J2
U37 2 RN12B 15 5 12
RXD 7
11 14 8 RN11D 7
Q9 3 TXD 3 RN12C 14
RN10D
2 15
2
10 7 2 RN12A 1
7 RTS 4 RN12D 13 4 13
8
12 13 4 RN12B 3
Q10 2 RXD
5 RS-232
DATA BUS
9 8 6 RN12C 5
D0..D7 8 CTS
RS-232 5
THIS SHEET SHOWS THE CONSOLE BOARD FOR DATA BUS
INDICO 100 GENERATORS WITH THE 31 X 42 CM OPTIONAL COMMUNICATIONS PORTS ARE SHOWN ON PAGE 2
D0..D7
CONSOLE. REFER TO PAGE 2 FOR INDICO 100 GENERATOR INTERFACE
GENERATORS WITH THE 23 X 56 CM CONSOLE BOARD GENERATOR CPU BOARD
AND THE RAD-ONLY CONSOLE.
CONSOLE BOARD (INDICO 100)
DRAWN DATE
G. SANWALD 13 DEC 2001 SERIAL
REFER TO PAGE 3 FOR MILLENIA GENERATORS.
CHECKED COMMUNICATIONS
J. BARNES 9 JAN 2002
DES.\MFG.\AUTH.
L. FOSKIN 9 JAN 2002 MD-0829 REV B
SHEET 1 OF 3
COMMUNICATIONS PORTS SHOWN BELOW ARE OPTIONAL
+5V
*
FOR RS-232: U5, U9, JP2, AND R6 ARE NOT FITTED. DS16
FOR RS-422: U6, RN4A, RN4C, RN4D AND R7 ARE +5V +5V +5V +5V TP5
NOT FITTED. 1 Hz
* U9 DS47 DS45 DS46 DS48
6 J5-1
R65
RXD TXD RXD TXD
4 RS-422 U28
RN16C
RN16D
RN16A
RN16B
O/P 7 J5-2
J16 U50
3 RN18B 4 3 14
3
* U5 TO GENERATOR
+5V
INTERFACE 5 RN18C 6 5 12
J5-4 7
6 BOARD (PG 1)
D4 1 RS-422 7 RN18D 8 2 15
TXD I/P J5-5 2 CPU
7
+5V 1 RN18A 2 4 13
RN2A
8
+5V *JP2 J5-3
R6
D3 8 RN17D 7 7 10
* 3 5
D6 Q4 RXD
TP1
2 5 RN17C 6 6 11
RN2B
1 Hz 1
J15 RS-232
R94
JP2 CLOSED FOR RS-422,
R5
* U6 7 -12V
*RN4A
11 14 2 1 2
DATA BUS
8 D0..D7
*
12 13 6 RN4C 5 5
*RN4D
9 8 8 7
CPU GENERATOR CPU BOARD
RS-232
R7
* +5V
+5V +5V
-12V DS1
DS2 DS3
U17 TP1
1 Hz TXD RXD
R19
R20
+5V
R10
D2
TXD U8 TP10 TP11
+5V RS-232
R23 J8-1 J4-1
RN2D
(LAPTOP)
D1 U20 J2 R24 J8-2 J4-4
TO GENERATOR
RXD CPU INTERFACE
11 14 6 RN1C 5
Q1 3 TXD BOARD (PG 1)
RN2C
R22
R21
D0..D7 U11 J4
RS-232 5 R25
3 TXD
THIS AREA SHOWS THE CONSOLE CPU BOARD R26
FOR INDICO 100 GENERATORS WITH THE 23 X 56 CM 7 RTS
CONSOLE. R27
2 RXD
R28
8 CTS
DATA BUS RS-232
CONSOLE BOARD (INDICO 100) D0..D7 5
DRAWN DATE
G. SANWALD 13 DEC 2001 SERIAL
THIS AREA SHOWS THE CONSOLE CPU BOARD FOR
INDICO 100 GENERATORS WITH RAD-ONLY CONSOLE.
CHECKED COMMUNICATIONS
J. BARNES 9 JAN 2002
DES.\MFG.\AUTH.
L. FOSKIN 9 JAN 2002 MD-0829 REV B
CONSOLE BOARD (INDICO 100)
SHEET 2 OF 3
* +5V +5V
* CONSOLE
FOR RS-232: U9, U5, JP2, AND R6 ARE NOT FITTED. CABLE FOR RS-232: U1, U2, AND R8 ARE NOT FITTED.
FOR RS-422: U12, RN4C, RN4D, RN4A, AND RN4B DS2 DS1
FOR RS-422: U6, RN4A, RN4B, RN4C, RN4D, AND R7
ARE NOT FITTED. ARE NOT FITTED.
RXD TXD
R15
Q1 Q2
R1
* U9 U12 U24
*
6 J5-1 J4-1 J11-7 J7-7 RXD (RS-232) 14 RN4C 3 13 12
4 RS-422
*
O/P 7 J5-2 J4-2 J11-18 J7-18 CTS (RS-232) 13 RN4D 4 8 9
* RN4A
16 1 14 11
+5V * U5 * RN4B
15 2 7 10
6 J5-4 J4-4 J11-6 J7-6 TXD (RS-232)
D4 1 RS-422 SERIAL PORT FOR REMOTE
RS-232
TXD I/P 7 J5-5 J4-5 J11-17 J7-17 RTS (RS-232) FLUORO CONTROL. REFER DUART
TO MD-0766 FOR INDICO 100,
* U2
RN2A
+5V OR SCHEMATIC 734571 FOR
*JP2 J5-3 J4-3 MILLENIA GENERATORS.
R6
J11-11 J7-11 TXD- (RS-422) 7
D3 3
* RS-422 4
Q4 RXD 2 J11-10 J7-10 TXD+ (RS-422) 6 O/P C39
RN2B
Y1
1
R63
R64
Q11 Q12
J1 U43
RS-232
R7
* 5 RN13E 12 14 11
DUART
3
6 RN13F 11 7 10
-12V 7
J6-1
7 RN13G 10 13 12
2
J6-2
8 RN13H 9 8 9
C35 8
ALTERNATE
Y2 RS-232
5
R66
CONSOLE +5V +5V
CONNECTIONS
C41 +5V J6-3 DS31 TXD DS35 RXD DUART
D2 J6-4 -12V
TXD
R47
R48
Q8 Q9
+5V RS-232
J2
RN2D
(LAPTOP) U39
D1 U20 J2 1 RN13A 16 14 11
3
RXD 11 14 6 RN1C 5
Q1 3 TXD 2 RN13B 15 7 10
7
RN2C
10 7 4 RN1B 3
7 RTS 3 RN13C 14 13 12
2
12 13 2 RN1A 1
Q2 2 RXD 4 RN13D 13 8 9
8
DATA BUS
9 8 8 RN1D 7
D0..D7 8 CTS RS-232
5
R65
RS-232 5
DATA BUS
D0..D7
GENERATOR INTERFACE -12V
BOARD GENERATOR CPU BOARD