MODULE 1

OVERVIEW OF COMPUTER
ARCHITECTURE AND
ORGANIZATION

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Introduction of Computer
Organization and Architecture

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Computer architecture refers to those attributes of a system

visible to a programmer or, put another way, those attributes that
have a direct impact on the logical execution of a program.
Examples of architectural attributes include the instruction set, the
number of bits used to represent various data types (e.g.,
numbers, characters), I/O mechanisms, and techniques for
addressing memory.
Computer organization refers to the operational units and their
interconnections that realize the architectural specifications.
Organizational attributes include those hardware details
transparent to the programmer, such as control signals; interfaces
between the computer and peripherals; and the memory
technology used.
For example, it is an architectural design issue whether a
computer will have a multiply instruction.
It is an organizational issue whether that instruction will be
implemented by a special multiply unit or by a mechanism that
makes repeated use of the add unit of the system.
The organizational decision
may be based on the anticipated
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frequency of use of the multiply instruction, the relative speed of

Basic organization of
computer and block level
description of
the functional units

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STRUCTURE AND FUNCTION

A computer is a complex system; contemporary computers
contain millions of elementary electronic components.
The key to describe them is to recognize the hierarchical
nature of most complex systems, including the computer.
A hierarchical system is a set of interrelated subsystems,
each of the latter, in turn, hierarchical in structure until we
reach some lowest level of elementary subsystem.
The hierarchical nature of complex systems is essential to
both their design and their description.
The designer need only deal with a particular level of the
system at a time.
At each level, the system consists of a set of components
and their interrelationships.
The behavior at each level depends only on a simplified,
abstracted characterization of the system at the next lower
level.
At each level, the designer is concerned with structure and
function:
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Structure: The way in which the components are

Figure 1.1 A Functional View of the Computer

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 Function
Both the structure and functioning of a computer are, in
essence, simple. Figure 1.1 depicts the basic functions that
a computer can perform.
In general terms, there are only four:
Data processing
Data storage
Data movement
Control
The computer, of course, must be able to process data.
The data may take a wide variety of forms, and the range of
processing requirements is broad.
However, we shall see that there are only a few
fundamental methods or types of data processing.
It is also essential that a computer store data.

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 Even if the computer is processing data on the fly (i.e., data

come in and get processed, and the results go out
immediately), the computer must temporarily store at least
those pieces of data that are being worked on at any given
moment.
Thus, there is at least a short-term data storage function.
Equally important, the computer performs a long-term data
storage function.
Files of data are stored on the computer for subsequent
retrieval and update.
The computer must be able to move data between itself
and the outside world.
The computers operating environment consists of devices
that serve as either sources or destinations of data.
When data are received from or delivered to a device that is
directly connected to the computer, the process is known
as inputoutput
(I/O), and the device is referred to as a peripheral.
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When data are moved over longer distances, to or from a

 Finally, there must be control of these three functions.

Ultimately, this control is exercised by the individual(s) who
provides the computer with instructions.
Within the computer, a control unit manages the
computers resources and orchestrates the performance of
its functional parts in response to those instructions.

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Figure 1.2 Possible Computer

Operations
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 At this general level of discussion, the number of possible

operations that can be performed is few.
Figure 1.2 depicts the four possible types of operations.
The computer can function as a data movement device
(Figure 1.2a), simply transferring data from one peripheral
or communications line to another.
It can also function as a data storage device (Figure 1.2b),
with data transferred from the external environment to
computer storage (read) and vice versa (write).
The final two diagrams show operations involving data
processing, on data either in storage (Figure 1.2c) or en
route between storage and the external environment
(Figure 1.2d).

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 Structure
Figure 1.3 is the simplest possible depiction of a computer.
The computer interacts in some fashion with its external
environment. In general, all of its linkages to the external
environment can be classified as peripheral devices or
communication lines.

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 The internal structure of the computer is shown in Figure

1.4.
There are four main structural components:
Central processing unit (CPU): Controls the operation of
the computer and performs its data processing functions;
often simply referred to as processor.
Main memory: Stores data.
I/O: Moves data between the computer and its external
environment.
System interconnection: Some mechanism that provides
for communication among CPU, main memory, and I/O. A
common example of system interconnection is by means of
a system bus, consisting of a number of conducting wires to
which all the other components attach.
There may be one or more of each of the aforementioned
components.
Traditionally, there has been just a single processor. In
recent years, there hasDeepti
been
increasing use of multiple
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processors in a single computer.

 The most complex component is the CPU. Its major

structural components are as follows:
Control unit: Controls the operation of the CPU and hence
the computer
Arithmetic and logic unit (ALU): Performs the computers
data processing functions
Registers: Provides storage internal to the CPU
CPU interconnection: Some mechanism that provides for
communication among the control unit, ALU, and registers

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Evolution of Computers, Von

Neumann model

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The First Generation:

Vacuum Tubes

ENIAC - background
Electronic Numerical Integrator And
Computer
Eckert and Mauchly proposed
University of Pennsylvania
Trajectory tables for weapons
Started 1943
Finished 1946
Too late for war effort
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ENIAC - details

Decimal (not binary)

20 accumulators of 10 digits
Programmed manually by switches
18,000 vacuum tubes
30 tons
15,000 square feet
140 kW power consumption
5,000 additions per second
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von Neumann/Turing
Stored Program concept
Main memory storing programs and
data
ALU operating on binary data
Control unit interpreting instructions
from memory and executing
Input and output equipment
operated by control unit
Princeton Institute for Advanced
Studies

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Structure of von Neumann

machine

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 The memory of the IAS consists of 1000 storage locations,

called words, of 40 binary digits (bits) each.
Both data and instructions are stored there.
Numbers are represented in binary form, and each
instruction is a binary code.
Figure 2.2 illustrates these formats.
Each number is represented by a sign bit and a 39-bit
value.
A word may also contain two 20-bit instructions, with each
instruction consisting of an 8-bit operation code (opcode)
specifying the operation to be performed and a 12-bit
address designating one of the words in memory
(numbered from 0 to 999).

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00100001

STOR M(X) Transfer contents of accumulator to memory location X

 The control unit operates the IAS by fetching instructions

from memory and executing them one at a time.
Figure reveals that both the control unit and the ALU
contain storage locations, called registers, defined as
follows:
Memory buffer register (MBR): Contains a word to be
stored in memory or sent to the I/O unit, or is used to
receive a word from memory or from the I/O unit.
Memory address register (MAR): Specifies the address in
memory of the word to be written from or read into the
MBR.
Instruction register (IR): Contains the 8-bit opcode
instruction being executed.
Instruction buffer register (IBR): Employed to hold
temporarily the right hand instruction from a word in
memory.
Program counter (PC): Contains the address of the next
instruction-pair to be fetched from memory.
Accumulator (AC) and multiplier quotient (MQ): Employed
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to hold temporarily operands
and results of ALU operations.

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 The IAS operates by repetitively performing an instruction

cycle.
Each instruction cycle consists of two sub-cycles.
During the fetch cycle, the opcode of the next instruction is
loaded into the IR and the address portion is loaded into the
MAR.
This instruction may be taken from the IBR, or it can be
obtained from memory by loading a word into the MBR, and
then down to the IBR, IR, and MAR.

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Commercial Computers
1947 - Eckert-Mauchly Computer
Corporation
UNIVAC I (Universal Automatic
Computer)
US Bureau of Census 1950
calculations
Became part of Sperry-Rand
Corporation
Late 1950s - UNIVAC II
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IBM
Punched-card processing equipment
1953 - the 701
IBMs first stored program computer
Scientific calculations

1955 - the 702

Business applications

Lead to 700/7000 series

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The Second
Generation:Transistors

Replaced vacuum tubes

Smaller
Cheaper
Less heat dissipation
Solid State device
Made from Silicon (Sand)
Invented 1947 at Bell Labs
William Shockley et al.
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Transistor Based Computers

Second generation machines
NCR & RCA produced small transistor
machines
IBM 7000
DEC - 1957
Produced PDP-1

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The Third Generation:

Integrated Circuits
Microelectronics
Literally - small electronics
A computer is made up of gates, memory cells and
interconnections
These can be manufactured on a semiconductor
e.g. silicon wafer

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Introduction to buses and

connecting I/O devices to
CPU and
Memory, bus structure

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INTERCONNECTION
STRUCTURES
A computer consists of a set of components or modules of
three basic types (processor, memory, I/O) that
communicate with each other.
In effect, a computer is a network of basic modules.
Thus, there must be paths for connecting the modules.
The collection of paths connecting the various modules is
called the interconnection structure.
The design of this structure will depend on the exchanges
that must be made among modules.
Figure 3.15 suggests the types of exchanges that are
needed by indicating the major forms of input and output
for each module type
Memory: Typically, a memory module will consist of N
words of equal length. Each word is assigned a unique
numerical address (0, 1, . . . ,N 1). A word of data can be
read from or written into the memory. The nature of the
operation is indicated byDeepti
read
and write control signals. The
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location for the operation is specified by an address.

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 I/O module: From an internal (to the computer system)

point of view, I/O is functionally similar to memory. There
are two operations, read and write. Further, an I/O module
may control more than one external device. We can refer to
each of the interfaces to an external device as a port and
give each a unique address (e.g., 0, 1, . . . ,M 1). In
addition, there are external data paths for the input and
output of data with an external device. Finally, an I/O
module may be able to send interrupt signals to the
processor.
Processor: The processor reads in instructions and data,
writes out data after processing, and uses control signals to
control the overall operation of the system. It also receives
interrupt signals.

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 The preceding list defines the data to be exchanged. The

interconnection structure must support the following types
of transfers:
Memory to processor: The processor reads an instruction
or a unit of data from memory.
Processor to memory: The processor writes a unit of data
to memory.
I/O to processor:The processor reads data from an I/O
device via an I/O module.
Processor to I/O: The processor sends data to the I/O
device.
I/O to or from memory: For these two cases, an I/O
module is allowed to exchange data directly with memory,
without going through the processor, using direct memory
access (DMA).

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BUS INTERCONNECTION
A bus is a communication pathway connecting two or more
devices.
A key characteristic of a bus is that it is a shared
transmission medium.
Multiple devices connect to the bus, and a signal
transmitted by any one device is available for reception by
all other devices attached to the bus.
If two devices transmit during the same time period, their
signals will overlap and become garbled.
Thus, only one device at a time can successfully transmit.
Typically, a bus consists of multiple communication
pathways, or lines.
Each line is capable of transmitting signals representing
binary 1 and binary 0.
Over time, a sequence of binary digits can be transmitted
across a single line.
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 Taken together, several lines of a bus can be used to

transmit binary digits simultaneously (in parallel).
For example, an 8-bit unit of data can be transmitted over
eight bus lines.
Computer systems contain a number of different buses that
provide pathways between components at various levels of
the computer system hierarchy.
A bus that connects major computer components
(processor, memory, I/O) is called a system bus.
The most common computer interconnection structures are
based on the use of one or more system buses.

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Bus Structure
A system bus consists, typically, of from about 50 to
hundreds of separate lines.
Each line is assigned a particular meaning or function.
Although there are many different bus designs, on any bus
the lines can be classified into three functional groups
(Figure 3.16): data, address, and control lines. In addition,
there may be power distribution lines that supply power to
the attached modules.
The data lines provide a path for moving data among
system modules.
These lines, collectively, are called the data bus.
The data bus may consist of 32, 64, 128, or even more
separate lines, the number of lines being referred to as the
width of the data bus.
Because each line can carry only 1 bit at a time, the
number of lines determines how many bits can be
transferred at a time.
The width of the data bus
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is a key factor in determining

 The address lines are used to designate the source or

destination of the data on the data bus.
For example, if the processor wishes to read a word (8, 16,
or 32 bits) of data from memory, it puts the address of the
desired word on the address lines.
Clearly, the width of the address bus determines the
maximum possible memory capacity of the system.
Furthermore, the address lines are generally also used to
address I/O ports.
Typically, the higher-order bits are used to select a
particular module on the bus, and the lower-order bits
select a memory location or I/O port within the module.

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 The control lines are used to control the access to and the
use of the data and address lines.
Because the data and address lines are shared by all
components, there must be a means of controlling their
use.
Control signals transmit both command and timing
information among system modules.
Timing signals indicate the validity of data and address
information. Command signals specify operations to be
performed.
Typical control lines include
Memory write: Causes data on the bus to be written into
the addressed location
Memory read: Causes data from the addressed location to
be placed on the bus
I/O write: Causes data on the bus to be output to the
addressed I/O port
I/O read: Causes data from the addressed I/O port to be
placed on the bus
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 Bus request: Indicates that a module needs to gain

control of the bus
Bus grant: Indicates that a requesting module has been
granted control of the bus
Interrupt request: Indicates that an interrupt is pending
Interrupt ACK: Acknowledges that the pending interrupt
has been recognized
Clock: Is used to synchronize operations
Reset: Initializes all modules

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 The operation of the bus is as follows. If one module wishes

to send data to another, it must do two things: (1) obtain
the use of the bus, and (2) transfer data via the bus.
If one module wishes to request data from another module,
it must (1) obtain the use of the bus, and (2) transfer a
request to the other module over the appropriate control
and address lines.
It must then wait for that second module to send the data.
Physically, the system bus is actually a number of parallel
electrical conductors.
In the classic bus arrangement, these conductors are metal
lines etched in a card or board (printed circuit board).
The bus extends across all of the system components, each
of which taps into some or all of the bus lines.

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 The classic physical arrangement is depicted in Figure 3.17.

In this example, the bus consists of two vertical columns of
conductors.
At regular intervals along the columns, there are
attachment points in the form of slots that extend out
horizontally to support a printed circuit board.
Each of the major system components occupies one or
more boards and plugs into the bus at these slots.
The entire arrangement is housed in a chassis.
This scheme can still be used for some of the buses
associated with a computer system.
However, modern systems tend to have all of the major
components on the same board with more elements on the
same chip as the processor.
Thus, an on-chip bus may connect the processor and cache
memory, whereas an on-board bus may connect the
processor to main memory and other components.
This arrangement is most
convenient.
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 Multiple-Bus Hierarchies

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 Elements of Bus Design

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 PCI (peripheral component interconnect) is a popular highbandwidth, processor-independent bus that can function as
a mezzanine or peripheral bus.
Compared with other common bus specifications, PCI
delivers better system performance for high-speed I/O
subsystems (e.g., graphic display adapters, network
interface controllers, disk controllers, and so on).

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