Outline
Outline
Outline
8155 Timer
Modes of timer
Square wave generation using 8155 interfaced timer
8155 Features
Port
A
RAM
AD7
AL
E
Port
C
8155
Timer
CLK
Port
B
Timer
MSB
LSB
PA0PA7
PB0PB7
PC0PC5
Timer
Out
A
1
A0
Port (ALE
high,
AD0=A0)
Command
/Status
Register
PA
PB
PC
Timer LSB
Timer MSB
CWR
AD0AD7
AL
E
Latc
h
D7D0
Port
A
A0A7
A
2
A
1
A
0
0
3 to 8 12
Decode3
4
r
5
Port
B
Port
C
Timer
MSB
LSB
Clock for
timer
PA0PA7
PB0PB7
PC0PC5
Timer
Out
Co
ntr
ol
Latc
h
20H
IO/M
A0A7
RAM
21H
AD7
AL
E
8155
D7D0
CWR
A
2
A
1
A
0
3 to 8
Decode
r
22H
23H
Port
A
Port
B
Port
C
Timer
MSB
LSB
Clock for
timer
24H
25H
PA0PA7
PB0PB7
PC0PC5
Timer
Out
Programmable Interface
Device
Designed to perform various I/O
functions
Device can be setup to perform
specific functions
By writing instruction to a internal
register
Programmable Interface
Device
Functions are determined by software
instructions
Can be viewed as multiple I/O device
Perform many functions
Time delay, counting, interrupts
Requirement for a
programmable Interface Device
I/P & O/P Regs: A group of latches to
hold data
Tri-State Buffer
Capability of Bidirectional data flow
Handshake & Interrupt signal
Control Logic
Chip Select Logic
Interrupt control logic
Programmable interface
Device
Configurable Device Example
Latch Direction
A
B
Directi
on
Chip
Select
Making latches
programmable
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D7
Control
Reg
7A
7B
0A
D1
D0
Program
MVI A,01 H ; Set Do=1, D1-D7==0
OUT FFH ;Write in control register
MVI
A,BYTE1 ;Load data bye
OUT FEH ; Send Data out
0B
DI
R
G:
Enable
8155 Features
Port
A
RAM
AD7
AL
E
Port
C
8155
Timer
CLK
Port
B
Timer
MSB
LSB
PA0PA7
PB0PB7
PC0PC5
Timer
Out
A
1
A0
Port (ALE
high,
AD0=A0)
Command
/Status
Register
PA
PB
PC
Timer LSB
Timer MSB
CWR
AD0AD7
AL
E
Latc
h
D7D0
Port
A
A0A7
A
2
A
1
A
0
0
3 to 8 12
Decode3
4
r
5
Port
B
Port
C
Timer
MSB
LSB
Clock for
timer
PA0PA7
PB0PB7
PC0PC5
Timer
Out
A15
A14
A13
A12
A11
Calculate Address of
Port
of
8155
5
V
A
2
A
1
A
0
3 to 8 0
Decoder 4
Reset
in
RD
WR
C
E
IO/M
Co
ntr
ol
Latc
h
AD0AD7
20H
IO/
M
A0A7
Port
A
RAM
21H
ALE
D7D0
CWR
A
2
A
1
A
0
3 to 8
Decod
er
22H
Port
B
23H
Port
C
CS
PA0PA7
PB0PB7
PC0PC5
Time
r
MSB
LSB
Clock for
timer
24H
25H
Timer
Out
Co
ntr
ol
Latc
h
20H
IO/M
A0A7
RAM
21H
AD7
AL
E
8155
D7D0
CWR
A
2
A
1
A
0
3 to 8
Decode
r
22H
23H
Port
A
Port
B
Port
C
Timer
MSB
LSB
Clock for
timer
24H
25H
PA0PA7
PB0PB7
PC0PC5
Timer
Out
D6
Timer
Command
D5
D4
IEB
IEA
D3
D2
PC
D1
D0
PB
PA
00:
01:
10:
11:
No effect
Stop if running else no effect
Stop after terminal count (TC) if running, else no effect
Start ifAL
notDrunning,
reload
at TC
if running.
D2 PC5
PC4
PC3
PC2
PC1
PC0
Port C bits T
1
(D2, D3)
3
0
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
STBA
BFA
INTRA
A15
A14
A13
A12
A11
A
2
A
1
A
0
AD7
to
AD0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
3 to 8 0
Decoder 4
8155
IO/Mb
ALE
RDb
WRb
RESET OUT
PB7
PB6
PB5
PB4
IO/Mb
PB3
ALE
PB2
RDb
PB1
WRb
PB0
RESET OUT
7
Seg
LED
Drive
r
7
Seg
LED
Drive
7
r
Seg
LED
Drive
r
7
Seg
LED
Drive
r
Control word:
D7
D6
D5
D4
D3
D2
D1
D0
Port B
Output
Port A
Output
Timer
Program
MVI
OUT
MVI
OUT
MVI
OUT
Not
Applicabl
e
Use for
Port C
A,03
; initialize Port A &B for O/P
20H
A, BYTE1 ; Display BYTE1 at port A
21H
A, BYTE2 ; Display BYTE2 at port B
22H