AUTOSAR LayeredSoftwareArchitecture
AUTOSAR LayeredSoftwareArchitecture
AUTOSAR LayeredSoftwareArchitecture
Architecture
Agenda
Introduction
Overview of Software Architecture
Microcontroller Abstraction Layer
ECU Abstraction Layer
Communication Hardware, Memory Hardware, I/O Hardware and
Onboard device Abstraction
Services Layer
Communication, Memory and System Services
Complex Drivers
RTE (Run Time Environment)
Application Software Component and Interfaces
BSW Scheduler
Configuration Classes
Implementation Conformance Classes
2
Introduction
Extensibility
Modules can be added or the functionality of existing ones can be extended,
but their configuration has to be considered in the Basic SW configuration
process
Complex drivers can easily be added
3
Simplified Component View
Complex
Standardized
Standardized Standardized AUTOSAR AUTOSAR
Drivers
AUTOSAR Services Layer
Interface Interface Interface Interface
Interface
Basic Software
ECU
Services Communication
Abstraction
Standardized Standardized Standardized
Standardized
Operating
Device
System
Standardized Drivers
Interface
Basic Software
Microcontroller Abstraction Layer Microcontroller
Abstraction
ECU-Hardware
4
Layered View: Detailed
Application Layer
Microcontroller
5
Overall Basic Software Architecture
6
Microcontroller Abstraction Layer
FlexRay Driver
PORT Driver
PWM Driver
MCU Driver
CAN Driver
GPT Driver
ADC Driver
DIO Driver
ICU Driver
LIN Driver
Core Test
RAM Test
Driver
Software
module
Internal
peripheral
Power
Clock
EEPR
FLAS
PWM
WDT
CCU
MCU
GPT
CAN
Unit
ADC
DIO
LIN
SCI
OM
SPI
Microcontroller
or
device
H
&
7
Communication Hardware Abstraction
Handler
Driver
Driver
Driver
CAN
DIO
SPI
CAN
DIO
SPI
µC
8
SPI Handler
SPI Handler module allows concurrent access of several clients to one or more SPI
buses
In many ECUs, a lot of onboard hardware devices like external EEPROM, external I/O
ASICs, external watchdogs, System Basis Chip, etc. are connected to the
microcontroller via SPI
Example:
External External
Driver for ext. Driver for ext.
Watchdog EEPROM
ADC ASIC I/O ASIC
Driver Driver
SPI Handler
Communication Drivers
SPI Driver
SPI
µC
9
Memory Hardware Abstraction
A group of modules which abstract from the location of memory devices (on-chip or
on-board) and the ECU hardware layout
on-chip EEPROM and external EEPROM devices should be accessible via
an equal mechanism
The memory drivers are accessed via memory specific abstraction (EEPROM
Abstraction/Flash EEPROM Emulation) modules
Provides equal mechanisms to access internal (on-chip) and external (on-
board) memory devices and type of memory hardware (EEPROM, Flash)
ern
Ext
ver
Fla
Dri
al
sh
EEPROM Driver
Driver
Intern
Driver
Flash
Drive
Hand
al
M
SPI
ler
EEP
Fla
SPI
RO
µC
sh
M
10
I/O Hardware Abstraction
Group of modules which abstract from the location of I/O devices (on-chip or on-
board) and the ECU hardware layout (e.g. µC pin connections and signal level
inversions)
The different I/O devices are accessed via an I/O signal interface
Represent I/O signals (e.g. current, voltage, frequency) as they are connected to
the ECU hardware
Hide ECU hardware and layout properties from higher software layers
Driver
Driver
Driver
ADC
DIO
SPI
ADC
DIO
SPI
µC
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Onboard Device Abstraction
Contains drivers for ECU onboard devices (which cannot be seen as sensors or actuators)
like system basic chip, external watchdog, etc. Those drivers access the ECU onboard
devices via the Microcontroller Abstraction Layer
Abstracts from ECU specific onboard devices
12
Communication Services
13
Communication Services
Group of modules for vehicle network communication (CAN, LIN and FlexRay)
Provide uniform interface to the vehicle network for communication between different
applications
Provide uniform services for network management
Provide uniform interface to the vehicle network for diagnostic communication
Hide protocol and message properties from the application
Communication Services
DCM Generic NM
AUTOSAR COM Diagnostic Com. Interface
Manager
Bus Specific
PDU Router Manager
<Bus specific>
IPDU Multiplexer NM
<Bus specific>
Transport Protocol
Bus Specific
Interface
Communication Drivers
Bus Specific Driver
SCI µC
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Communication Stack - CAN
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Communication Stack - FlexRay
Uniform interface to the FlexRay network. Hide protocol and message properties
from the application.
FlexRay NM is specific for FlexRay networks and will be instantiated per FlexRay
vehicle network system
System Services Communication Services
DCM Generic NM
Synchronization
Interface
Time Service
External External
FlexRay Controller FlexRay Transceiver Data lines
(e.g. MFR 4200) (e.g. TJA 1080) Control/status lines
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Memory Services
Memory Services are a group of modules responsbile for the management of non
volatile data (read/write from different memory drivers)
NVRAM manager expects a RAM mirror as data interface to the application for fast
read access
Provide non volatile data to the application in a uniform way
Abstract from memory locations and properties
Provide mechanisms for non volatile data management like saving, loading,
checksum protection and verification, reliable storage etc
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System Services
System Services
Function Inhibition
Watchdog Manager
Development Error
ECU State Manager
Diagnostic Event
Communication
Synchronization
Manager
Manager
Manager
Service
Tracer
DEM
FIM
Group of modules and functions
AUTOSAR OS
Interpolation Lib
all layers (Examples are AUTOSAR
OS, Error Manager, Library
CRC Lib routines, etc.)
Crypto Lib
Some of these services are
Bit Lib µC dependent (like OS),
partly ECU hardware and
Other Libs application dependent (like
ECU State Manager) or
Flash Check
hardware and µC independent.
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Complex Drivers
Should fulfill the special functional and timing requirements for handling
complex sensors and actuators
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Application Layer and RTE
Application Layer
Actuator Sensor
Software Software
Component Component
RTE
Basic Software
Interfaces to (e.g.)
• I/O HW Abstraction (access to I/O signals)
• Memory Services (access to calibration data)
• System Services (access to Error Manager)
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BSW Scheduler - Scheduling
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BSW Scheduler - Scheduling
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BSW Scheduler - Scheduling
Task1 {
Zzz_MainFunction_Bbb(); Zzz_MainFunction_Bbb();
Yyy_MainFunction_Aaa(); Yyy_MainFunction_Aaa();
Xxx_MainFunction_Aaa(); Xxx_MainFunction_Aaa();
...
}
Transformation
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BSW Scheduler - Scheduling
RTE
BSW Scheduling objects
Main functions
n per module
located in all layers Zzz_MainFunction_Aaa
BSW Events
Recurring Event
Sporadic Event
Yyy_MainFunction_Aaa
Triggers
Main functions
Can be triggered in all layers by
Recurring Events Xxx_Isr_Yyy
Sporadic Events
Microcontroller
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BSW Scheduler - Data consistency
The access to shared data from concurrent threads of code execution can
potentially cause data inconsistencies
In general, there are two types of shared resources possible - resources accessed
globally and resources accessed locally
In case of globally accessible resources, resources are passed via pointer. Thus, the
BSW module that ‘owns’ the resource cannot even apply any locking scheme to
provide data consistency
For local accessible resources, data consistency can be achieved through exclusive
areas
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BSW Scheduler - Data consistency
The BSW module assures data consistency for the internal shared resources. The
implementation of the BSW module exists as source code.
Example implementation of the BSW module :
Com_cfg.h
#define EXCLUSIVE_AREA_0 ((uint8)0)
Com.c:
#include “Com_cfg.h”
#include “SchM_Com.h”
SchM_Enter_Com (EXCLUSIVE_AREA_0);
<Access to resource 0>
SchM_Exit_Com (EXCLUSIVE_AREA_0);
The BSW scheduler implements calls to allow critical sections to be entered and
exited and are mapped to appropriate OS calls.
Example implementation of the BSW Scheduler :
#define SchM_Enter_Com(0) DisableAllInterrupts
#define SchM_Exit_Com(0) EnableAllInterrupts
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Interfaces - General Rules
AUTOSAR Interface
Communication Drivers
Microcontroller Drivers
Standardized Interface
Memory Services
SystemServices
Complex Drivers
Memory Drivers
I/ODrivers
AUTOSAR SW Components / RTE
ü “is allowed to use” System Services
û “is not allowed to use” Memory Services
D “restricted use (callback only)” Communication Services
Complex Drivers
I/O Hardware Abstraction
The matrix is read row-wise: Onboard Device Abstraction
Example: “I/O Drivers are allowed Memory Hardware Abstraction
to use System Services and Communication Hardware Abstraction
Hardware, but no other layers”. Microcontroller Drivers
Memory Drivers
(gray background indicates “non- Communication Drivers
Basic Software” layers) I/O Drivers
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Interfaces - Error Handling and
Reporting Concept
Types of errors
Hardware errors / failures - EEPROM cell is not writable any more
Software errors – wrong API parameter (out of range)
System errors – CAN receive buffer overflow, timeout for receive messages
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Configuration Classes
Link time
Constant data outside the module; the data can be configured after the module
has been compiled
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Configuration Classes - Pre compile
time
Enabling/disabling optional functionality
Nm_Cfg.c Nm_Cfg.h
uses includes
(optional)
Nm.c
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Configuration Classes - Link Time
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Configuration Classes - Post build time
Configuration of data where only the data structure is defined but the contents not
known during ECU build time
Configuration of data that is likely to change or has to be adapted after ECU build time
Direct access
Linker control file (via reference as given by
the pointer parameter of
PduR’s initialization function)
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Implementation Conformance Classes -
ICC1
Application Layer
ECU Hardware
34
Implementation Conformance Classes -
ICC2
35
Implementation Conformance Classes -
ICC3
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Compiler Abstraction
The location of data and code has to be selected explicitly by special keywords (e.g
far, near)
Using special keywords directly in the code would make it necessary to port the
software to each new microcontroller/ compiler family
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Compiler Abstraction
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Compiler Abstraction
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Compiler Abstraction
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Compiler Abstraction
Three-step concept
Macros for the encapsulation of definitions and declarations (Compiler.h)
Distinguish between the different memory classes and pointer classes (#defines )
Configure the #defines with the appropriate compiler specific keywords according
to the module’s description and memory set-up of the build scenario
(Compiler_Cfg.h)
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AUTOSAR Memory Mapping mechanism
Each AUTOSAR software module should wrap declaration and definition of code,
variables and constants using the following mechanism
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AUTOSAR Memory Mapping mechanism
#define CANTP_START_SEC_VAR_16BIT
#include “MemMap.h”
uint16 CanTp_GusNasTimer;
uint16 CanTp_GusNbsTimer;
/* Any other 16 bit variables */
#define CANTP_STOP_SEC_VAR_16BIT
#include “MemMap.h”
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AUTOSAR Memory Mapping mechanism
#ifdef CANTP_START_SEC_VAR_16BIT
#undef CANTP_START_SEC_VAR_16BIT
#define START_SECTION_DATA_16BIT
#elif /* additional mappings of modules sections into project sections */
...
#endif
#ifdef START_SECTION_DATA_16BIT
#pragma DATA_SEG RAM_16BIT_SEGMENT
#undef START_SECTION_DATA_16BIT
#elif /* additional statements for switching the project sections */
...
#endif
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AUTOSAR Memory Mapping mechanism
#ifdef CANTP_STOP_SEC_VAR_16BIT
#undef CANTP_STOP_SEC_VAR_16BIT
#define STOP_SECTION_DATA
#elif /* additional mappings of modules sections into project sections */
...
#endif
#ifdef STOP_SECTION_DATA
#pragma DATA_SEG DEFAULT_SEGMENT
#undef STOP_SECTION_DATA
#elif /* additional statements for switching the project sections */
...
#endif
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Questions??