Introduction to 8085/8080A Assembly

Language Programming
 Programming Model

The 8085 programming model includes six general purpose registers, one
accumulator, and one flag register. In addition, it has two 16-bit registers
named as the stack pointer and the program counter.

General purpose registers

The 8085 microprocessor has Accumulator A (8) Flag Register
six general purpose registers to
B (8) C (8)
store 8-bit data (first operation)
during a program execution. D (8) E (8)

These registers are identified H (8) L (8)

as B, C, D, E, H and L as shown
in Figure. Stack Pointer (SP) (16)

Can be used singly Program Counter (PC) (16)

Or can be used as register

pairs – BC, DE, and HL to perform 8
Data Bus Address Bus 16
Lines Lines
some 16-bit operation

Bidirectional Unidirectional
 Programming Model

H and L can be used as a data pointer (holds memory address).

N.B. Some microprocessor do not have these types of register; instead, they
use memory space as their register.

Accumulator
The accumulator, identified as A, is an 8-bit register which is part of
the arithmetic/logic unit (ALU).
It is used to store 8-bit data and to perform arithmetic and logical
operations (Second operation).
It is used to store the result of an operation.
It is also used to store 8 bit data during I/O transfer.

Flag register
It is an 8-bit register adjacent to the accumulator and part of the ALU.
It is not used as an 8-bit register; five bit positions, out of eight, are used
to store the outputs of the five flip-flops.
 Programming Model

These five flip-flops will be set or reset after an operation according to

data conditions of the result in the accumulator and other registers.
They are called Zero (Z), Carry (C), Sign (S), Parity (P) and Auxiliary Carry
(AC) flags.
The microprocessor uses these flags to test data conditions (Third
operation).

The bit positions in the flag register are shown in the following figure
D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

Zero (z) Flag

In the flag register, the flip-flop which is used to indicate a zero result
in the accumulator is called zero flag.
This flag is set to 1, when the result is zero; otherwise it is reset.
 Programming Model

Carry (C) Flag

In the flag register, the flip-flop which is used to indicate a carry or
borrow is called carry flag.
This flag is set to 1, if there is a carry or borrow from an arithmetic
operation; otherwise it is reset.
The Jump instruction, JC ( Jump On Carry ) is associated with this
flag.
Sign (S) Flag
In the flag register, the flip-flop which is used to indicate the sign of
the result in the accumulator is called sign flag.
This flag is set if the result in the accumulator is negative; otherwise it
is reset if the result in the accumulator is positive.
1 Negative; 0 Positive
Parity (P) Flag
In the flag register, the flip-flop which is used to indicate the even
number of 1s or odd number of 1s in the result is called parity flag.
 Programming Model

Parity (P) Flag

This flag is set for an even number of 1s in the result; otherwise it is
reset for an odd number of 1s.
Auxiliary Carry (AC) Flag
In the flag register, the flip-flop which is used to indicate the auxiliary
carry is called auxiliary carry flag.
This flag is set when a carry generated by digit D3 and passed to digit
to D4 in an arithmetic operation; otherwise it is reset.
This flag is used internally for BCD (binary-coded decimal) operations.
There is no Jump instruction associated with this flag.
Program Counter (PC)
This is a 16-bit register that is used to sequence the execution of the
instructions.
It is also called memory pointer. In 8085 µp, memory locations have 16-bit
addresses, and that is why it is a 16-bit register.
 Programming Model

Program Counter (PC)

The function of the program counter is to point to the memory address from
which the next instruction is to be fetched, i.e. it always holds the address of
the next instruction. When an instruction is being fetched, the program counter
is incremented by one to point to the next meomry location.
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer, i.e., it
points to a memory location in R/W memory. It holds the current level (top) of
the stack.
The stack is a group of memory locations in the R/W memory that is used
temporary storage of binary information during the execution of a program. In
other words, it is an area of memory used to hold data that will be retrieved
soon.
The starting memory location of the stack is defined in the main program,
and space is reserved, usually at the high end of the memory map.
The stack is usually accessed in a Last In First Out (LIFO) fashion.
 Classification of Instructions

Instruction
An instruction is a binary pattern designed inside a microprocessor to
perform a specific function. The entire group of instructions, called the
instruction set, determines what functions the microprocessor can perform.
The 8085 microprocessor instruction set has 74 operation codes that result
in 246 instructions. This instruction set includes all the 8080A instructions
plus two additional instructions namely SIM and RIM.
Classification
The instruction set of 8085 microprocessor is classified into five categories.
They are:

Data Transfer (Copy) Operations

Arithmetic operations
Logical Operations
Branching Operations
Machine Control Operations
 Classification of Instructions

Data Transfer (Copy) Operations

This group of instructions copies data from a location called a source to
another location called destination without modifying the contents of the
source. Basically, it performs “copy” operation.
The instructions belong to this categories are used to transfer data from
one register to another register, from memory to register or register to
memory but not from one memory location to another memory location, and
from an I/O device to the accumulator and vice versa.
MOV, MVI (Move Immediate), LXI (Load Immediate H-L Pair), LDA (Load
Accumulator), STA (Store Accumulator), LHLD (Load H-L pair direct), SHLD
(Store H-L pair direct), XCHG (Exchange the contents of H-L pair with D-E
pair) etc., are the instructions of this category.
Examples
MVI A, 55H ; Move the data 55H into Accumulator
MOV B, C ; Copies the contents of ‘C’ register into ‘B’ register
IN 00H ; Read the Input port (00H is the port address)
OUT 01H ; Write data to an output port (01H is the port address)
LXI H,8570H ; Load H-L pair by address 8570H
The data transfer instructions do not affect any flags.
 Classification of Instructions

Arithmetic Operations
This group of instructions performs arithmetic operations such as addition,
subtraction, increment and decrement.
The addition and subtraction operations are performed in relation to the
contents of the accumulator. But, the increment or the decrement operations
can be performed in any register.
ADD, ADI (Add Immediate), SUB (Subtract), SUI (Subtract Immediate), INR
(Increment), DCR (Decrement) etc., are the instructions of this group.
Examples
ADD B ; Add the contents of B register to the accumulator.
ADI 08H ; Add the data 08H to the accumulator.
SUB B ; Subtract the contents of B register from the accumulator.
SUI 05H ;Subtract immediate the data 05H from the accumulator.
INR B ; Increment the B register contents by one bit.
DCR C ; Decrement the C register contents by one bit.

Arithmetic instructions modify all the flags according to the data conditions of
the result. The INR and DCR instructions affect all flags except the carry flag.
 Classification of Instructions

Logical Operations
Since the microprocessor is a programmable logic chip, it can be performing
all the logic functions of the hard-wired logic through its instruction set of this
category.
The various logic functions (such as AND, OR, Exclusive-OR, Rotate,
Compare, Complement (NOT) etc.) are performed in relation to the contents of
the accumulator.
The executions of the logical instructions do not affect the contents of the
operand register.
Examples
ANA : Logically AND the contents of a register
ANI : Logically AND immediate the 8-bit data.
ORA : Logically OR the contents of a register.
OR : Logically OR immediate the 8-bit data.
XRA : Exclusive-OR the contents of a register.
XRI : Immediate Exclusive-OR the 8-bit data
CMA : Complement the accumulator
The CMA instruction does not affect any flags.
 Classification of Instructions

Branching Operations
This group of instructions alters the sequence of program execution
either conditionally or unconditionally.
The branch instructions instruct the microprocessor to go to a different
memory location and the processor continues executing machine codes
from the new location.
The address of the new location either specified explicitly or provided by
the microprocessor or some times by additional hardware.

The Branch instructions are classified into three categories. They are:
 Jump Instructions
 Call and Return Instructions
 Restart Instructions
Jump Instructions
The Jump instructions specify the memory locations explicitly. They are 3-byte
instructions: one byte for the operation code, followed by a 16-bit memory
address. Jump instructions are classified into two categories. They are:
 Unconditional Jump
 Conditional Jump
 Classification of Instructions

 Unconditional Jump
The unconditional branch instructions transfer the program to the specified
label/location unconditionally. This is similar to Unconditional Go to statement
in BASIC.
This Unconditional Jump instruction enables the programmer to set up
continuous loops.
The 8085/8080A includes one unconditional Jump Instruction.
Example
JMP 8500H (16-bit memory address)
Which instructs the microprocessor to go to the memory location 8500H
unconditionally.

Sometimes, the jump location is specified using a label also.

Example
Label Mnemonics Comments
SART: IN 00H ; Read input switches
OUT 01H ; Turn on devices according to switch positions
JMP START ; Go back to beginning and read the switches again
 Classification of Instructions

 Conditional Jump
The conditional branch instructions transfer the program to the specified
label/location when certain condition is satisfied.
This instruction allows the microprocessor to make decision depending
on certain conditions indicated by flags.
In the 8085/8080A microprocessor, Carry flag (CY), Zero flag (Z), Sign flag
(S) and Parity flag (P) are used by the conditional Jump instructions.
In the 8085/8080A microprocessor, all conditional Jump instructions are
3-byte instructions; the first byte specifies the operation code, the second
byte specifies the low-order (line number) memory address, and the third
byte specifies the high-order (page number) memory address.

The following instructions transfer the program sequence to the memory

location specified under the given conditions:

Opcode Operand Description

JC 16-bit addr Jump On Carry (if result generates carry and CY = 1
JNC 16-bit addr Jump On No Carry (if CY = 0)
JZ 16-bit addr Jump On Zero (if result is zero and Z = 1
 Classification of Instructions

Opcode Operand Description

JNZ 16-bit addr Jump On No Zero (if Z = 0)
JP 16-bit addr Jump On Plus (if D7 = 0, and S = 0)
JM 16-bit addr Jump On Minus (if D7 = 1, and S = 1)
JPE 16-bit addr Jump On Even Parity (if P = 1)
JPO 16-bit addr Jump On Odd Parity (if P = 0)
The Zero and Carry flags and related conditional Jump Instructions are used
frequently.
 Call and Return Instructions
These instructions change the sequence of a program either by calling a
subroutine or returning from a subroutine. That is, the microprocessor uses
the two instructions CALL and RET to implement subroutines
The CALL instruction calls a subroutine program which is not a part of the
main program and the RET instruction at the end of the subroutine program
to return the control to the main program.
Example
CALL 16-bit memory address
Instructions
RET
 Classification of Instructions

The conditional Call (CALL) and Return (RET) instructions also can test
condition flags
No flags are affected
 Restart Instruction
The RST (Restart) instructions are equivalent to 1-byte call instructions to
one of the eight memory locations on page 00H (high-order memory address).
In other words, the 8085/8080A microprocessor provides eight RST
instructions to transfer the program control to one of eight memory locations
on page 00H.
These instructions are generally used in conjunction with interrupts and
inserted using external hardware.
Mnemonics Hex Code Restart/Call address

RST 0 C7 0000H
RST 1 CF 0008H
RST 2 D7 0010H
RST 3 DF 0018H
RST 4 E7 0020H
RST 5 EF 0028H
 Classification of Instructions

Mnemonics Hex Code Restart/Call address

RST 6 F7 0030H
RST 7 FF 0038H

No flags are affected

Machine control operations

This group of instructions controls the machine functions such as Halt,
Interrupt, or do nothing.
There are six basic machine control instructions. They are
 EI (Enable Interrupt)
 DI (Disable Interrupt)
 NOP (No Operation)
 SIM (Set Interrupt Mask)
 RIM (Read Interrupt Mask)
 HLT (Halt)
 Classification of Instructions

According to word size, the instruction set of the 8085/8080A can also be
classified into the following three groups:
 One-word or 1-byte instructions
 Two-word or 2-byte instructions
 Three-word or 3-byte instructions

 One-word or 1-byte instructions

A 1-byte instruction includes the operation code (opcode) and the operand
in the same byte.
This instruction requires one memory location to store in memory.

Example

Opcode Operand Binary Code Hex Code

MOV C,A 0100 1111 4FH

ADD B 1000 0000 80H
CMA 0010 1111 2FH
 Classification of Instructions

 Two-word or 2-byte instructions

In a 2-byte instruction, the first byte specifies the operation code and the
second specifies the operand.
This instruction requires two memory locations to store in memory.

Example

Opcode Operand Binary Code Hex Code

MVI A,32H 0011 1110 3E

0011 0010 32H
 Classification of Instructions

 Three-word or 3-byte instructions

In a 3-byte instruction, the first byte specifies the operation code and the
following two bytes specify the 16-bit address. Note that the second byte is
the low-order address and the third byte is high-order address.
This instruction requires three memory locations to store in memory.

Example

Opcode Operand Binary Code Hex Code

JMP 2085H 1100 0011 C3

1000 0101 85H
0010 0000 20H
 These commands are in many ways similar to our everyday conversation.
For example, while eating in a restaurant, we may make the following
requests and orders:
 Pass (the) butter.  I will have combination 17 (on the menu).
 Pass (the) bowl.  I will have what Rahim ordered.
 (Let us) eat.
 Addressing Modes

The instruction of 8085 microprocessor requires an operand/operands

(either data or address) on which the intended operation can be performed.
Some instructions may require only one operand and some other
instructions require two operands for its instruction execution. The speed
of execution mainly depends on the position of the operand in the
instruction. The scheme involved in identifying the position of operands in
an instruction is known as addressing mode or simply, the various formats
of specifying the operands are called the addressing modes.

The 8085/8080A instruction set has the following five addressing modes:

1.Immediate Addressing Mode

2.Direct Addressing Mode
3.Register Addressing Mode
4.Register Indirect Addressing Mode
5.Implicit Addressing Mode
 Addressing Modes

1. Immediate Addressing Mode

The mode of addressing in which the operand is a part of the instruction
itself is known as Immediate Addressing Mode. If the immediate data is
8-bit, the instruction will be of two bytes. If the immediate data is 16 bit,
the instruction is of 3 bytes.
Example
ADI Data ; Add immediate data to the contents of the accumulator.
SUI Data ; Subtract immediate data from the content of the accumulator.
MVI A, Data ; Move immediate data to the accumulator
LXI H, 8000H ; Load the H-L pair with the immediate operand 8000H

2. Direct Addressing Mode

The mode of addressing in which the 8/16-bit address of the operand is
directly available in the instruction itself is called Direct Addressing Mode.
i.e., the address of the operand (data) is available in the instruction itself.
This is a 3-byte instruction. This mode is also called the Absolute Mode.
 Addressing Modes

Example
IN/OUT 8-bit Port Address ; Read/Write the data from the/into the 8-bit port
address
LDA 4000H ; Load the contents of memory location (4000H)
into the accumulator.
STA 8000H ; Store the contents of the Accumulator in the
memory location 8000H

3. Register Addressing Mode

The mode of addressing in which the operand is in one of the general
purpose registers is known as the Register Addressing Mode.

Example

MOV A,B ; Move the contents of B register to the A register

SUB C ; Subtract the contents of C register from the Accumulator
ADD B ; Add the contents of B register to the contents of Accumulator
 Addressing Modes

4. Register Indirect Addressing Mode

The mode of addressing in which the operand address is given in an
indirect way with the help of a register pair is called Register Indirect
Addressing Mode. In this addressing mode, the 16-bit address location of
the operand stored in a register pair (e.g. H-L) is given in the instruction.
Example
LADX B ; Load the accumulator with the contents of a memory location
addressed by the B,C register pair.
STAX H ; Store the contents of the accumulator into a memory location
addressed by the H,L register pair.
5. Implied/Inherent/Implicit Addressing Mode
The mode of addressing in which the instructions have no operands is
known as Implied/Inherent/Implicit Addressing Mode. That is, the operand
in this mode is inherent and it is automatically considered to be in the
Accumulator.
Example
CMA ; complement the contents of Accumulator
STC ; Set carry flag
 Opcode Format

 To understand operation codes, we need to examine how an instruction

is designed into the microprocessor. This information will be useful in
reading a user’s manual, in which operation codes are specified in binary
format and 8 bits are divided in various groups.
In the design of the 8085/8080A microprocessor chip, all operations,
registers, and status flags are identified with a specific code. For
example, all internal register are identified as follows:
Code Registers Code Register Pairs
000 B 00 BC
001 C 01 DE
010 D 10 HL
011 E 11 AF or SP
100 H
101 L
111 A
110 Reserved for memory
related operation
 Opcode Format

Function Operation Code

00000111 = 07H (RLC)
Rotate each bit of the accumulator
(8-bit opcode)
to the left by one position.
Add the contents of a register to the 10000 SSS
contents of accumulator.

5-bits opcode 3-bits are reserved

for a register
This instruction is completed by adding the code of the register. For Example,

Add :10000
Register B : 000
to A : Implicit
Binary Instruction : 10000 000