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Module 1.2

The document provides a comprehensive overview of digital logic concepts, including number systems, binary logic, Boolean algebra, and the implementation of Boolean functions using logic gates. It covers various methods for simplifying Boolean functions, such as the Karnaugh map (K-map) method, and includes examples of minterms and maxterms. Additionally, it discusses the use of NAND and NOR gates for circuit implementation and provides practice problems for further understanding.

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Kishore Kumar
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0% found this document useful (0 votes)
8 views130 pages

Module 1.2

The document provides a comprehensive overview of digital logic concepts, including number systems, binary logic, Boolean algebra, and the implementation of Boolean functions using logic gates. It covers various methods for simplifying Boolean functions, such as the Karnaugh map (K-map) method, and includes examples of minterms and maxterms. Additionally, it discusses the use of NAND and NOR gates for circuit implementation and provides practice problems for further understanding.

Uploaded by

Kishore Kumar
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
Download as pptx, pdf, or txt
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Digital Logic

Dr. E.Papanasam
papanasam.e@vit.ac.in
AP Senior
School of Electronics
VIT Chennai
Number Systems
Positional weight
Binary to Decimal
(11010.11)2 =
Octal to Decimal
(123.4)8 = 1 x 82 + 2 X 81 + 3 x 80 + 4 X 8-1
= (83.5)10
(7392)10 =
Hexadecimal to Decimal
Number Base Conversion
Decimal to Binary
(41)10 = (101001)2
(0.6875)10 = (0.1011)2

Decimal to Octal
(153)10 = (231)8
(0.513)10 = (0.40651….)8
Number Base Conversion
Decimal to Hexadecimal
(540)10 = (21C)16

(0.06640625)10 = (0.110)16
OCTAL AND HEXADECIMAL NUMBERS
Binary to Octal

Binary to Hexadecimal
Binary Codes
Binary Logic
 Consists of binary variables and logical operations
 The variables are designated by letters of the
alphabet (A, B, C, x, y, Z, etc., )
 Each variable having two and only two distinct
possible values: 1 and 0
 There are three basic logical operations: AND,
OR, and NOT
 AND:
◦ Represented by a dot or by the absence of an
operator
◦ Ex., x·y = z or xy = Z ("x AND y is equal to z.“)
◦ The logical operation AND is interpreted to mean
Binary Logic
 OR
◦ Represented by a plus sign
◦ Example, x + y = z ("x OR y is equal to z,“)
◦ z = I if x = I or if y = I or if both x = I and y = I.
◦ If both x = 0 and y = 0, then z = 0.
 NOT
◦ Represented by a prime (sometimes by a bar)
◦ Example, x' = z (or x = z) is read "not x is
equal to z,"
◦ z is what x is not.
◦ In other words, if x = I, then z = 0; but if x = 0,
then z = 1
Logic Gates
Binary Signal and Symbols for digital logic
circuit
Input-output signals for Logic gates
Boolean Algebra
AXIOMATIC DEFINITION OF
BOOLEAN ALGEBRA
 Boolean algebra is an algebraic structure defined on a
set of elements B together with two binary operators +
and ., provided the following (Huntington) postulates
are satisfied:
Basic Theorems and Properties of Boolean
Algebra
Duality principle
Every algebraic expression deducible from
the postulates of Boolean algebra remains
valid if the operators and identity elements
are interchanged
S. No. Postulate/ Theorem (a) (b)

1 Postulate 2, Identity
2 Postulate 3, Commutative
3 Postulate 4, Distributive
4 Postulate 5, Complements
5 Theorem 1, Idempotent
6 Theorem 2, Null elements
7 Theorem 3, Involution
8 Theorem 4, Associative
9 Theorem 5, DeMorgan

10 Theorem 6, Absorption
Basic Theorems
Basic Theorems (2)
Operators Precedence
(I)Parentheses
(2) NOT
(3) AND
(4) OR
Boolean Functions
 Boolean Algebra deals with binary variables and logic
operations
 A Boolean function is an expression formed with binary
variables, the two binary operators OR and AND, and
unary operator NOT, parentheses, and an equal sign
 For a given value of the variables, the function can be
either 0 or I
Implementation of Boolean function with
Gates
Implementation of Boolean function with
Gates (2)
Algebraic Manipulation
 The number of literals in a Boolean function can
be minimized by algebraic manipulations
 A literal is a primed or unprimed variable
 When a Boolean function is implemented with
logic gates, each literal in the function designates
an input to a gate, and each term is implemented
with a gate
 The minimization of the number of literals and
the number of terms results in a circuit with less
equipment
Simplification of Boolean Function
Complement of Function
Complement of Function by Dual
Canonical and Standard forms
 minterm (standard product)
◦ Consider two binary variables x and y
combined with an AND operation
◦ There are four possible combinations: x'y’,
x'y, xy', and xy (Since each variable may
appear in either form)
◦ Each of these four AND terms is called
minterm
◦ Each minterm is obtained from an AND
term of the n variables
◦ Each variable being primed if the
Canonical and Standard
forms
 maxterms, or standard sums
◦ n variables forming an OR term
◦ Each variable being primed or unprimed,
provide 2n possible combinations
◦ Each variable being unprimed if the
corresponding bit is a 0 and primed if a I
 Each maxterm is the complement of its
corresponding minterm, and vice versa
 Boolean functions expressed as a sum of min
terms or product of maxterms are said to be in
Minterms and Maxterms for Three Binary
Variables
Minterm and Boolean function
A Boolean function may be expressed
algebraically from a given truth table by
forming a minterm for each combination of
the variables that produces a 1 in the
function, and then taking the OR of all those
terms
Sum of Minterms
 Express the Boolean function F = A+B'C as
sum of minterms
 F(A, B, C) = ∑ (l, 4, 5, 6, 7)
Product of Maxterms
 Express the Boolean function F = xy+x'z in a
product of maxterm form
 First, convert the function into OR terms
using the distributive law:
Minterms and Maxterms
Conversion between Canonical Forms

Since MJ =mj’
Ram eat breakfast if he feel hungry and
the food is ready or time is 8 AM past
F = AB+C

Raj go to church if it is Sunday and vehicle


is ready or he is free and not having fever
F = AB+CD’
3-input Exclusive-OR gate
NAND NOR
Implementation
Example
In an automated transport the door opens if at
least two of the following happens
Bus reaches the stop
Conductor blow whistle
Driver applies the brake
Write an equation for the variable F which is 1
iff the door should open. Simplify the same
into 6 literals and Implement the same using
NAND gate
Implementation of NOT, AND and OR
by NAND gates
Two graphic symbols for a NAND gate
Multilevel NAND Circuits
 Procedure
◦ From the given Boolean expression, draw the logic diagram with AND,
OR, and inverter gates
◦ Assume that both the normal and complement inputs are available.
◦ Convert all AND gates to NAND gates with AND-invert graphic symbols
◦ Convert all OR gates to NAND gates with invert-OR graphic symbols
◦ Check all small circles in the diagram
◦ For every small circle that is not compensated by another small circle
along the same line, insert an inverter (one-input NAND gate) or
complement the input variable
Example
F = A + (B' + C)(D' + BE ')
NAND Diagram
Analysis Procedure
Derive the Boolean function
Substitute invert-OR symbols in
alternate levels
Implementation of NOT, OR, and AND by
NOR gates
Two graphic symbols for a NOR gate
Three graphic symbols for inverter
Multilevel NOR Circuit
F = (AB + E)(C + D)
Practice Problem
F = (CD + E)(A + B ') implement
using NOR gate
Analysis
Derive the Boolean Function
Substitute invert-AND in
alternate levels
NAND-NOR Example
Implement the following function
with NAND gates: F(x, y, z) = ∑
(0,6)
F = x'y'z' + xyz‘
NAND-NOR Example
Implement the following function
with NOR gates: F(x, y, z) = ∑
(0,6)
Rules for NAND and NOR
Implementation
Simplification of Boolean Functions – Map
Method
 The complexity of the digital logic gates that
implement a Boolean function is directly related to
the complexity of the algebraic expression
 Boolean functions may be simplified by algebraic
means is awkward
◦ Because it lacks specific rules to predict each
succeeding step in the manipulative process
 Effectiveness of algebraic simplification depends on
your familiarity with all the laws, rules and theorems
and on your ability to apply them
 The map method provides a simple straightforward
Map Method
 The map method is a simple, straightforward procedure for
minimizing Boolean functions.
 This method may be regarded as a pictorial form of a truth table.
 The map method is also known as the Karnaugh map or K-map.
 A K-map is a diagram made up of squares, with each square
representing one minterm of the function that is to be minimized.
 Simplified Boolean function is obtained graphically from the map.
 The terms of the function are the area enclosed by those squares
whose minterms are included in the function.
K-map
 Karnaugh map is an array of cell.
 Each cell represent a binary value of the
input variable
 # cells in a k-map awa # rows in a truth
table is equal to the total # of possible input
variable combinations
 The map is a diagram made up of squares
(array of cells)
 Each square represents one minterm
Map Method
 In fact, the map presents a visual diagram of all possible ways a function
may be expressed in standard form.
 By recognizing various patterns, the user can derive alternative algebraic
expressions for the same function, from which the simplest can be selected.
 The simplified expressions produced by the map are always in one of the
two standard forms:
◦ Sum of products (SOP) or
◦ Product of sums (POS).
Rules
 No zeros allowed in grouping
 No diagonal grouping
 Only power of 2 number of cells in each group.
 Groups should be as large as possible(Maximum
1s).
 Every one must be in at least one group.
 Overlapping allowed.
 Wrap around allowed.
 Fewest number of groups possible.

http://www.ee.surrey.ac.uk/Projects/Labview/minimisation/
K-map Rules
K-map Rules
K-map Rules

https://www.electricaltechnology.org/2018/05/karnaugh-
2-Variable K-Map
 Let us consider the following expression. Y 0 1
X
 0
The above expression can be rewritten as
1
 The truth table of the function is
Y 0 1
X Y F Minterm X
0 0 0 0 0 1

0 1 1 1 1
1 0 1
1 1 1
3-Variable K-Map
◦ Any two adjacent squares in the map differ by only one variable, which is primed in one
square and unprimed in the other.

◦ For example lie in two adjacent squares.


◦ Variable “B” is primed in and unprimed in .
◦ Remaining two variables (A and C) are same (unchanged)
in both squares.
◦ From the postulates of Boolean, the sum of adjacent minterms is a single AND term with
only two literals. BC 00 01 11 10
A
0

1
3-Variable K-Map
◦ We can do groupings of eight 1’s.
◦ Let us consider

◦ There are 1 possible group of eight 1’s.


◦ Then the Function F=1.
◦ Simply constant no literal in the term and F.
BC 0 0 01 11 10
A
0

1
Example Problem-1
Simplify the Boolean function

YZ 0 0 01 11 10 YZ 0 0 01 11 10
X X
0 0 0 0 1 0

1 1 1 0 1 1

◦ No group of eight 1’s and four 1’s.

◦ There are two groups of two 1’s. 𝑦𝑧


◦ More caution is required to avoid redundant groups.

◦ No need for a separate group of 𝑥𝑧 ′


Example Problem-2
Simplify the Boolean function

◦ No group of eight 1’s.


◦ One group of four 1’s. (z’) YZ 0 0 01 11 10
◦ There is one group of two 1’s. (x y’) X
0 1 3 2
0 1 0 0 1
◦ Therefore the simplified function is
4 5 7 6
1 1 1 0 1


𝐹 =𝑧 + 𝑥𝑦 ′ 𝑥𝑦 ′
𝑧′
Example Problem-3
Simplify the Boolean function
◦ Mark given terms in K-map.
◦ No group of eight 1’s. BC 0 0 01 11 10
A
◦ One group of four 1’s (C). 0 1 3 2
0 0 1 1 1
◦ There is one group of two 1’s. (A’ B) 4 5 7 6

◦ Therefore the simplified function is 1 0 1 1 0


𝐴𝐵

𝐹 =𝐶 + 𝐴 𝐵 𝐶
Example Problem-4
Simplify the Boolean function z 𝑥 ′ 𝑦𝑧 ′
Mark given minterms in K-map.
YZ 0 0 01 11 10
◦ No group of eight 1’s. X
0 1 3 2
◦ No group four 1’s. 0 0 1 0 1
4 5 7 6
◦ No group of two 1’s. 1 1 0 1 0
◦ There are 4 group of one 1’s.
◦ Therefore the simplified function is
𝑥𝑦 𝑧′

𝑥𝑦𝑧
′ ′ ′ ′ ′ ′
𝑆=𝑥 𝑦 𝑧+ 𝑥 𝑦 𝑧 + 𝑥 𝑦 𝑧 + 𝑥𝑦𝑧
Practice Problems
 Simplify following Boolean functions using 3 variable K-maps
4 Variable K-map
 The map for Boolean function with 4 variables.
 4 variable Boolean function has minterms.
 So the k-map will have 16 squares in format.
 Two variables (say AB) associated with rows and another two variables (say
CD) associated with the columns.
 Any square in the k-map is represented using 4 variables (say ABCD) in
primed or unprimed format.
 The map is considered to lie on a surface where the top and bottom edges,
as well as left and right edges are touching each other to form adjacent
squares.
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
AB
Group of one 1’s:
00
◦ 16 distinct groups are possible.
01
◦ Each term has all 4 literals.
11

10

′ ′
𝐹 = 𝐴 𝐵 𝐶 𝐷′
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
AB
Groups of two 1’s:
00
◦ Also known as Pair.
01
◦ 32 distinct groups are possible.
◦ Each term is with 3 literals. 1 1
10

′ ′ ′ ′ ′ ′ ′
𝐹= 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷= 𝐴 𝐵 𝐶
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
AB
Groups of two 1’s:
00
◦ Also known as Pair.
01
◦ 32 distinct groups are possible.
◦ Each term is with 3 literals. 1 1
10

′ ′ ′ ′ ′ ′
𝐹= 𝐴𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 = 𝐴 𝐶 𝐷 ′
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
AB
Groups of four 1’s:
00
◦ Also known as Quad.
01
◦ 14 distinct groups are possible.
◦ Each term is with 2 literals. 1 1
10

′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′
𝐹= 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷=𝐵 𝐶
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
AB
Groups of four 1’s:
00
◦ Also known as Quad.
01
◦ 14 distinct groups are possible.
◦ Each term is with 2 literals. 1 1
10

′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′ ′
𝐹= 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 + 𝐴 𝐵 𝐶 𝐷 =𝐵 𝐷 ′
4 Variable K-map
In 4 variable K-map CD 0 0 01 11 10
Groups of eight 1’s: AB
00
◦ Also known as Octet.
01
◦ 8 distinct groups are possible.
◦ Each term is with 1 literals. 11

10

AB’C’D+AB’CD+AB’CD’=A
4 Variable K-map
In 4 variable K-map CD 00 01 11 10
Groups of sixteen 1’s:AB
00
◦ 1 group is possible.
01
◦ The function equal to 1.
◦ No literals in F. 11

10
Redundancy in K-map
 A redundant group is a group, in which all
the elements in this group are covered by
some other groups. CD 0 0 01 11 10
AB
 Consider Quad at the center of the Map
00
which covers .
 The elements of Quad are already covered 01
by the pairs at each sides.
 11
So no need for the Quad in this example.
10
Example Problem-1
Obtain the simplified expression in sum of products for the following Boolean
Function:
 From the K-map, We can form 3 Pairs. CD
00 01 11 10
AB
 Therefore, the Simplified expression is 0 1 3 2
00
4 5 7 6
01 1

𝐹= 𝐴𝐵𝐷 + 𝐴𝐵𝐶+𝐵𝐶𝐷
12 13 15 14
11 1 1 1
8 9 11 10
10

𝑃1 𝑃3 𝑃2
Example Problem-2
Simplify the Boolean Function YZ 0 0 01 11 10
WX
0 1 3 2
00 1 1 0 1
4 5 7 6
 From the K-map, the simplification results
0 1in 1 1 0 1
1 Octet and 2 Quads. 12 13 15 14
11 1 1 0 1
 The Simplified expression is 8 9 11 10
10 1 1 0 0

𝑦′ 𝑥𝑧 ′ 𝑤′ 𝑧 ′
Example Problem-3 CD 0 0 01 11 10
Simplify the Boolean Function AB
0 1 3 2
00 1 1 0 1
.
4 5 7 6
01 0 0 0 1
 From the K-map, the simplification results in 12 13 15 14
11 0 0 0 0
2 Quads and 1 Pair.
8 9 11 10
 The Simplified expression is 10 1 1 0 1

′ ′ ′ ′ ′
𝐹 =𝐵 𝐶 + 𝐵 𝐷 + 𝐴 𝐶𝐷 ′
′ ′
𝐵 𝐷′ 𝐵 𝐶′
′ 𝐴 𝐶𝐷 ′
Example Problem-4
Write the Simplified Boolean Expression for the given Map.
 From the K-map, We can form
CD 0 0 01 11 10
2 Quads and 1Pair. AB
 The Simplified expression is 00 1 1 1

′ ′ ′ ′ 01 1 1 1
𝐹 = 𝐴 𝐶 + 𝐴 𝐷 + 𝐴𝐵𝐶
11 1 1

10
Practice Problems
Simplify the following Boolean functions, using 4-variable maps:
Prime Implicants
 A term in a function is also called as Implicant.
 Procedure for combining squares in the map made more systematic by
understanding prime implicant and essential prime implicant.
 A Prime Implicant (PI) is a product term obtained by combining the
maximum possible number of adjacent squares in the map (near by
minterms).
 If a minterm is covered by only one prime implicant, that PI is said to
be Essential Prime Implicant (EPI).
Prime Implicants
Consider the following 4-variable Boolean function

Find the simplified expression.

All of you try and find the solution CD 0 0 01 11 10


AB 0 1 3 2
00
4 5 7 6
01
12 13 15 14
11
8 9 11 10
10
Prime Implicants-Example
Consider the following 4-variable Boolean
CD 0 0 01 11 10
function
AB
0 1 3 2
00 1 1 1
 After mapping of the minterms, 4 5 7 6
examine the map carefully. 01 1 1
 The minterms forms a Quad and 12 13 15 14
11 1 1
minterms forms another Quad .
8 9 11 10
 The minterm can be covered only with 10 1 1 1 1
the and can be covered only with .
 Therefore, are considered as EPI.
Prime Implicants-Example
Consider the following 4-variable Boolean
CD 0 0 01 11 10
function
AB
0 1 3 2
00 1 1 1
 After the EPI’s, let us try to combine the 4 5 7 6
remaining minterms. 01 1 1
 One Possibility is two more Quads. 12 13 15 14
11 1 1
(OR)
8 9 11 10
10 1 1 1 1
Prime Implicants-Example
Consider the following 4-variable Boolean
CD 0 0 01 11 10
function
AB
0 1 3 2
00 1 1 1
 After the EPI’s, let us try to combine the 4 5 7 6
remaining minterms. 01 1 1
 One Possibility is two more Quads. 12 13 15 14
11 1 1
(OR) 8 9 11 10
10 1 1 1 1
Prime Implicants-Example
Consider the following 4-variable Boolean
CD 0 0 01 11 10
function
AB
0 1 3 2
00 1 1 1
 After the EPI’s, let us try to combine the 4 5 7 6
remaining minterms. 01 1 1
 One Possibility is two more Quads. 12 13 15 14
11 1 1
(OR) 8 9 11 10

(OR) 10 1 1 1 1
Prime Implicants-Example
Consider the following 4-variable Boolean
CD 0 0 01 11 10
function
AB
0 1 3 2
00 1 1 1
 After the EPI’s, let us try to combine the 4 5 7 6
remaining minterms. 01 1 1
 One Possibility is two more Quads. 12 13 15 14
11 1 1
(OR)
8 9 11 10
(OR) 10 1 1 1 1

(OR)
Prime Implicants-Example
Consider the following 4-variable Boolean function

For the given function


 There are 2 EPI and 2 PI.
 There are 4 different possible solutions. (All having 4 terms and each have 3
literals).
(OR) All four
(OR) expression
(OR) s are
correct!!!
Practice Problem
Find the minimum SoP form of the
following function using prime implicants
POS Simplification
 So far we have seen examples with SOP simplification.
 Similarly POS also can be obtained from the same K-map with
minor modification.
 The procedure to obtain POS instead of SOP is as follows:
1. Map the 1’s in the K-map.
2. The minterms not included in the standard SOP forms a function
which is complement of SOP. (groupings of 0’s F’ ).
3. The complement of the above expression gives F in POS form.
(Based on DeMorgan’s Theorem).
Example Problem-1
Obtain the simplified expression in (a) SOP form and (b) POS form for the
following Boolean Function:
 From the K-map, By grouping 1’s SOP can be obtained.
 Therefore, the Simplified SOP is CD 0 0 01 11 10
AB
0 1 3 2
′ ′ ′ ′ ′ ′
𝐹 =𝐵 𝐷 + 𝐵 𝐶 + 𝐴 𝐶 𝐷 00
4
1
5
1
7
0
6
1

01 0 1 0 0
12 13 15 14
11 0 0 0 0
8 9 11 10
10 1 1 0 1
Example Problem-1
 From the K-map, By grouping 0’s complement of POS can be obtained.

F’AB+CD+BD’
CD 0 0 01 11 10
 Therefore, the Simplified POS is AB
0 1 3 2
00 1 1 0 1
4 5 7 6
01 0 1 0 0
F
12 13 15 14
11 0 0 0 0
8 9 11 10
10 1 1 0 1
Example Problem-1
Consider the following Boolean expression
 Here function is given in terms of Maxterms.YZ 0 0 01 11 10
 Fill the maxterms in K-map using 0’s. X
0 1 3 2
0 0 1 1 0
 Fill the remaining squares with 1’s.
4 5 7 6
 From the K-map, grouping of 0’s gives F’1 1 0 0 1

YZ 0 0 01 11 10
The POS is X
𝐹 =( 𝑥+ 𝑧 ) (𝑥 ′ + 𝑧 ′ ) 0
0
0
1
1
3
1
2
0
 From the K-map, grouping of 1’s gives SOP 4 5 7 6

′ ′ 1 1 0 0 1
𝐹 =𝑥 𝑧 + 𝑥 𝑧
Practice Problems
Simplify the following functions to POS form
Don’t Care Conditions
 The logical sum of the minterms associated with a Boolean function
specifies the conditions under which the function is equal to 1.
 The function is equal to 0 for the rest of the minterms.
 This pair of conditions assumes that all the combinations of the
values for the variables of the function are valid.
 In practice, in some applications the function is not specified for
certain combinations of the variables.
 As an example, the four-bit binary code for the decimal digits has
six combinations that are not used and consequently are considered
to be unspecified.
 Functions that have unspecified outputs for some input
combinations are called incompletely specified functions
Don’t Care Conditions
 In most applications, we simply don’t care what value is assumed by
the function for the unspecified minterms.
 For this reason, it is customary to call the unspecified minterms of a
function don’t-care conditions.
 These don’t-care conditions can be used on a map to provide further
simplification of the Boolean expression.
 A don’t-care minterm is a combination of variables whose logical
value is not specified.
 To distinguish the don’t-care condition from 1’s and 0’s, an X is used.
 When simplifying the function, we can choose to include each don’t-
care minterm with either the 1’s or the 0’s, depending on which
combination gives the simplest expression.
Example-1
YZ 00 01 11 10
WX
Simplify the Boolean function which has 0 1 3 2

the don’t-care conditions . 00 X 1 1 X


4 5 7 6
From the k-map, the SOP solution is 01 0 X 1 0
12 13 15 14
11 0 0 1 0
′ ′
𝐹 =𝑤 𝑥 + 𝑦𝑧
8 9 11 10
10 0 0 1 0
Example-1
YZ 00 01 11 10
WX
Simplify the Boolean function which has the 0 1 3 2
00 X 1 1 X
don’t-care conditions .
4 5 7 6
From the k-map, the SOP solution is 01 0 X 1 0
(Another possible solution) 12 13 15 14
11 0 0 1 0
8 9 11 10

′ 10 0 0 1 0
𝐹 =𝑤 𝑧 + 𝑦𝑧
Example-1
YZ 00 01 11 10
WX
Simplify the Boolean function which has 0 1 3 2

the don’t-care conditions . 00 X 1 1 X


4 5 7 6
It is also possible to get POS from the map 01 0 X 1 0
12 13 15 14
11 0 0 1 0
Therefore, the POS expression is
8 9 11 10
10 0 0 1 0

)
Example-1
YZ 00 01 11 10
WX
Simplify the Boolean function . 0 1 3 2
00 X 1 1 X
From the k-map, the simplified expression is
4 5 7 6
01
12 13 15 14

′ ′ ′ 11 X
𝐹 =𝑤 𝑥 + 𝑥 𝑧 ′ 8 9 11 10
10 X 1
Practice Problems
Simplify the following Boolean function F, together with don’t-care conditions
d, and then express the simplified function in sum-of-minterms form:
1. and
2. and
3. and d
Digital Logic Families
 Diode Logic
 Diode Transistor Logic (DTL)
 Resistor Transistor Logic (RTL)
 Transistor Transistor Logic (TTL)
 MOS logic
 CMOS Logic
RTL Logic
Alllogic implemented using
resistor and transistor
NOT gate
RTL NOR gate

 Power dissipation of the RTL gate is about 12 mW


 Propagation delay averages 25 ns
 Noise margin for low signal input is 0.6 - 0.2 = 0.4 V
DTL NAND Gate
 Diodes and the 5-kΩ resistor form an AND gate
 The transistor serves as a current amplifier while
inverting the digital signal
 Voltage levels : 0.2 V low level ;
 4 - 5 V high level
 If any one of the i/p low Vp= 0.9 V (0.2+0.7); Q1 OFF; Y
= 5V
 If all the i/ps are high Vp = 2.1 V (3 x 0.7 V); Q1 ON;
Y=VCE = 0.2V Power dissipation is about 12
mW
Propagation delay averages
30 ns
Noise margin is about I V
Fan-out as high as 8 is
Transistor Transistor Logic (TTL)
 Slight improvement over the DTL gate
 Most widely used family in the design of digital systems
 Commercial TTL lCs have a number designation that
starts with 74 and follows with a suffix that identifies the
series type
 The speed-power product (Product of the propagation
delay and power dissipation) is an important parameter
for comparing the various TTL series. Measured in
picojoules (pJ)
TTL Output Configurations
 Open-collector output
 Totem-pole output
 Three-state (or tristate) output
Open Collector Output NAND Gate
 Modified circuit of DTL gate
 Multiple emitters in transistor Q1 behave like the
input diodes in the DTL gate forming a pn junction
with their common base
 The base-col1ector junction of Q1 acts as another
pn junction diode corresponding to D1 in the DTL
gate
2 input NAND
Open Collector Output Gate
 Transistor Q2 replaces the second diode, D2 in the DTL
gate
 A resistor connected to VCC must be inserted external to
the IC package for the output to "pull up" to the high
voltage level when Q3 is off
 Otherwise, the output acts as an open circuit
 Voltage levels : 0.2 V low level ;2.4 - 5 V high level
 If any input is low, the corresponding base-emitter
junction in Q1 is forward biased
 The voltage at the base of Q1 is equal to 0.9 V (the input
voltage of 0.2 V plus a VBE drop of 0.7 )
 In order for Q3 to start conducting, the path from Q1 to Q3
must overcome a potential of one diode drop in the
Open Collector Output Gate
 The output level will be high if an external resistor is
connected between the output and VCC
 If all the i/ps are high the base-emitter junctions of Q1
are all reverse biased
 VB = 2.1 V (3 x 0.7 V); Q3 ON; Y=VCE = 0.2V
TTL AND Gate
TTL NOR-OR Gate
CMOS LOGIC - inverter

in out
vdd
p1

in out
in p1 n1 out
n1
0 ON OFF 1

1 OFF ON 0
vss

88
CMOS LOGIC - NAND

vdd

a p1 p2 b a b p1 p2 n1 n2 out
0 0 ON ON OFF OFF 1
out
0 1 ON OFF OFF ON 1
a n1
1 0 OFF ON ON OFF 1
c
b n2 1 1 OFF OFF ON ON 0

vss
89
CMOS LOGIC - NOR

vdd
a p1
a b p1 p2 n1 n2 out
0 0 ON ON OFF OFF 1
b p2
0 1 ON OFF OFF ON 0
out
1 0 OFF ON ON OFF 0
a n1 n2 b
1 1 OFF OFF ON ON 0

vss

90
CMOS LOGIC - AND

91
4 INPUT CMOS NOR

A
B
C
D
Y

92

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