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ISPD 2016: Santa Rosa, CA, USA
- Evangeline F. Y. Young, Mustafa Ozdal:
Proceedings of the 2016 on International Symposium on Physical Design, ISPD 2016, Santa Rosa, CA, USA, April 3-6, 2016. ACM 2016, ISBN 978-1-4503-4039-7
Welcome and Keynote Address
- Kevin Zhang:
Circuit Design in Nano-Scale CMOS Technologies. 1
3D Circuits
- Johann Knechtel, Jens Lienig:
Physical Design Automation for 3D Chip Stacks: Challenges and Solutions. 3-10 - Jingwei Lu, Hao Zhuang, Ilgweon Kang, Pengwen Chen
, Chung-Kuan Cheng:
ePlace-3D: Electrostatics based Placement for 3D-ICs. 11-18 - Hantao Huang, Hao Yu, Cheng Zhuo, Fengbo Ren
:
A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bond Testing Data. 19-25 - Anja von Beuningen, Ulf Schlichtmann
:
PLATON: A Force-Directed Placement Algorithm for 3D Optical Networks-on-Chip. 27-34
Monday Lunch
- Patrick R. Groeneveld:
Optimizing for Power, Speed, Cost and Emissions in Automotive Drivetrains. 35
Directed Self Assembly
- Karl K. Berggren, Caroline A. Ross, Hyung Wan Do, Jae-Byum Chang, Hong Kyoon Choi:
Cell-Based Design Methods for Directed Self-Assembly. 37 - Jiaojiao Ou, Bei Yu, David Z. Pan:
Concurrent Guiding Template Assignment and Redundant via Insertion for DSA-MP Hybrid Lithography. 39-46 - Zhi-Wen Lin, Yao-Wen Chang
:
Double-Patterning Aware DSA Template Guided Cut Redistribution for Advanced 1-D Gridded Designs. 47-54
Special Session
- Victor Moroz:
Technology Inflection Points. 55 - Raymond X. Nijssen:
Challenges and Opportunities with Place and Route of Modern FPGA Designs. 57 - Filipp Akopyan:
Design and Tool Flow of IBM's TrueNorth: an Ultra-Low Power Programmable Neurosynaptic Chip with 1 Million Neurons. 59-60
Tuesday Keynote Address
- Antun Domic:
Some Observations on the Physical Design of the Next Decade. 61
Timing and Clock Optimization
- Greg Ford:
A Designer's Perspective on Timing Closure. 63 - Tiago J. Reimann, Cliff C. N. Sze, Ricardo Reis
:
Cell Selection for High-Performance Designs in an Industrial Design Flow. 65-72 - Guilherme Flach, Mateus Fogaça
, Jucemar Monteiro, Marcelo O. Johann, Ricardo Augusto da Luz Reis
:
Drive Strength Aware Cell Movement Techniques for Timing Driven Placement. 73-80 - Rickard Ewetz, Chuan Yean Tan, Cheng-Kok Koh:
Construction of Latency-Bounded Clock Trees. 81-88
PD for Reliability and Adaptability
- Julien Ryckaert:
Scaling Beyond 7nm: Design-Technology Co-optimization at the Rescue. 89 - Ang Lu, Hao He, Jiang Hu:
Proximity Optimization for Adaptive Circuit Design. 91-97 - Steve Bigalke, Jens Lienig:
Load-Aware Redundant Via Insertion for Electromigration Avoidance. 99-106
Commemoration for Prof. Ralph Otten
- Martin D. F. Wong
:
Early Days of Automatic Floorplan Design. 107 - Lukas P. P. P. van Ginneken:
The Annealing Algorithm revisted. 109-111 - Patrick R. Groeneveld:
Trailblazing Physical Design Flows: Ralph Otten's Impact on Design Automation. 113 - Ralph Otten:
Complexity and Diversity in IC Layout Design. 115
FPGA Physical Design
- Sabya Das, Rajat Aggarwal, Zhiyong Wang:
An Interactive Physical Synthesis Methodology for High-Frequency FPGA Designs. 117-122 - Safeen Huda, Jason Helge Anderson:
Power Optimization of FPGA Interconnect Via Circuit and CAD Techniques. 123-130 - Guojie Luo, Wentai Zhang
, Jiaxi Zhang, Jason Cong:
Scaling Up Physical Design: Challenges and Opportunities. 131-137 - Stephen Yang, Aman Gayasen, Chandra Mulpuri, Sainath Reddy, Rajat Aggarwal:
Routability-Driven FPGA Placement Contest. 139-143
Statistical and Machine Learning-Based CAD
- Wen-Hsiang Chang, Li-De Chen, Chien-Hsueh Lin, Szu-Pang Mu, Mango Chia-Tso Chao, Cheng-Hong Tsai, Yen-Chih Chiu:
Generating Routing-Driven Power Distribution Networks with Machine-Learning Technique. 145-152 - Wei Wu, Srinivas Bodapati, Lei He:
Hyperspherical Clustering and Sampling for Rare Event Analysis with Multiple Failure Region Coverage. 153-160 - Xiaoqing Xu, Tetsuaki Matsunawa, Shigeki Nojima, Chikaaki Kodama
, Toshiya Kotani, David Z. Pan:
A Machine Learning Based Framework for Sub-Resolution Assist Feature Generation. 161-168

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