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ORCIDSIGARCH Computer Architecture News, Volume 43
Volume 43, Number 1, March 2014
- Özcan Özturk, Kemal Ebcioglu, Sandhya Dwarkadas:
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2015, Istanbul, Turkey, March 14-18, 2015. ACM 2015, ISBN 978-1-4503-2835-7 [contents]
Volume 43, Number 3, May 2015
- Andrew A. Chien, Tung Thanh Hoang, Dilip P. Vasudevan, Yuanwei Fang, Amirali Shambayati:
10x10: A Case Study in Highly-Programmable and Energy-Efficient Heterogeneous Federated Architecture. 2-9
- Mark Thorson:
Internet Nuggets. 10-16
Volume 43, Number 3, June 2015
- Deborah T. Marr, David H. Albonesi:
Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015. ACM 2015, ISBN 978-1-4503-3402-0 [contents]
Volume 43, Number 4, September 2015
Special Issue: HEART '15
- Chiharu Tsuruta, Yohei Miki
, Takuya Kuhara, Hideharu Amano, Masayuki Umemura:
Off-Loading LET Generation to PEACH2: A Switching Hub for High Performance GPU Clusters. 3-8 - Koji Okina, Rie Soejima, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri:
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization. 9-14 - Ahmad Lashgar, Ebad Salehi, Amirali Baniasadi:
A Case Study in Reverse Engineering GPGPUs: Outstanding Memory Handling Resources. 15-21 - Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani:
A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface. 22-27 - Abhishek Kumar Jain, Xiangwei Li, Suhaib A. Fahmy, Douglas L. Maskell:
Adapting the DySER Architecture with DSP Blocks as an Overlay for the Xilinx Zynq. 28-33 - David de la Chevallerie, Jens Korinth, Andreas Koch:
ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators. 34-39 - Soukaina N. Hmid, José Gabriel F. Coutinho, Wayne Luk:
A Transfer-Aware Runtime System for Heterogeneous Asynchronous Parallel Execution. 40-45 - Ahmed Al-Wattar, Shawki Areibi, Gary William Grewal:
Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework. 46-51 - Amir Momeni, Hamed Tabkhi, Yash Ukidave, Gunar Schirner, David R. Kaeli:
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA. 52-57 - Takuji Mitsuishi, Jun Suzuki, Yuki Hayashi, Masaki Kan, Hideharu Amano:
Breadth First Search on Cost-efficient Multi-GPU Systems. 58-63 - Michael Mefenza, Nicolas Edwards, Christophe Bobda:
Interface Based Memory Synthesis of Image Processing Applications in FPGA. 64-69 - Da Tong, Viktor K. Prasanna:
High Throughput Sketch Based Online Heavy Hitter Detection on FPGA. 70-75 - Xinying Wang, Phillip H. Jones, Joseph Zambreno:
A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns. 76-81 - Kentaro Sano, Fumiya Kono, Naohito Nakasato, Alexander Vazhenin, Stanislav Sedukhin:
Stream Computation of Shallow Water Equation Solver for FPGA-based 1D Tsunami Simulation. 82-87 - Liucheng Guo, Andreea-Ingrid Funie, David B. Thomas, Haohuan Fu, Wayne Luk:
Parallel Genetic Algorithms on Multiple FPGAs. 86-93
- Mark Thorson:
Internet Nuggets. 94-100
Volume 43, Number 5, December 2015
- Mark Thorson:
Internet Nuggets. 7-11
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