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ORCIDBryan D. Ackland
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2000 – 2009
- 2005
[c19]Dawn Fitzgerald, Bryan D. Ackland:
Signal and data processors. CICC 2005: 676-677- [c18]Bryan D. Ackland, Behzad Razavi, Larry West:
A comparison of electrical and optical clock networks in nanometer technologies. CICC 2005: 779-782 - 2002
- [c17]Joseph Williams, Nevin Heintze, Bryan D. Ackland:
Communication Mechanisms for Parallel DSP Systems on a Chip. DATE 2002: 420-422 - 2000
- [j5]Bryan D. Ackland, A. Anesko, D. Brinthaupt, S. J. Daubert, Asawaree Kalavade, J. Knobloch, E. Micca, M. Moturi, Chris J. Nicol, Jay H. O'Neill, Joe Othmer, Eduard Sackinger, Kanwar Jit Singh, J. Sweet, C. J. Terman, Joseph Williams:
A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP. IEEE J. Solid State Circuits 35(3): 412-424 (2000)
1990 – 1999
- 1999
- [c16]Bryan D. Ackland, A. Anesko, D. Brinthaupt, S. J. Daubert, Asawaree Kalavade, J. Knobloch, E. Micca, M. Moturi, Chris J. Nicol, Jay H. O'Neill, Joe Othmer, Eduard Sackinger, Kanwar Jit Singh, J. Sweet, C. J. Terman, Joseph Williams:
A single-chip 1.6 billion 16-b MAC/s multiprocessor DSP. CICC 1999: 537-540 - [c15]Asawaree Kalavade, Joe Othmer, Bryan D. Ackland, Kanwar Jit Singh:
Software Environment for a Multiprocessor DSP. DAC 1999: 827-830 - 1998
- [j4]Marc J. Loinaz, Kanwar Jit Singh, Andrew J. Blanksby, David A. Inglis, Kamran Azadet, Bryan D. Ackland:
A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s. IEEE J. Solid State Circuits 33(12): 2092-2103 (1998) - [c14]Bryan D. Ackland, Chris Nicol:
High performance DSPs - what's hot and what's not? ISLPED 1998: 1-6 - 1996
- [c13]P. A. Subrahmanyam, Bryan D. Ackland:
Design technologies for embedded multimedia systems. IFIP World Conference on IT Tools 1996: 265-274 - 1995
- [j3]Nikil Jayant, Bryan D. Ackland, Victor B. Lawrence, Lawrence R. Rabiner:
Multimedia: Technology dimensions and challenges. AT&T Tech. J. 74(5): 14-33 (1995) - [c12]Alex G. Dickinson, Bryan D. Ackland, El-Sayed Eid, David A. Inglis, Eric R. Fossum:
Standard CMOS active pixel image sensors for multimedia applications. ARVLSI 1995: 214-224 - 1994
- [c11]Meng-Lin Yu, Bryan D. Ackland:
VLSI timing simulation with selective dynamic regionization. Annual Simulation Symposium 1994: 208-216 - [c10]Meng-Lin Yu, Bryan D. Ackland:
VLSI timing simulation with selective dynamic regionization. ICCAD 1994: 195-199 - 1990
- [c9]Sailesh K. Rao, Mehdi Hatamian, Bryan D. Ackland:
A design environment for high performance VLSI signal processing. ICCD 1990: 147-152
1980 – 1989
- 1989
- [c8]Bryan D. Ackland, Robert A. Clark:
Event-EMU: an event driven timing simulator for MOS VLSI circuits. ICCAD 1989: 80-83 - [c7]Bryan D. Ackland:
Experiences with Advanced Design Automation Tools. IFIP Congress 1989: 532 - 1986
- [c6]Hiroyuki Watanabe, Bryan D. Ackland:
Flute - a floorplanning agent for full custom VLSI design. DAC 1986: 601-607 - 1983
- [j2]Neil Weste, David J. Burr, Bryan D. Ackland:
Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing Array. IEEE Trans. Computers 32(8): 731-744 (1983) - 1981
- [j1]Bryan D. Ackland, Neil Weste:
The Edge Flag Algorithm - A Fill Method for Raster Scan Displays. IEEE Trans. Computers 30(1): 41-48 (1981) - [c5]David J. Burr, Bryan D. Ackland, Neil Weste:
A high speed array computer for dynamic time warping. ICASSP 1981: 471-474 - [c4]Bryan D. Ackland, Neil Weste, David J. Burr:
An Integrated Multiprocessing Array for Time Warp Pattern Matching. ISCA 1981: 197-216 - 1980
- [c3]Neil Weste, Bryan D. Ackland:
An IC design station needs a high performance color graphic display. DAC 1980: 285-291 - [c2]Bryan D. Ackland, Neil Weste:
Real time animation playback on a frame store display system. SIGGRAPH 1980: 182-188
1970 – 1979
- 1979
- [c1]Bryan D. Ackland:
A Bit-Slice Cache Controller. ISCA 1979: 75-82
Coauthor Index
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