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Andreas Wiesbauer
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2020 – today
- 2024
- [j14]Niccolò de Milleri, Luca Valli, Marc Fueldner, Andreas Wiesbauer, Andrea Baschirotto:
A 22-dBA Digital Optical MEMS Microphone. IEEE J. Solid State Circuits 59(7): 2005-2018 (2024) - [c25]Jose Luis Ceballos, Fulvio Ciciotti, Christopher Rogi, Alessandro Caspani, Luca Sant, Dietmar Straeussnigg, Andreas Wiesbauer, Simon Gruenberger, Chin Yeong Koh, Chern Sia Phillip Lim:
A 70dBA-460μW Companding Digital Silicon Microphone with Programmable Acoustic Overload Point and MEMS Asymmetry Robustness. ISCAS 2024: 1-5 - 2023
- [j13]Rubén Garvi, Javier Granizo, Eric Gutierrez, Victor Medina, Andreas Wiesbauer, Luis Hernández:
A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 1841-1845 (2023) - [c24]Niccolò de Milleri, Andreas Wiesbauer, Andrea Baschirotto:
A 22dBA digital optical MEMS microphone. ESSCIRC 2023: 485-488 - 2022
- [j12]Pablo Vera, Andreas Wiesbauer, Susana Patón:
An Analysis of Noise in Multi-Bit ΣΔ Modulators with Low-Frequency Input Signals. Sensors 22(19): 7458 (2022) - [c23]Jose Luis Ceballos, Christopher Rogi, Fulvio Ciciotti, Cesare Buffa, Dietmar Straeussnigg, Andreas Wiesbauer:
A 69dBA-730µW Silicon Microphone System with Ultra & Infra-Sound Robustness. ESSCIRC 2022: 409-412 - [c22]Niccolò de Milleri, Güclü Onaran, Andreas Wiesbauer, Andrea Baschirotto:
MEMS optical microphone based on light phase modulation. ESSDERC 2022: 289-292 - 2021
- [j11]Carlos Perez, Andrés Quintero, Pedro Amaral, Andreas Wiesbauer, Luis Hernández:
A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(10): 3194-3198 (2021)
2010 – 2019
- 2019
- [j10]Andrés Quintero, Fernando Cardes, Carlos Perez, Cesare Buffa, Andreas Wiesbauer, Luis Hernández:
A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones. Sensors 19(19): 4126 (2019) - 2018
- [j9]Fernando Cardes, Eric Gutierrez, Andrés Quintero, Cesare Buffa, Andreas Wiesbauer, Luis Hernández:
0.04-mm2 103-dB-A Dynamic Range Second-Order VCO-Based Audio ΣΔ ADC in 0.13-µm CMOS. IEEE J. Solid State Circuits 53(6): 1731-1742 (2018) - [j8]Fernando Cardes, Andrés Quintero, Eric Gutierrez, Cesare Buffa, Andreas Wiesbauer, Luis Hernández:
SNDR Limits of Oscillator-Based Sensor Readout Circuits. Sensors 18(2): 445 (2018) - 2017
- [c21]Elmar Bach, Richard Gaggl, Luca Sant, Cesare Buffa, Snezana Stojanovic, Dietmar Straeussnigg, Andreas Wiesbauer:
9.5 A 1.8V true-differential 140dB SPL full-scale standard CMOS MEMS digital microphone exhibiting 67dB SNR. ISSCC 2017: 166-167 - 2016
- [c20]Laura Conesa-Peraleja, Susana Patón, Dietmar Straeussnigg, Andreas Wiesbauer:
Signal boosting to extend the bandwidth of oversampled converters. ICECS 2016: 600-603 - 2015
- [c19]Fernando Cardes, Ruzica Jevtic, Luis Hernández, Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl:
A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator. ISCAS 2015: 2233-2236 - 2014
- [c18]Fernando Cardes, Luis Hernández, Javier Escobar, Andreas Wiesbauer, Dietmar Straeussnigg, Richard Gaggl:
A time-encoding CMOS capacitive sensor readout circuit with flicker noise reduction. MWSCAS 2014: 390-393 - 2010
- [j7]Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer:
A/D Conversion Using Asynchronous Delta-Sigma Modulation and Time-to-Digital Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2404-2412 (2010) - [c17]Enrique Prefasi, Susana Patón, Luis Hernández, Richard Gaggl, Andreas Wiesbauer, Joerg Hauptmann:
A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS. ESSCIRC 2010: 430-433 - [c16]Luis Hernández, Andreas Wiesbauer:
Exploiting time resolution in nanometre CMOS data converters. ISCAS 2010: 1069-1072
2000 – 2009
- 2009
- [j6]Enrique Prefasi, Luis Hernández, Susana Patón, Andreas Wiesbauer, Richard Gaggl, Ernesto Pun:
A 0.1 mm2, Wide Bandwidth Continuous-Time ΔΣ ADC Based on a Time Encoding Quantizer in 0.13 µm CMOS. IEEE J. Solid State Circuits 44(10): 2745-2754 (2009) - [c15]Franz Dielacher, Christian Vogel, Peter Singerl, Stefan Mendel, Andreas Wiesbauer:
A holistic design approach for systems on chip. SoCC 2009: 301-306 - 2008
- [c14]Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer:
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. ISCAS 2008: 1648-1651 - 2006
- [j5]Christoph Sandner, Sven Derksen, Dieter Draxelmayr, Staffan Ek, Voicu Filimon, Graham Leach, Stefano Marsili, Denis Matveev, Koen L. R. Mertens, Florian Michl, Hermann Paule, Manfred Punzenberger, Christian Reindl, Raffaele Salerno, Marc Tiebout, Andreas Wiesbauer, Ian Winter, Zisan Zhang:
A WiMedia/MBOA-Compliant CMOS RF Transceiver for UWB. IEEE J. Solid State Circuits 41(12): 2787-2794 (2006) - [c13]Susana Patón, Manuel Sanchez-Renedo, Luis Hernández, Enrique Prefasi, Andreas Wiesbauer, Antonio Di Giandomenico, David San Segundo:
Design of Cascaded Continuous-Time Sigma-Delta Modulators. ICECS 2006: 50-53 - [c12]Luis Hernández, Susana Patón, Andreas Wiesbauer:
Spectral shaping of clock jitter errors for continuous time sigma-delta modulators. ISCAS 2006 - [c11]Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl, Martin Clara, Luis Hernández, Daniel Gruber:
Clock jitter compensation for current steering DACs. ISCAS 2006 - [c10]Christoph Sandner, Sven Derksen, Dieter Draxelmayr, Staffan Ek, Voicu Filimon, Graham Leach, Stefano Marsili, Denis Matveev, Koen L. R. Mertens, Florian Michl, Hermann Paule, Manfred Punzenberger, Christian Reindl, Raffaele Salerno, Marc Tiebout, Andreas Wiesbauer, Ian Winter, Zisan Zhang:
A WiMedia/MBOA-Compliant CMOS RF Transceiver for UWB. ISSCC 2006: 408-417 - 2004
- [j4]Susana Patón, Antonio Di Giandomenico, Luis Hernández, Andreas Wiesbauer, Thomas Pötscher, Martin Clara:
A 70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution. IEEE J. Solid State Circuits 39(7): 1056-1063 (2004) - [c9]Susana Patón, Thomas Pötscher, Antonio Di Giandomenico, Klaus Kolhaupt, Luis Hernández, Andreas Wiesbauer, Martin Clara, Ramon Frutos:
Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators. CICC 2004: 527-530 - [c8]Christian Grewing, Martin Friedrich, Giuseppe Li Puma, Christoph Sandner, Stefan van Waasen, Andreas Wiesbauer, Kay Winterberg:
Fully integrated ultra wide band CMOS low noise amplifier. ESSCIRC 2004: 435-438 - [c7]Martin Clara, Andreas Wiesbauer, Wolfgang Klatzer:
Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors. ISCAS (1) 2004: 285-288 - [c6]Luis Hernández, Andreas Wiesbauer, Susana Patón, Antonio Di Giandomenico:
Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction. ISCAS (1) 2004: 1072-1075 - 2003
- [j3]Richard Gaggl, Andreas Wiesbauer, Gerhard Fritz, Christian Schranz, Peter Pessl:
A 85-dB dynamic range multibit delta-sigma ADC for ADSL-CO applications in 0.18-μm CMOS. IEEE J. Solid State Circuits 38(7): 1105-1114 (2003) - [c5]Antonio Di Giandomenico, Susana Patón, Andreas Wiesbauer, Luis Hernández, Thomas Pötscher, Lukas Dörrer:
A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13μm CMOS. ESSCIRC 2003: 233-236 - [c4]Lukas Dörrer, Franz Kuttner, Andreas Wiesbauer, Antonio Di Giandomenico, Thomas Hartig:
10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process. ESSCIRC 2003: 245-248 - [c3]Lukas Dörrer, Antonio Di Giandomenico, Andreas Wiesbauer:
A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12µm CMOS process. ISCAS (1) 2003: 1057-1060 - 2002
- [j2]Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann, Thomas Ferianz, Michael Staber, Dietmar Sträußnigg, Berthold Seger:
An ADSL-RT full-rate analog front end IC with integrated line driver. IEEE J. Solid State Circuits 37(7): 857-865 (2002) - [j1]Andreas Wiesbauer, Martin Clara, Moritz Harteneck, Thomas Pötscher, Berthold Seger, Christoph Sandner, Christian Fleischhacker:
A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS. IEEE J. Solid State Circuits 37(7): 866-873 (2002) - [c2]Martin Clara, Andreas Wiesbauer, Franz Kuttner:
A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS. CICC 2002: 437-440 - 2001
- [c1]Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann:
A 800 mW, full-rate ADSL-RT analog frontend IC with integrated line driver. CICC 2001: 115-118
Coauthor Index
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last updated on 2024-10-07 21:25 CEST by the dblp team
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