default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMichiel Steyaert
Michiel S. J. Steyaert – Michel S. J. Steyaert
Person information
- affiliation: Catholic University of Leuven, Belgium
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2023
[b2]Athanasios T. Ramkaj, Marcel J. M. Pelgrom, Michiel S. J. Steyaert
, Filip Tavernier:
Multi-Gigahertz Nyquist Analog-to-Digital Converters - Architecture and Circuit Innovations in Deep-Scaled CMOS and FinFET Technologies, 3. Springer 2023, ISBN 978-3-031-22708-0, pp. 1-256- 2022
- [j97]Athanasios T. Ramkaj, Marcel J. M. Pelgrom, Michiel S. J. Steyaert, Filip Tavernier:
A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With <27 ps / 1 V and <70 ps / 0.6 V Delay at 5 mV-Sensitivity. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4404-4414 (2022) - [c144]Athanasios Ramkaj, Adalberto Cantoni, Gabriele Manganaro, Siddharth Devarajan, Michiel Steyaert, Filip Tavernier:
A 30GHz-BW < -57dB-IM3 Direct RF Receiver Analog Front End in 16nm FinFET. VLSI Technology and Circuits 2022: 100-101 - 2020
- [j96]Athanasios T. Ramkaj, Juan Carlos Pena Ramos, Marcel J. M. Pelgrom, Michiel S. J. Steyaert, Marian Verhelst, Filip Tavernier:
A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS. IEEE J. Solid State Circuits 55(6): 1553-1564 (2020) - [j95]Wouter Diels, Michiel Steyaert, Filip Tavernier:
1310/1550 nm Optical Receivers With Schottky Photodiode in Bulk CMOS. IEEE J. Solid State Circuits 55(7): 1776-1784 (2020) - [j94]Elly De Pelecijn, Michiel S. J. Steyaert:
Stacking Isolated SC Cores for High-Voltage Wide Input Range Monolithic DC-DC Conversion. IEEE J. Solid State Circuits 55(10): 2639-2648 (2020)
2010 – 2019
- 2019
- [j93]Nicolas Butzen, Michiel Steyaert:
Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC-DC Converters. IEEE J. Solid State Circuits 54(4): 1039-1047 (2019) - [j92]Elly De Pelecijn, Michiel S. J. Steyaert:
A Fully Integrated Switched-Capacitor-Based AC-DC Converter for a 120 VRMS Mains Interface. IEEE J. Solid State Circuits 54(7): 2009-2018 (2019) - [j91]Filipe D. Baumgratz, Carlos E. Saavedra, Michiel Steyaert, Filip Tavernier, Sergio Bampi:
A Wideband Low-Noise Variable-Gain Amplifier With a 3.4 dB NF and up to 45 dB Gain Tuning Range in 130-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1104-1108 (2019) - [c143]Elly De Pelecijn, Michiel Steyaert:
A 7.5 - 42V Input High-VCR Monolithic DC-DC Converter Using Stacked Isolated SC Cores. A-SSCC 2019: 247-250 - [c142]Nicolas Butzen, Michiel Steyaert:
Advanced Multiphasing: Pushing the Envelope of Fully Integrated Power Conversion. CICC 2019: 1-8 - [c141]Wouter Diels, Michiel Steyaert, Filip Tavernier:
Optical Receiver with Schottky Photodiode and TIA with High Gain Amplifier in 28nm Bulk CMOS. ESSCIRC 2019: 149-152 - [c140]Athanasios T. Ramkaj, Michiel S. J. Steyaert, Filip Tavernier:
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK-OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS. ESSCIRC 2019: 167-170 - [c139]Athanasios Ramkaj, Juan Carlos Pena Ramos, Yifan Lyu, Maarten Strackx, Marcel J. M. Pelgrom, Michiel Steyaert, Marian Verhelst, Filip Tavernier:
A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS. ISSCC 2019: 62-64 - [c138]Tuur Van Daele, Elly De Pelecijn, Tim Thielemans, Michiel Steyaert, Filip Tavernier:
A Fully-Integrated 6: 1 Cascaded Switched-Capacitor DC-DC Converter Achieving 74% Efficiency at 0.1W/mm2. PRIME 2019: 49-52 - 2018
- [j90]Athanasios Ramkaj, Maarten Strackx, Michiel S. J. Steyaert, Filip Tavernier:
A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS. IEEE J. Solid State Circuits 53(7): 1889-1901 (2018) - [j89]Filipe D. Baumgratz, Sandro Binsfeld Ferreira, Michiel S. J. Steyaert, Sergio Bampi, Filip Tavernier:
40-nm CMOS Wideband High-IF Receiver Using a Modified Charge-Sharing Bandpass Filter to Boost Q-Factor. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(8): 2581-2591 (2018) - [c137]Tim Thielemans, Nicolas Butzen, Athanasios Sarafianos, Michiel Steyaert, Filip Tavernier:
A capacitive DC-DC converter for stacked loads with wide range DVS achieving 98.2% peak efficiency in 40nm CMOS. CICC 2018: 1-4 - [c136]Elly De Pelecijn, Michiel Steyaert:
A Fully Integrated Switched-Capacitor Based AC-DC Converter for a 120VRMS Mains Interface. ESSCIRC 2018: 46-49 - [c135]Wouter Diels, Michiel Steyaert, Filip Tavernier:
A 1310/1550 nm Fully-Integrated Optical Receiver with Schottky Photodiode and Low-Noise Transimpedance Amplifier in 40 nm Bulk CMOS. ESSCIRC 2018: 242-245 - [c134]Filipe D. Baumgratz, Sandro B. Ferreira, Michiel Steyaert, Sergio Bampi, Filip Tavernier:
A Charge-Sharing Bandpass Filter Topology with Boosted Q-Factor in 40-NM CMOS. SBCCI 2018: 1-6 - [c133]Nicolas Butzen, Michiel Steyaert:
A Single-Topology Continuously-Scalable-Conversion-Ratio Fully Integrated Switched-Capacitor DC-DC Converter with 0-to-2.22V Output and 93% Peak-Efficiency. VLSI Circuits 2018: 103-104 - 2017
- [j88]Nicolas Butzen, Michiel S. J. Steyaert:
MIMO Switched-Capacitor DC-DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution. IEEE J. Solid State Circuits 52(7): 1814-1824 (2017) - [j87]Nicolas Butzen, Michel S. J. Steyaert:
Design of Soft-Charging Switched-Capacitor DC-DC Converters Using Stage Outphasing and Multiphase Soft-Charging. IEEE J. Solid State Circuits 52(12): 3132-3141 (2017) - [c132]Michiel Steyaert, Athanasios Sarafianos, Nicolas Butzen, Elly De Pelecijn:
Fully integrated power management: The missing link? ECCTD 2017: 1-4 - [c131]Saurabh Agarwal, Mark Ingels, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout:
Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMA. ESSCIRC 2017: 111-114 - [c130]Athanasios Ramkaj, Maarten Strackx, Michiel Steyaert, Filip Tavernier:
A 36.4dB SNDR @ 5GHz 1.25GS/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOS. ESSCIRC 2017: 167-170 - [c129]Wouter Diels, Michiel Steyaert, Filip Tavernier:
Modelling, design and characterization of Schottky diodes in 28nm bulk CMOS for 850/1310/1550nm fully integrated optical receivers. ESSDERC 2017: 224-227 - [c128]Nicolas Butzen, Michiel Steyaert:
10.1 A 1.1W/mm2-power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging. ISSCC 2017: 178-179 - [c127]Wouter Diels, Michiel Steyaert, Filip Tavernier:
Schottky diodes in 40nm bulk CMOS for 1310nm high-speed optical receivers. OFC 2017: 1-3 - 2016
- [j86]Saurabh Agarwal, Mark Ingels, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout:
Wavelength Locking of a Si Ring Modulator Using an Integrated Drop-Port OMA Monitoring Circuit. IEEE J. Solid State Circuits 51(10): 2328-2344 (2016) - [j85]Nicolas Butzen, Michiel S. J. Steyaert:
Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits 51(12): 2843-2853 (2016) - [j84]Jeffrey Prinzie, Michiel Steyaert, Paul Leroux:
A Self-Calibrated Bang-Bang Phase Detector for Low-Offset Time Signal Processing. IEEE Trans. Circuits Syst. II Express Briefs 63-II(5): 453-457 (2016) - [c126]Jeffrey Prinzie, Michiel Steyaert, Paul Leroux, Jorgen Christiansen, Paulo Moreira:
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS. A-SSCC 2016: 285-288 - [c125]Nicolas Butzen, Michiel Steyaert:
MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution. ESSCIRC 2016: 445-448 - [c124]Nicolas Butzen, Michiel Steyaert:
12.2 A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution. ISSCC 2016: 220-221 - [c123]Saurabh Agarwal, Mark Ingels, Michal Rakowski, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout:
Wavelength locking of a Si photonic ring transmitter using a dithering-based OMA stabilizing feedback loop. OFC 2016: 1-3 - 2015
- [j83]Athanasios Sarafianos, Michiel Steyaert:
Fully Integrated Wide Input Voltage Range Capacitive DC-DC Converters: The Folding Dickson Converter. IEEE J. Solid State Circuits 50(7): 1560-1570 (2015) - [j82]Hans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel S. J. Steyaert:
A Light-Load-Efficient 11/1 Switched-Capacitor DC-DC Converter With 94.7% Efficiency While Delivering 100 mW at 3.3 V. IEEE J. Solid State Circuits 50(12): 2849-2860 (2015) - [c122]Saurabh Agarwal, Mark Ingels, Michal Rakowski, Marianna Pantouvaki, Michiel Steyaert, Philippe P. Absil, Joris Van Campenhout:
Wavelength locking of a Si ring modulator using an integrated drop-port OMA monitoring circuit. A-SSCC 2015: 1-4 - [c121]Athanasios Sarafianos, Joachim Pichler, Christoph Sandner, Michiel Steyaert:
A folding dickson-based fully integrated wide input range capacitive DC-DC converter achieving Vout/2-resolution and 71% average efficiency. A-SSCC 2015: 1-4 - [c120]Michiel Steyaert, Filip Tavernier, Hans Meyvaert, Athanasios Sarafianos, Nicolas Butzen:
When hardware is free, power is expensive! Is integrated power management the solution? ESSCIRC 2015: 26-34 - [c119]Hans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel Steyaert:
20.1 A light-load-efficient 11/1 switched-capacitor DC-DC converter with 94.7% efficiency while delivering 100mW at 3.3V. ISSCC 2015: 1-3 - [c118]Michal Rakowski, Marianna Pantouvaki, Peter De Heyn, Peter Verheyen, Mark Ingels, Hongtao Chen, Jeroen De Coster, Guy Lepage, Brad Snyder, Kristin De Meyer, Michiel Steyaert, Nicola Pavarelli, Jun Su Lee, Peter O'Brien, Philippe P. Absil, Joris Van Campenhout:
22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver. ISSCC 2015: 1-3 - 2014
- [c117]Saurabh Agarwal, Mark Ingels, Michal Rakowski, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout:
Monitoring optical modulation amplitude using a low-power CMOS circuit for thermal control of Si ring transmitters. ECOC 2014: 1-3 - [c116]Athanasios Sarafianos, Michiel Steyaert:
The folding dickson converter: A step towards fully integrated wide input range capacitive DC-DC converters. ESSCIRC 2014: 267-270 - [c115]Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene:
Design of a frequency reference based on a PVT-independent transmission line delay. ISCAS 2014: 1772-1775 - 2013
- [j81]Hans Meyvaert, Patrick Smeets, Michiel Steyaert:
A 265 VRMS Mains Interface Integrated in 0.35 µm CMOS. IEEE J. Solid State Circuits 48(7): 1558-1564 (2013) - [c114]Piet Callemeyn, Michiel Steyaert:
A monolithic stacked Class-D approach for high voltage DC-AC conversion in standard CMOS. ESSCIRC 2013: 165-168 - [c113]Noël Deferm, Wouter Volkaerts, Juan F. Osorio, Anton de Graauw, Michiel Steyaert, Patrick Reynaert:
A 120GHz fully integrated 10Gb/s wireless transmitter with on-chip antenna in 45nm low power CMOS. ESSCIRC 2013: 331-334 - [c112]Fridolin Michel, Michiel Steyaert:
EMI resisting voltage regulator with large signal PSR up to 1GHz. ESSCIRC 2013: 391-394 - [c111]Henk Motte, Michiel Steyaert, Olivier Chasles, Jean-Pierre Goemaere, Nobby Stevens, Lieven De Strycker:
Electronic dispersion correction circuit for Plastic Optical Fiber channels. ISPACS 2013: 743-748 - [c110]Ying Cao, Paul Leroux, Wouter De Cock, Michiel Steyaert:
A 63, 000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback. ISSCC 2013: 186-187 - [c109]Michal Rakowski, Marianna Pantouvaki, Hui Yu, Wim Bogaerts, Kristin De Meyer, Michiel Steyaert, Bradley Snyder, Peter O'Brien, Julien Ryckaert, Philippe Absil, Joris Van Campenhout:
Low-power, low-penalty, flip-chip integrated, 10Gb/s ring-based 1V CMOS photonics transmitter. OFC/NFOEC 2013: 1-3 - 2012
- [j80]Fridolin Michel, Michiel Steyaert:
A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ Modulator Using Near-Threshold-Voltage-Biased Inverter Amplifiers in 130 nm CMOS. IEEE J. Solid State Circuits 47(3): 709-721 (2012) - [j79]Hagen Marien, Michiel Steyaert, Erik van Veenendaal, Paul Heremans:
Analog Building Blocks for Organic Smart Sensor Systems in Organic Thin-Film Transistor Technology on Flexible Plastic Foil. IEEE J. Solid State Circuits 47(7): 1712-1720 (2012) - [j78]Ying Cao, Wouter De Cock, Michiel Steyaert, Paul Leroux:
1-1-1 MASH Δ Σ Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping. IEEE J. Solid State Circuits 47(9): 2093-2106 (2012) - [c108]Michal Rakowski, Julien Ryckaert, Marianna Pantouvaki, Hui Yu, Wim Bogaerts, Kristin De Meyer, Michiel Steyaert, Philippe P. Absil, Joris Van Campenhout:
Low-Power, 10-Gbps 1.5-Vpp differential CMOS driver for a silicon electro-optic ring modulator. CICC 2012: 1-6 - [c107]Nico De Clercq, Tom Van Breussegem, Wim Dehaene, Michiel Steyaert:
Dual-output capacitive DC-DC converter with power distribution regulator in 90 nm CMOS. ESSCIRC 2012: 169-172 - [c106]Piet Callemeyn, Michiel Steyaert:
Monolithic integration of a class DE inverter for on-chip resonant DC-DC converters. ESSCIRC 2012: 325-328 - [c105]Hans Meyvaert, Patrick Smeets, Michiel Steyaert:
A 265VRMS mains interface integrated in 0.35μm CMOS. ESSCIRC 2012: 438-441 - [c104]Hagen Marien, Michiel Steyaert, Erik van Veenendaal, Paul Heremans:
1D and 2D analog 1.5kHz air-stable organic capacitive touch sensors on plastic foil. ISSCC 2012: 310-312 - [c103]Fridolin Michel, Michiel Steyaert:
On-chip gain reconfigurable 1.2V 24μW chopping instrumentation amplifier with automatic resistor matching in 0.13μm CMOS. ISSCC 2012: 372-374 - 2011
- [j77]Hagen Marien, Michiel Steyaert, Erik van Veenendaal, Paul Heremans:
A Fully Integrated Delta Sigma ADC in Organic Thin-Film Transistor Technology on Flexible Plastic Foil. IEEE J. Solid State Circuits 46(1): 276-284 (2011) - [j76]Tom Van Breussegem, Michiel Steyaert:
Monolithic Capacitive DC-DC Converter With Single Boundary-Multiphase Control and Voltage Domain Stacking in 90 nm CMOS. IEEE J. Solid State Circuits 46(7): 1715-1727 (2011) - [j75]Tom Redant, Jorg Daniels, Michiel Steyaert, Wim Dehaene:
Multiple Event Time-to-Digital Conversion-Based Pulse Digitization for a 250 MHz Pulse Radio Ranging Application. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(11): 2614-2622 (2011) - [j74]Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen:
Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks. IEEE Trans. Evol. Comput. 15(4): 557-570 (2011) - [c102]Ying Cao, Paul Leroux, Wouter De Cock, Michiel Steyaert:
A 0.7mW 13b temperature-stable MASH ΔΣ TDC with delay-line assisted calibration. A-SSCC 2011: 361-364 - [c101]Hao-Ming Chao, Kuei-Ann Wen, Michiel Steyaert:
An active guarding technique for substrate noise suppression on LC-tank oscillators. A-SSCC 2011: 385-388 - [c100]Paul Heremans, Wim Dehaene, Michiel Steyaert, Kris Myny, Hagen Marien, Jan Genoe, Gerwin H. Gelinck, Erik van Veenendaal:
Circuit design in organic semiconductor technologies. ESSCIRC 2011: 5-12 - [c99]Michiel Steyaert, Tom Van Breussegem, Hans Meyvaert, Piet Callemeyn, Mike Wens:
DC-DC converters: From discrete towards fully integrated CMOS. ESSCIRC 2011: 42-49 - [c98]Fridolin Michel, Michiel Steyaert:
Differential input topologies with immunity to electromagnetic interference. ESSCIRC 2011: 203-206 - [c97]Maarten Tytgat, Michiel Steyaert, Patrick Reynaert:
A 200GHz downconverter in 90nm CMOS. ESSCIRC 2011: 239-242 - [c96]Kameswaran Vengattaramane, Jonathan Borremans, Michiel Steyaert, Jan Craninckx:
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration. ESSCIRC 2011: 275-278 - [c95]Hagen Marien, Michiel Steyaert, Erik van Veenendaal, Paul Heremans:
DC-DC converter assisted two-stage amplifier in organic thin-film transistor technology on foil. ESSCIRC 2011: 411-414 - [c94]Hans Meyvaert, Tom Van Breussegem, Michiel Steyaert:
A monolithic 0.77W/mm2 power dense capacitive DC-DC step-down converter in 90nm Bulk CMOS. ESSCIRC 2011: 483-486 - [c93]Lianming Li, Patrick Reynaert, Michiel Steyaert:
A colpitts LC VCO with Miller-capacitance gm enhancing and phase noise reduction techniques. ESSCIRC 2011: 491-494 - [c92]Fridolin Michel, Michiel Steyaert:
A 250mV 7.5μW 61dB SNDR CMOS SC ΔΣ modulator using a near-threshold-voltage-biased CMOS inverter technique. ISSCC 2011: 476-478 - [c91]Ying Cao, Paul Leroux, Wouter De Cock, Michiel Steyaert:
A 1.7mW 11b 1-1-1 MASH ΔΣ time-to-digital converter. ISSCC 2011: 480-482 - 2010
- [j73]Pieter Crombez, Geert Van der Plas, Michiel Steyaert, Jan Craninckx:
A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CTΔΣ for SDR in 90 nm Digital CMOS. IEEE J. Solid State Circuits 45(6): 1159-1171 (2010) - [j72]Christophe De Roover, Michiel Steyaert:
Energy Supply and ULP Detection Circuits for an RFID Localization System in 130 nm CMOS. IEEE J. Solid State Circuits 45(7): 1273-1285 (2010) - [j71]Jean-Michel Redoute, Michiel Steyaert:
Kuijk Bandgap Voltage Reference With High Immunity to EMI. IEEE Trans. Circuits Syst. II Express Briefs 57-II(2): 75-79 (2010) - [j70]Jean-Michel Redoute, Michiel Steyaert:
EMI-Resistant CMOS Differential Input Stages. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 323-331 (2010) - [j69]Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer:
A/D Conversion Using Asynchronous Delta-Sigma Modulation and Time-to-Digital Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2404-2412 (2010) - [j68]Pieter Palmers, Michiel Steyaert:
A 10-Bit 1.6-GS/s 27-mW Current-Steering D/A Converter With 550-MHz 54-dB SFDR Bandwidth in 130-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2870-2879 (2010) - [c90]Lianming Li, Patrick Reynaert, Michiel Steyaert:
A 60GHz 15.7mW static frequency divider in 90nm CMOS. ESSCIRC 2010: 246-249 - [c89]Christophe De Roover, Michiel Steyaert:
A 500 mV 650 pW random number generator in 130 nm CMOS for a UWB localization system. ESSCIRC 2010: 278-281 - [c88]Tom Van Breussegem, Michiel Steyaert:
A fully integrated 74% efficiency 3.6V to 1.5V 150mW capacitive point-of-load DC/DC-converter. ESSCIRC 2010: 434-437 - [c87]Hagen Marien, Michiel Steyaert, Soeren Steudel, Peter Vicca, Steve Smout, Gerwin H. Gelinck, Paul Heremans:
An organic integrated capacitive DC-DC up-converter. ESSCIRC 2010: 510-513 - [c86]Filip Tavernier, Michiel Steyaert:
A 5.5 Gbit/s optical receiver in 130 nm CMOS with speed-enhanced integrated photodiode. ESSCIRC 2010: 542-545 - [c85]Jorg Daniels, Wim Dehaene, Michiel Steyaert:
All-digital differential VCO-based A/D conversion. ISCAS 2010: 1085-1088 - [c84]Hagen Marien, Michiel Steyaert, Nick A. J. M. van Aerle, Paul Heremans:
An analog organic first-order CT ΔΣ ADC on a flexible plastic substrate with 26.5dB precision. ISSCC 2010: 136-137
2000 – 2009
- 2009
- [j67]Lianming Li, Patrick Reynaert, Michiel S. J. Steyaert:
Design and Analysis of a 90 nm mm-Wave Oscillator Using Inductive-Division LC Tank. IEEE J. Solid State Circuits 44(7): 1950-1958 (2009) - [j66]Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel S. J. Steyaert:
A 66 µW 86 ppm° C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM. IEEE J. Solid State Circuits 44(7): 1990-2001 (2009) - [j65]Filip Tavernier, Michel S. J. Steyaert:
High-Speed Optical Receivers With Integrated Photodiode in 130 nm CMOS. IEEE J. Solid State Circuits 44(10): 2856-2867 (2009) - [j64]Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert:
Erratum to "A 66 µW 86 ppm°C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM" [Jul 09 1990-2001]. IEEE J. Solid State Circuits 44(10): 2868 (2009) - [j63]Libin Yao, Michiel S. J. Steyaert, Willy Sansen:
Erratum to "A 1-V 140-μW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS". IEEE J. Solid State Circuits 44(11): 3211 (2009) - [j62]Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen:
Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1281-1294 (2009) - [c83]Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen:
Massively multi-topology sizing of analog integrated circuits. DATE 2009: 706-711 - [c82]Wim Dehaene, Georges G. E. Gielen, Michiel Steyaert, Hans Danneels, V. Desmedt, Christophe De Roover, Z. Li, Marian Verhelst, Nick Van Helleputte, S. Radioma, C. Walravensa, L. Pleysier:
RFID, where are they? ESSCIRC 2009: 36-43 - [c81]Hagen Marien, Michiel Steyaert, Nick A. J. M. van Aerle, Paul Heremans:
A mixed-signal organic 1kHz comparator with low VT sensitivity on flexible plastic substrate. ESSCIRC 2009: 120-123 - [c80]Filip Tavernier, Michiel Steyaert:
A low power, area efficient limiting amplifier in 90nm CMOS. ESSCIRC 2009: 128-131 - [c79]Mike Wens, Jean-Michel Redoute, Tim Blanchaert, Nicolas Bleyaert, Michiel Steyaert:
An integrated 10A, 2.2ns rise-time laser-diode driver for LIDAR applications. ESSCIRC 2009: 144-147 - [c78]Christophe De Roover, Michiel Steyaert:
Ultra low power detection circuits in 130nm CMOS for a wireless UWB localization system. ESSCIRC 2009: 256-259 - [c77]Koen Cornelissens, Michiel Steyaert:
A 1-V 84-dB DR 1-MHz bandwidth cascade 3-1 Delta-Sigma ADC in 65-nm CMOS. ESSCIRC 2009: 332-335 - [c76]Pieter Crombez, Geert Van der Plas, Michiel Steyaert, Jan Craninckx:
A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOS. ESSCIRC 2009: 336-339 - [c75]Kameswaran Vengattaramane, Jan Craninckx, Michiel Steyaert:
Analysis of Fractional Spur Reduction using SigmaDelta-noise Cancellation in Digital-PLL. ISCAS 2009: 2397-2400 - [c74]Vito Giannini, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Michiel Steyaert, Julien Ryckaert, Michaël Goffioul, Björn Debaillie, Joris Van Driessche, Jan Craninckx, Mark Ingels:
A 2mm2 0.1-to-5GHz SDR receiver in 45nm digital CMOS. ISSCC 2009: 408-409 - 2008
- [j61]Willem Laflere, Michiel S. J. Steyaert, Jan Craninckx:
A Polar Modulator Using Self-Oscillating Amplifiers and an Injection-Locked Upconversion Mixer. IEEE J. Solid State Circuits 43(2): 460-467 (2008) - [j60]Xu Wu, Pieter Palmers, Michiel S. J. Steyaert:
A 130 nm CMOS 6-bit Full Nyquist 3 GS/s DAC. IEEE J. Solid State Circuits 43(11): 2396-2403 (2008) - [j59]Pieter Crombez, Jan Craninckx, Piet Wambacq, Michiel Steyaert:
A 100-kHz to 20-MHz Reconfigurable Power-Linearity Optimized Gm-C Biquad in 0.13-mu m CMOS. IEEE Trans. Circuits Syst. II Express Briefs 55-II(3): 224-228 (2008) - [j58]Koen Cornelissens, Michiel Steyaert:
Design Considerations for Cascade Delta Sigma ADC's. IEEE Trans. Circuits Syst. II Express Briefs 55-II(5): 389-393 (2008) - [c73]Mike Wens, Michiel Steyaert:
A fully-integrated 0.18μm CMOS DC-DC step-down converter, using a bondwire spiral inductor. CICC 2008: 17-20 - [c72]Jean-Michel Redoute, Michiel Steyaert:
EMI resisting smart-power integrated LIN driver with reduced slope pumping. CICC 2008: 643-646 - [c71]Mike Wens, Michiel Steyaert:
A fully-integrated 130nm CMOS DC-DC step-down converter, regulated by a constant on/off-time control system. ESSCIRC 2008: 62-65 - [c70]Filip Tavernier, Michiel Steyaert:
Power efficient 4.5Gbit/s optical receiver in 130nm CMOS with integrated photodiode. ESSCIRC 2008: 162-165 - [c69]Pieter Palmers, Michiel Steyaert:
A 11 mW 68dB SFDR 100 MHz bandwidth ΔΣ-DAC based on a 5-bit 1GS/s core in 130nm. ESSCIRC 2008: 214-217 - [c68]Lianming Li, Patrick Reynaert, Michiel Steyaert:
A 90nm CMOS mm-wave VCO using an LC tank with inductive division. ESSCIRC 2008: 238-241 - [c67]Jean-Michel Redoute, Michiel Steyaert:
A CMOS source-buffered differential input stage with high EMI suppression. ESSCIRC 2008: 318-321 - [c66]Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert:
A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation. ESSCIRC 2008: 394-397 - [c65]Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert:
Automated extraction of expert knowledge in analog topology selection and sizing. ICCAD 2008: 392-395 - [c64]Filip Tavernier, Michiel Steyaert:
A high-speed fully integrated optical receiver in standard 130nm CMOS. ICECS 2008: 806-809 - [c63]Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer:
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. ISCAS 2008: 1648-1651 - [c62]Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen:
A low-power mixing DAC IR-UWB-receiver. ISCAS 2008: 2697-2700 - 2007
- [j57]Patrick Reynaert, Michiel S. J. Steyaert:
A 2.45-GHz 0.13-µm CMOS PA With Parallel Amplification. IEEE J. Solid State Circuits 42(3): 551-562 (2007) - [j56]Jean-Michel Redoute, Michiel Steyaert:
An EMI Resisting LIN Driver in 0.35-micron High-Voltage CMOS. IEEE J. Solid State Circuits 42(7): 1574-1582 (2007) - [j55]Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen:
A Design-Optimized Continuous-Time Delta-Sigma ADC for WLAN Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(1): 209-217 (2007) - [c61]Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert:
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. DAC 2007: 944-947 - [c60]Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen:
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. DATE 2007: 81-86 - [c59]Pieter Crombez, Jan Craninckx, Piet Wambacq, Michiel Steyaert:
Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis. ECCTD 2007: 216-219 - [c58]Mike Wens, Koen Cornelissens, Michiel Steyaert:
A fully-integrated 0.18µm CMOS DC-DC step-up converter, using a bondwire spiral inductor. ESSCIRC 2007: 268-271 - [c57]Willem Laflere, Michiel Steyaert, Jan Craninckx:
A power amplifier driver using self-oscillating pulse-width modulators. ESSCIRC 2007: 380-383 - [c56]Jean-Michel Redoute, Cedric Walravens, Steven Van Winckel, Michiel Steyaert:
An integrated DC current regulator with high EMI suppression. ESSCIRC 2007: 420-423 - [c55]Koen Cornelissens, Michiel Steyaert:
Analysis and Performance Comparison of a Cascade 3-1 Delta-Sigma Topology. ICECS 2007: 222-225 - [c54]Bert Serneels, Michiel Steyaert, Wim Dehaene:
A 237mW aDSL2+ CO Line Driver in Standard 1.2V 0.13μ CMOS. ISSCC 2007: 524-619 - [c53]Ian Galton, Matt Miller, Robert Bogdan Staszewski, Bram Nauta, Michiel Steyaert:
Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS. ISSCC 2007: 635-636 - 2006
- [j54]Jurgen Deveugele, Michiel S. J. Steyaert:
A 10-bit 250-MS/s binary-weighted current-steering DAC. IEEE J. Solid State Circuits 41(2): 320-329 (2006) - [j53]Carolien Hermans, Michiel S. J. Steyaert:
A high-speed 850-nm optical receiver front-end in 0.18-μm CMOS. IEEE J. Solid State Circuits 41(7): 1606-1614 (2006) - [c52]Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen:
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. DAC 2006: 25-30 - [c51]Bert Serneels, Michiel Steyaert, Wim Dehaene:
A High speed, Low Voltage to High Voltage Level Shifter in Standard 1.2V 0.13μm CMOS. ICECS 2006: 668-671 - [c50]Raf Schoofs, Tom Eeckelaert, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A Continuous-Time Delta-Sigma Modulator for 802.11a/b/g WLAN Implemented with a Hierarchical Bottom-up Optimization Methodology. ICECS 2006: 950-953 - [c49]Koen Cornelissens, Michiel Steyaert:
A Novel Bootstrapped Switch Design, Applied in a 400 MHz Clocked ΔΣ ADC. ICECS 2006: 1156-1159 - [c48]Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen:
A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. ISCAS 2006 - 2005
- [j52]Bert Serneels, Tim Piessens, Michiel Steyaert, Wim Dehaene:
A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology. IEEE J. Solid State Circuits 40(3): 576-583 (2005) - [j51]Patrick Reynaert, Michiel S. J. Steyaert:
A 1.75-GHz polar modulated CMOS RF power amplifier for GSM-EDGE. IEEE J. Solid State Circuits 40(12): 2598-2608 (2005) - [j50]Vesselin K. Vassilev, Steven Thijs, P. L. Segura, Piet Wambacq, Paul Leroux, Guido Groeseneken, M. I. Natarajan, Herman E. Maes, Michiel Steyaert:
ESD-RF co-design methodology for the state of the art RF-CMOS blocks. Microelectron. Reliab. 45(2): 255-268 (2005) - [j49]Tim Piessens, Michiel Steyaert:
Behavioral analysis of self-oscillating class D line drivers. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(4): 706-714 (2005) - [j48]João Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert:
An Efficient, Fully Parasitic-Aware Power Amplifier Design Optimization Tool. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(8): 1526-1534 (2005) - [c47]Bert Serneels, Michiel Steyaert, Wim Dehaene:
A 5.5 V SOPA line driver in a standard 1.2 V 0.13 μm CMOS technology. ESSCIRC 2005: 303-306 - [c46]Koen Cornelissens, Patrick Reynaert, Michiel Steyaert:
A 0.18μm CMOS switched capacitor voltage modulator. ESSCIRC 2005: 375-378 - [c45]Michiel Steyaert, Frederique Gobert, Carolien Hermans, Patrick Reynaert, Bert Serneels:
Digital communication systems: the problem of analog interface circuits. ESSCIRC 2005: 423-426 - [c44]Carolien Hermans, Michiel Steyaert:
A 3.5Gbit/s post-amplifier in 0.18μm CMOS. ESSCIRC 2005: 431-434 - 2004
- [j47]Jurgen Deveugele, Pieter Palmers, Michiel S. J. Steyaert:
Parallel-path digital-to-analog converters for Nyquist signal generation. IEEE J. Solid State Circuits 39(7): 1073-1082 (2004) - [j46]Libin Yao, Michiel S. J. Steyaert, Willy Sansen:
A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS. IEEE J. Solid State Circuits 39(11): 1809-1818 (2004) - [j45]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, B.-J. Choi, Ann Concannon, J.-J. Yang, Guido Groeseneken, M. I. Natarajan, Marcel ter Beek, Peter Hopper, Michiel Steyaert, Herman E. Maes:
A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits. Microelectron. Reliab. 44(9-11): 1885-1890 (2004) - [j44]Jurgen Deveugele, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 191-195 (2004) - [j43]João Ramos, Michiel Steyaert:
Positive feedback frequency compensation for low-voltage low-power three-stage amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(10): 1967-1974 (2004) - [c43]Carolien Hermans, Paul Leroux, Michiel Steyaert:
Two high-speed optical front-ends with integrated photodiodes in standard 0.18 μm CMOS. ESSCIRC 2004: 275-278 - [c42]Paul Leroux, Michiel Steyaert:
A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM. ESSCIRC 2004: 295-298 - [c41]João Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert:
Knowledge- and optimization-based design of RF power amplifiers. ISCAS (1) 2004: 629-632 - [c40]Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene:
Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. ISLPED 2004: 280-285 - [e1]Michiel Steyaert, C. L. Claeys:
33rd European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, September 21-23, 2004. IEEE 2004 [contents] - 2003
- [j42]Tim Piessens, Michiel Steyaert:
Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier. IEEE J. Solid State Circuits 38(1): 22-29 (2003) - [j41]Koen Uyttenhove, Jan Vandenbussche, Erik Lauwers, Georges G. E. Gielen, Michiel S. J. Steyaert:
Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A/D converter. IEEE J. Solid State Circuits 38(3): 483-494 (2003) - [j40]Koen Uyttenhove, Michiel S. J. Steyaert:
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS. IEEE J. Solid State Circuits 38(7): 1115-1122 (2003) - [j39]Vesselin K. Vassilev, Snezana Jenei, Guido Groeseneken, Rafael Venegas, Steven Thijs, Vincent De Heyn, M. Natarajan Iyer, Michiel Steyaert, Herman E. Maes:
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices. Microelectron. Reliab. 43(7): 1011-1020 (2003) - [j38]Patrick Reynaert, Koen L. R. Mertens, Michiel Steyaert:
A state-space behavioral model for CMOS class E power amplifiers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(2): 132-138 (2003) - [j37]Bram De Muer, Michiel S. J. Steyaert:
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 784-793 (2003) - [c39]Jurgen Deveugele, Pieter Palmers, Michiel Steyaert:
Single-side-band digital-to-analog converters for Nyquist signal generation. ESSCIRC 2003: 93-96 - [c38]Libin Yao, Michiel Steyaert, Willy Sansen:
A 0.8-V, 8-μW, CMOS OTA with 50-dB gain and 1.2-MHz GBW in 18-pF load. ESSCIRC 2003: 297-300 - [c37]João Ramos, Xiaohong Peng, Michiel Steyaert, Willy Sansen:
Three stage amplifier frequency compensation. ESSCIRC 2003: 365-368 - [c36]Philippe Coppejans, Michiel Steyaert:
Dynamic biasing: a low power linearisation technique. ESSCIRC 2003: 369-372 - [c35]Tim Piessens, Michiel Steyaert:
Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers. ESSCIRC 2003: 529-532 - 2002
- [j36]Koen L. R. Mertens, Michiel S. J. Steyaert:
A 700-MHz 1-W fully differential CMOS class-E power amplifier. IEEE J. Solid State Circuits 37(2): 137-141 (2002) - [j35]Peter J. Vancorenland, Michiel S. J. Steyaert:
A 1.57-GHz fully integrated very low-phase-noise quadrature VCO. IEEE J. Solid State Circuits 37(5): 653-656 (2002) - [j34]Paul Leroux, Johan Janssens, Michiel Steyaert:
A 0.8-dB NF ESD-Protected 9-mW CMOS LNA operating at 1.23 GHz [for GPS receiver]. IEEE J. Solid State Circuits 37(6): 760-765 (2002) - [j33]Bram De Muer, Michel S. J. Steyaert:
A CMOS monolithic ΔΣ-controlled fractional-N frequency synthesizer for DCS-1800. IEEE J. Solid State Circuits 37(7): 835-844 (2002) - [j32]Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(10): 1161-1170 (2002) - [c34]Tim Piessens, Michiel Steyaert:
A central office combined ADSL-VDSL line driver solution in .35μm CMOS. CICC 2002: 45-48 - [c33]Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Michiel Steyaert:
A quadrature direct digital downconverter. CICC 2002: 235-238 - [c32]João Ramos, Michiel Steyaert:
Three stage amplifier with positive feedback compensation scheme. CICC 2002: 333-336 - [c31]Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michel S. J. Steyaert, Georges G. E. Gielen:
A 8-bit 200 MS/s interpolating/averaging CMOS A/D converter. CICC 2002: 445-448 - [c30]Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen:
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. DAC 2002: 449-454 - [c29]Michiel Steyaert, Peter J. Vancorenland:
CMOS: a paradigm for low power wireless? DAC 2002: 836-841 - [c28]Jan Vandenbussche, Erik Lauwers, Koen Uyttenhove, Michiel Steyaert, Georges G. E. Gielen:
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. DATE 2002: 357-361 - [c27]Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux, Michiel Steyaert:
Optimization of a fully integrated low power CMOS GPS receiver. ICCAD 2002: 305-308 - [c26]Jurgen Deveugele, Michiel Steyaert:
Application of high-speed, high-accuracy DACs for generation of multiple channels. DSP 2002: 361-365 - [c25]Carl De Ranter, Michiel Steyaert:
Design techniques for low power high bandwidth upconversion in CMOS. ISLPED 2002: 237-242 - 2001
- [j31]Anne Van den Bosch, Marc A. F. Borremans, Michel S. J. Steyaert, Willy Sansen:
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter. IEEE J. Solid State Circuits 36(3): 315-324 (2001) - [c24]Marc Borremans, Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
A low power, 10-bit CMOS D/A converter for high speed applications. CICC 2001: 157-160 - [c23]Koen Uyttenhove, Michiel Steyaert:
Speed-power-accuracy trade-off in high-speed ADCs: what about nano-electronics? CICC 2001: 341-344 - [c22]Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A Layout-Aware Synthesis Methodology for RF Circuits. ICCAD 2001: 358- - [c21]Koen Uyttenhove, Michiel Steyaert:
Design of high-speed analog-to-digital interface in digital technologies. ICECS 2001: 493-496 - 2000
- [j30]Bram De Muer, Marc Borremans, Michiel Steyaert, G. Li Puma:
A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization. IEEE J. Solid State Circuits 35(7): 1034-1038 (2000) - [j29]Yves Geerts, Michel S. J. Steyaert, Willy Sansen:
A high-performance multibit ΔΣ CMOS ADC. IEEE J. Solid State Circuits 35(12): 1829-1840 (2000) - [j28]Michel S. J. Steyaert, Johan Janssens, Bram De Muer, Marc Borremans, Nobuyuki Itoh:
A 2-V CMOS cellular transceiver front-end. IEEE J. Solid State Circuits 35(12): 1895-1907 (2000) - [c20]Yves Geerts, Michiel Steyaert, Willy Sansen:
A 12-bit 12.5 MS/s multi-bit ΔΣ CMOS ADC. CICC 2000: 21-24 - [c19]Anne Van den Bosch, Melissa Borremans, Michiel Steyaert, Willy Sansen:
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter. CICC 2000: 265-268 - [c18]Bram De Muer, Nobuyulu Itoh, Marc Borremans, Michiel Steyaert:
A 1.8 GHz highly-tunable low-phase-noise CMOS VCO. CICC 2000: 585-588 - [c17]Peter J. Vancorenland, Carl De Ranter, Michiel Steyaert, Georges G. E. Gielen:
Optimal RF design using smart evolutionary algorithms. DAC 2000: 7-10 - [c16]Carl De Ranter, Bram De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14 - [c15]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
An accurate statistical yield model for CMOS current-steering D/A converters. ISCAS 2000: 105-108 - [c14]Marc Borremans, Bram De Muer, Michiel Steyaert:
The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator. ISCAS 2000: 729-732 - [c13]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure. ISCAS 2000: 745-748
1990 – 1999
- 1999
- [j27]Yves Geerts, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications. IEEE J. Solid State Circuits 34(7): 927-936 (1999) - [j26]Mark Ingels, Michel S. J. Steyaert:
A 1-Gb/s, 0.7-μm CM+ OS optical receiver with full rail-to-rail output swing. IEEE J. Solid State Circuits 34(7): 971-977 (1999) - [j25]Geert Van der Plas, Jan Vandenbussche, Willy Sansen, Michel S. J. Steyaert, Georges G. E. Gielen:
A 14-bit intrinsic accuracy Q2 random walk CMOS DAC. IEEE J. Solid State Circuits 34(12): 1708-1718 (1999) - [j24]Marc A. F. Borremans, Carl De Ranter, Michel S. J. Steyaert:
A CMOS dual-channel, 100-MHz to 1.1-GHz transmitter for cable applications. IEEE J. Solid State Circuits 34(12): 1904-1913 (1999) - [c12]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
SFDR-bandwidth limitations for high speed high resolution current steering CMOS D/A converters. ICECS 1999: 1193-1196 - [c11]Bram De Muer, Carl De Ranter, Jan Crols, Michiel Steyaert:
A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators. ICECS 1999: 1557-1560 - [r1]Michiel Steyaert, Marc Borremans, Johan Janssens, Bram De Muer:
RF Communication Circuits. The VLSI Handbook 1999 - 1998
- [j23]Marc A. F. Borremans, Michiel S. J. Steyaert:
A 2-V, low distortion, 1-GHz CMOS up-conversion mixer. IEEE J. Solid State Circuits 33(3): 359-366 (1998) - [j22]Augusto Manuel Marques, Vincenzo Peluso, Michel S. J. Steyaert, Willy Sansen:
A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology. IEEE J. Solid State Circuits 33(7): 1065-1075 (1998) - [j21]Vincenzo Peluso, Peter J. Vancorenland, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range. IEEE J. Solid State Circuits 33(12): 1887-1897 (1998) - [j20]José Bastos, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 12-bit intrinsic accuracy high-speed CMOS DAC. IEEE J. Solid State Circuits 33(12): 1959-1969 (1998) - [j19]Jan Craninckx, Michel S. J. Steyaert:
A fully integrated CMOS DCS-1800 frequency synthesizer. IEEE J. Solid State Circuits 33(12): 2054-2065 (1998) - [j18]Augusto Manuel Marques, Michiel S. J. Steyaert, Willy M. C. Sansen:
Theory of PLL fractional-N frequency synthesizers. Wirel. Networks 4(1): 79-85 (1998) - [c10]Johan Janssens, Jan Crols, Michiel Steyaert:
A 10 mW inductorless, broadband CMOS low noise amplifier for 900 MHz wireless communications. CICC 1998: 75-78 - [c9]Marc Borremans, Michiel Steyaert, Takashi Yoshitomi:
A 1.5 V, wide band 3 GHz, CMOS quadrature direct up-converter for multi-mode wireless communications. CICC 1998: 79-82 - [c8]Anne Van den Bosch, Marc Borremans, Jan Vandenbussche, Geert Van der Plas, Augusto Manuel Marques, José Bastos, Michiel Steyaert, Georges G. E. Gielen, Willy Sansen:
A 12 bit 200 MHz low glitch CMOS D/A converter. CICC 1998: 249-252 - [c7]Jan Vandenbussche, Geert Van der Plas, Georges G. E. Gielen, Michiel Steyaert, Willy Sansen:
Behavioral model for D/A converters as VSI virtual components. CICC 1998: 473-476 - [c6]Augusto Manuel Marques, José Bastos, Michiel Steyaert, Willy Sansen:
A current steering architecture for 12-bit high-speed D/A converters. ICECS 1998: 23-26 - [c5]Augusto Manuel Marques, Valentino Peluso, Michiel Steyaert, Willy M. C. Sansen:
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters. ICECS 1998: 153-156 - [c4]Augusto Manuel Marques, Yves Geerts, Michiel Steyaert, Willy Sansen:
Settling time analysis of third order systems. ICECS 1998: 505-508 - 1997
- [j17]Peter R. Kinget, Michiel S. J. Steyaert:
A 1-GHz CMOS up-conversion mixer. IEEE J. Solid State Circuits 32(3): 370-376 (1997) - [j16]Jan Craninckx, Michiel S. J. Steyaert:
A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors. IEEE J. Solid State Circuits 32(5): 736-744 (1997) - [j15]Vincenzo Peluso, Michiel S. J. Steyaert, Willy Sansen:
A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique. IEEE J. Solid State Circuits 32(7): 943-952 (1997) - [j14]Wim Dehaene, Michiel S. J. Steyaert, Willy Sansen:
A 50-MHz standard CMOS pulse equalizer for hard disk read channels. IEEE J. Solid State Circuits 32(7): 977-988 (1997) - [j13]Mark Ingels, Michiel S. J. Steyaert:
Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode IC's. IEEE J. Solid State Circuits 32(7): 1136-1141 (1997) - 1996
- [j12]Peter R. Kinget, Michiel Steyaert:
Evaluation of CNN Template Robustness Towards VLSI Implementation. Int. J. Circuit Theory Appl. 24(1): 111-120 (1996) - [j11]Jan Craninckx, Michiel S. J. Steyaert:
A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS. IEEE J. Solid State Circuits 31(7): 890-897 (1996) - [j10]Raf Roovers, Michiel S. J. Steyaert:
A 175 Ms/s, 6 b, 160 mW, 3.3 V CMOS A/D converter. IEEE J. Solid State Circuits 31(7): 938-944 (1996) - 1995
- [j9]Peter R. Kinget, Michel S. J. Steyaert:
A programmable analog cellular neural network CMOS chip for high speed image processing. IEEE J. Solid State Circuits 30(3): 235-243 (1995) - [j8]Jan Crols, Michel S. J. Steyaert:
A 1.5 GHz highly linear CMOS downconversion mixer. IEEE J. Solid State Circuits 30(7): 736-742 (1995) - [j7]Michel S. J. Steyaert, Wim Dehaene, Jan Craninckx, Mairtin Walsh, Peter Real:
A CMOS rectifier-integrator for amplitude detection in hard disk servo loops. IEEE J. Solid State Circuits 30(7): 743-751 (1995) - [j6]Jan Craninckx, Michel S. J. Steyaert:
A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler. IEEE J. Solid State Circuits 30(12): 1474-1482 (1995) - [j5]Jan Crols, Michel S. J. Steyaert:
A single-chip 900 MHz CMOS receiver front-end with a high performance low-IF topology. IEEE J. Solid State Circuits 30(12): 1483-1492 (1995) - [c3]Jan Crols, Stéphane Donnay, Michiel Steyaert, Georges G. E. Gielen:
A high-level design and optimization tool for analog RF receiver front-ends. ICCAD 1995: 550-553 - 1994
- [j4]Jan Crols, Michiel Steyaert:
Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages. IEEE J. Solid State Circuits 29(8): 936-942 (1994) - [j3]Mark Ingels, Geert Van der Plas, Jan Crols, Michiel Steyaert:
A CMOS 18 THzΩ 248 Mb/s transimpedance amplifier and 155 Mb/s LED-driver for low cost optical fiber links. IEEE J. Solid State Circuits 29(12): 1552-1559 (1994) - [c2]Peter R. Kinget, Michiel Steyaert:
Analogue CMOS VLSI Implementation of Cellular Neural Networks with Continuously Programmable Templates. ISCAS 1994: 367-370 - 1993
- [b1]José Silva-Martínez, Michiel Steyaert, Willy M. C. Sansen:
High-performance CMOS continuous-time filters. The Kluwer international series in engineering and computer science 223, Kluwer 1993, ISBN 978-0-7923-9339-9, pp. I-VIII, 1-230 - [c1]Michiel Steyaert, Jan Crols, S. Gogaert, Willy M. C. Sansen:
Low-voltage Analog CMOS Filter Design. ISCAS 1993: 1447-1450
1980 – 1989
- 1988
- [j2]Qiuting Huang, Willy M. C. Sansen, Michiel S. J. Steyaert, Peter M. Van Peteghem:
Design and implementation of a CMOS VCXO for FM stereo decoders. IEEE J. Solid State Circuits 23(3): 784-793 (1988) - [j1]Willy M. C. Sansen, Frank Op't Eynde, Michiel Steyaert:
A CMOS temperature-compensated current reference. IEEE J. Solid State Circuits 23(3): 821-824https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=322 (1988)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-06 20:24 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
