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ORCIDGhaith Tarawneh
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2020 – today
- 2022
[j3]Ashur Rafiev
, Alex Yakovlev, Ghaith Tarawneh, Matthew Naylor, Simon W. Moore, David B. Thomas, Graeme M. Bragg, Mark Vousden, Andrew D. Brown:
Synchronization in graph analysis algorithms on the Partially Ordered Event-Triggered Systems many-core architecture. IET Comput. Digit. Tech. 16(2-3): 71-88 (2022)
2010 – 2019
- 2018
- [j2]Issa Qiqieh, Rishad A. Shafik, Ghaith Tarawneh, Danil Sokolov, Shidhartha Das, Alexandre Yakovlev:
Significance-Driven Logic Compression for Energy-Efficient Multiplier Design. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 417-430 (2018) - [c17]Ghaith Tarawneh, Andrey Mokhov:
Formal Verification of Mixed Synchronous Asynchronous Systems Using Industrial Tools. ASYNC 2018: 43-50 - [c16]Anna Vasilchenko, Ghaith Tarawneh, Haneen Qarabash, Madeline Balaam:
Collaborative Content Creation: Impact of Media Type on Author Behavior. CSCW Companion 2018: 341-344 - 2017
- [c15]Ghaith Tarawneh, Andrey Mokhov:
Xprova: Formal Verification Tool with Built-in Metastability Modeling. ACSD 2017: 74-79 - [c14]Ghaith Tarawneh, Matthias Függer, Christoph Lenzen:
Metastability Tolerant Computing. ASYNC 2017: 25-32 - [c13]Issa Qiqieh, Rishad A. Shafik, Ghaith Tarawneh, Danil Sokolov, Alex Yakovlev:
Energy-efficient approximate multiplier design using bit significance-driven logic compression. DATE 2017: 7-12 - [c12]Andrey Mokhov, Alessandro de Gennaro, Ghaith Tarawneh, Jonny Wray, Georgy Lukyanov, Sergey Mileiko, Joe Scott, Alex Yakovlev, Andrew D. Brown:
Language and hardware acceleration backend for graph processing. FDL 2017: 1-7 - [c11]Andrey Mokhov, Alessandro de Gennaro, Ghaith Tarawneh, Jonny Wray, Georgy Lukyanov, Sergey Mileiko, Joe Scott, Alex Yakovlev, Andrew D. Brown:
Language and Hardware Acceleration Backend for Graph Processing. FDL (Selected Papers) 2017: 71-88 - [c10]Ghaith Tarawneh, Andrey Mokhov, Matthew Naylor, Alex Rast, Simon W. Moore, David B. Thomas, Alex Yakovlev, Andrew D. Brown:
Programming Model to Develop Supercomputer Combinatorial Solvers. ICPP Workshops 2017: 171-179 - [c9]Andrew D. Brown, David B. Thomas, Jeff Reeve, Ghaith Tarawneh, Alessandro de Gennaro, Andrey Mokhov, Matthew Naylor, Tom Kazmierski:
Distributed Event-Based Computing. PARCO 2017: 583-592 - [c8]Khaled Al-Maaitah, Ghaith Tarawneh, Ahmed Soltan, Issa Qiqieh, Alex Yakovlev:
Approximate adder segmentation technique and significance-driven error correction. PATMOS 2017: 1-6 - [c7]Issa Qiqieh, Rishad A. Shafik, Ghaith Tarawneh, Danil Sokolov, Shidhartha Das, Alex Yakovlev:
Energy-efficient approximate wallace-tree multiplier using significance-driven logic compression. SiPS 2017: 1-6 - 2016
- [c6]Ghaith Tarawneh, Andrey Mokhov, Alex Yakovlev:
Formal verification of clock domain crossing using gate-level models of metastable flip-flops. DATE 2016: 1060-1065 - 2014
- [j1]Ghaith Tarawneh, Alex Yakovlev, Terrence S. T. Mak:
Eliminating Synchronization Latency Using Sequenced Latching. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 408-419 (2014) - [c5]Ghaith Tarawneh, Jenny C. A. Read:
An FPGA-based hardware accelerator for simulating spatiotemporal neurons. ICECS 2014: 618-621 - [c4]Nizar Dahir, Ghaith Tarawneh, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev:
Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip. PDP 2014: 384-391 - 2012
- [c3]Ghaith Tarawneh, Terrence S. T. Mak, Alex Yakovlev:
Intra-chip physical parameter sensor for FPGAS using flip-flop metastability. FPL 2012: 373-379 - [c2]Ghaith Tarawneh, Alex Yakovlev:
An RTL method for hiding clock domain crossing latency. ICECS 2012: 540-543 - [c1]Ghaith Tarawneh, Alex Yakovlev:
Adaptive Synchronization for DVFS Applications. PATMOS 2012: 93-102
Coauthor Index
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