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2020 – today
- 2024
[c22]J. Ganguly, Hiroaki Arimura, Romain Ritzenthaler, H. Bana, J. W. Maes, J. G. Lai, S. Brus, W. Maqsood, R. Sarkar, B. Kannan, Elena Capogreco, V. Machkaoutsan, S. Yoon, Alessio Spessot, M. Givens, Naoto Horiguchi:
DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM. VLSI Technology and Circuits 2024: 1-2- 2023
- [c21]Erik Bury, Michiel Vandemaele, Jacopo Franco, Adrian Chasin, Stanislav Tyaginov, A. Vandooren, Romain Ritzenthaler, Hans Mertens, Javier Diaz-Fortuny
, N. Horiguchi, Dimitri Linten, Ben Kaczer:
Reliability challenges in Forksheet Devices: (Invited Paper). IRPS 2023: 1-8 - [c20]Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, S. Brus, Romain Ritzenthaler, E. Dentoni Litta, Kris Croes, Ben Kaczer, N. Horiguchi:
Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c19]Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao Bastos, Yangyin Chen, Naoto Horiguchi:
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW 2022: 1-4 - [c18]J. P. Bastos, Barry J. O'Sullivan, Jacopo Franco, Stanislav Tyaginov, Brecht Truijen, Adrian Vaisman Chasin, Robin Degraeve, Ben Kaczer, Romain Ritzenthaler, Elena Capogreco, E. Dentoni Litta, Alessio Spessot, Yusuke Higashi, Y. Yoon, V. Machkaoutsan, Pierre Fazan, N. Horiguchi:
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery. IRPS 2022: 1-6 - [c17]Erik Bury, Adrian Vaisman Chasin, Ben Kaczer, Michiel Vandemaele, Stanislav Tyaginov, Jacopo Franco, Romain Ritzenthaler, Hans Mertens, Pieter Weckx, N. Horiguchi, Dimitri Linten:
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets. IRPS 2022: 5 - [c16]Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi:
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits 2022: 306-307 - 2020
- [c15]Adrian Vaisman Chasin, Jacopo Franco, Erik Bury, Romain Ritzenthaler, Eugenio Dentoni Litta, Alessio Spessot, Naoto Horiguchi, Dimitri Linten, Ben Kaczer:
Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation. IRPS 2020: 1-6
2010 – 2019
- 2019
- [c14]Eddy Simoen, Alberto Vinicius Oliveira, Anabela Veloso, Adrian Vaisman Chasin, Romain Ritzenthaler, Hans Mertens, Naoto Horiguchi, Cor Claeys:
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors. ASICON 2019: 1-4 - [c13]Barry J. O'Sullivan, Romain Ritzenthaler, Gerhard Rzepa, Z. Wu, E. Dentoni Litta, O. Richard, T. Conard, V. Machkaoutsan, Pierre Fazan, C. Kim, Jacopo Franco, Ben Kaczer, Tibor Grasser, Alessio Spessot, Dimitri Linten, N. Horiguchi:
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices. IRPS 2019: 1-8 - 2017
- [c12]Mustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram:
PPAC scaling enablement for 5nm mobile SoC technology. ESSDERC 2017: 240-243 - [c11]Romain Ritzenthaler, Hans Mertens, An De Keersgieter, Jérôme Mitard, Dan Mocuta, N. Horiguchi:
Isolation of nanowires made on bulk wafers by ground plane doping. ESSDERC 2017: 300-303 - 2016
- [c10]Thomas Chiarella, Stefan Kubicek, E. Rosseel, Romain Ritzenthaler, Andriy Hikavyy, P. Eyben, An De Keersgieter, L.-Å. Ragnarsson, M.-S. Kim, S.-A. Chew, Tom Schram, S. Demuynck, Miroslav Cupák, Luc Rijnders, Morin Dehan, Naoto Horiguchi, Jérôme Mitard, Dan Mocuta, Anda Mocuta, Aaron Voon-Yew Thean:
Towards high performance sub-10nm finW bulk FinFET technology. ESSDERC 2016: 131-134 - 2015
- [c9]Moonju Cho, Alessio Spessot, Ben Kaczer, Marc Aoulaiche, Romain Ritzenthaler, Tom Schram, Pierre Fazan, Naoto Horiguchi, Dimitri Linten:
Off-state stress degradation mechanism on advanced p-MOSFETs. ICICDT 2015: 1-4 - [c8]Romain Ritzenthaler, Tom Schram, M. J. Cho, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Christian Caillat, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son:
I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration. ICICDT 2015: 1-4 - [c7]Romain Ritzenthaler, Tom Schram, Geert Eneman, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son:
Assessment of SiGe quantum well transistors for DRAM peripheral applications. ICICDT 2015: 1-4 - [c6]Alessio Spessot, Romain Ritzenthaler, Tom Schram, Marc Aoulaiche, Moonju Cho, Maria Toledano-Luque, Naoto Horiguchi, Pierre Fazan:
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs. ICICDT 2015: 1-4 - [c5]Jacopo Franco, Ben Kaczer, Philippe J. Roussel, Erik Bury, Hans Mertens, Romain Ritzenthaler, Tibor Grasser, Naoto Horiguchi, Aaron Thean, Guido Groeseneken:
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures. IRPS 2015: 2 - 2014
- [c4]Alessio Spessot, Marc Aoulaiche, Moonju Cho, Jacopo Franco, Tom Schram, Romain Ritzenthaler, Ben Kaczer:
Impact of Off State Stress on advanced high-K metal gate NMOSFETs. ESSDERC 2014: 365-368 - 2013
- [c3]Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha:
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process. ESSDERC 2013: 159-162 - [c2]Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, Hyuokju Na, Y. Son, K. B. Noh:
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC 2013: 190-193 - 2012
- [c1]Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken, N. Horiguchi, Aaron Thean, Alessio Spessot, Christian Caillat, V. Srividya, Pierre Fazan:
Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. ESSDERC 2012: 242-245
Coauthor Index
aka: N. Horiguchi
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