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2020 – today
- 2021
[c90]Parthasarathy Ranganathan, Daniel Stodolsky, Jeff Calow, Jeremy Dorfman, Marisabel Guevara
, Clinton Wills Smullen IV, Aki Kuusela, Raghu Balasubramanian, Sandeep Bhatia, Prakash Chauhan, Anna Cheung, In Suk Chong, Niranjani Dasharathi, Jia Feng, Brian Fosco, Samuel Foss, Ben Gelb, Sara J. Gwin, Yoshiaki Hase, Da-ke He, C. Richard Ho, Roy W. Huffman Jr., Elisha Indupalli, Indira Jayaram, Poonacha Kongetira, Cho Mon Kyaw, Aaron Laursen, Yuan Li, Fong Lou, Kyle A. Lucke, J. P. Maaninen, Ramon Macias, Maire Mahony, David Alexander Munday, Srikanth Muroor, Narayana Penukonda, Eric Perkins-Argueta, Devin Persaud, Alex Ramírez, Ville-Mikko Rautio, Yolanda Ripley, Amir Salek, Sathish Sekar, Sergey N. Sokolov, Rob Springer, Don Stark, Mercedes Tan, Mark S. Wachsler, Andrew C. Walton, David A. Wickeraad, Alvin Wijaya, Hon Kwan Wu:
Warehouse-scale video acceleration: co-design and deployment in the wild. ASPLOS 2021: 600-615
2010 – 2019
- 2019
- [j35]Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé:
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors. Trans. High Perform. Embed. Archit. Compil. 5: 79-99 (2019) - 2018
- [c89]Andrea Lottarini, Alex Ramírez, Joel Coburn, Martha A. Kim, Parthasarathy Ranganathan, Daniel Stodolsky, Mark Wachsler:
vbench: Benchmarking Video Transcoding in the Cloud. ASPLOS 2018: 797-809 - 2017
- [j34]Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul M. Carpenter, Nacho Navarro, Alex Ramírez:
Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors. Int. J. Parallel Program. 45(3): 530-550 (2017) - [c88]Ugljesa Milic, Alejandro Rico, Paul M. Carpenter, Alex Ramírez:
Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications. ISPASS 2017: 3-12 - [c87]Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramírez, David W. Nellans:
Beyond the socket: NUMA-aware GPUs. MICRO 2017: 123-135 - 2016
- [c86]Ugljesa Milic, Paul M. Carpenter, Alejandro Rico, Alex Ramírez:
Rebalancing the core front-end through HPC code analysis. IISWC 2016: 128-137 - [c85]Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gómez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Hervé Gloaguen, Piero Lanucara, Nico Sanna, Jean-François Méhaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Volker Weinberg, Dirk Brömmel, René Halver, Jan H. Meinke, Ramón Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero, Alex Ramírez:
The mont-blanc prototype: an alternative approach for HPC systems. SC 2016: 444-455 - 2015
- [j33]Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler:
Designing Efficient Heterogeneous Memory Architectures. IEEE Micro 35(4): 60-68 (2015) - [c84]Karthikeyan P. Saravanan, Paul M. Carpenter, Alex Ramírez:
Exploring multiple sleep modes in on/off based energy efficient HPC networks. ICCD 2015: 54-61 - [c83]Milan Pavlovic, Milan Radulovic, Alex Ramírez, Petar Radojkovic:
Limpio: LIghtweight MPI instrumentatiOn. ICPC 2015: 303-306 - 2014
- [j32]Nikola Rajovic, Alejandro Rico, Nikola Puzovic, Chris Adeniyi-Jones, Alex Ramírez:
Tibidabo: Making the case for an ARM-based HPC system. Future Gener. Comput. Syst. 36: 322-334 (2014) - [c82]Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez:
Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors. Euro-Par Workshops (2) 2014: 218-229 - [c81]Alex Ramírez, Ayose Falcón, Oliverio J. Santana, Mateo Valero:
Author retrospective for software trace cache. ICS 25th Anniversary 2014: 45-47 - [c80]Karthikeyan P. Saravanan, Paul M. Carpenter, Alex Ramírez:
A performance perspective on energy efficient HPC links. ICS 2014: 313-322 - [c79]Ivan Grasso, Petar Radojkovic, Nikola Rajovic, Isaac Gelado, Alex Ramírez:
Energy Efficient HPC on Embedded SoCs: Optimization Techniques for Mali GPU. IPDPS 2014: 123-132 - [c78]Ivan Tanasic, Isaac Gelado, Javier Cabezas, Alex Ramírez, Nacho Navarro, Mateo Valero:
Enabling preemptive multiprogramming on GPUs. ISCA 2014: 193-204 - 2013
- [j31]Dominik Göddeke, Dimitri Komatitsch, Markus Geveler, Dirk Ribbrock, Nikola Rajovic, Nikola Puzovic, Alex Ramírez:
Energy efficiency vs. performance of the numerical solution of PDEs: An application study on a low-power ARM-based cluster. J. Comput. Phys. 237: 132-150 (2013) - [j30]Nikola Rajovic, Lluís Vilanova, Carlos Villavieja, Nikola Puzovic, Alex Ramírez:
The low power architecture approach towards exascale computing. J. Comput. Sci. 4(6): 439-443 (2013) - [c77]Nikola Rajovic, Alejandro Rico, James Vipond, Isaac Gelado, Nikola Puzovic, Alex Ramírez:
Experiences with mobile processors for energy efficient HPC. DATE 2013: 464-468 - [c76]Milan Pavlovic, Nikola Puzovic, Alex Ramírez:
Data placement in HPC architectures with heterogeneous off-chip memory. ICCD 2013: 193-200 - [c75]Jan Ciesko, Javier Bueno, Nikola Puzovic, Alex Ramírez, Rosa M. Badia, Jesús Labarta:
Programmable and Scalable Reductions on Clusters. IPDPS 2013: 560-568 - [c74]Alejandro Rico, Alex Ramírez, Mateo Valero:
Trace filtering of multithreaded applications for CMP memory simulation. ISPASS 2013: 134-135 - [c73]Karthikeyan P. Saravanan, Paul M. Carpenter, Alex Ramírez:
Power/performance evaluation of energy efficient Ethernet (EEE) for High Performance Computing. ISPASS 2013: 205-214 - [c72]Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramírez, Milo Tomasevic:
Parallelizing general histogram application for CUDA architectures. ICSAMOS 2013: 11-18 - [c71]Nikola Rajovic, Paul M. Carpenter, Isaac Gelado, Nikola Puzovic, Alex Ramírez, Mateo Valero:
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC? SC 2013: 40:1-40:12 - 2012
- [b2]Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez:
Scalable Parallel Programming Applied to H.264/AVC Decoding. Springer Briefs in Computer Science, Springer 2012, ISBN 978-1-4614-2229-7, pp. i-xiii, 1-101 - [j29]Santi González, Bàrbara Montserrat-Sentís, Friman Sánchez, Montserrat Puiggròs, Enrique Blanco, Alex Ramírez, David Torrents:
ReLA, a local alignment search tool for the identification of distal and proximal gene regulatory regions and their conserved transcription factor binding sites. Bioinform. 28(6): 763-770 (2012) - [j28]Alejandro Rico, Felipe Cabarcas, Carlos Villavieja, Milan Pavlovic, Augusto Vega, Yoav Etsion, Alex Ramírez, Mateo Valero:
On the simulation of large-scale architectures using multiple application abstraction levels. ACM Trans. Archit. Code Optim. 8(4): 36:1-36:20 (2012) - [j27]Nikola Vujic, Felipe Cabarcas, Marc González Tallada, Alex Ramírez, Xavier Martorell, Eduard Ayguadé:
DMA++: On the Fly Data Realignment for On-Chip Memories. IEEE Trans. Computers 61(2): 237-250 (2012) - [c70]Alex Ramírez, Dimitrios S. Nikolopoulos, David R. Kaeli, Satoshi Matsuoka:
Topic 16: GPU and Accelerators Computing. Euro-Par 2012: 857-858 - [c69]Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Alex Ramírez, Francisco J. Cazorla:
Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem. MICRO 2012: 401-412 - 2011
- [j26]Friman Sánchez, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Scalable multicore architectures for long DNA sequence comparison. Concurr. Comput. Pract. Exp. 23(17): 2205-2219 (2011) - [j25]Harm Munk, Eduard Ayguadé, Cédric Bastoul, Paul M. Carpenter, Zbigniew Chamski, Albert Cohen, Marco Cornero, Philippe Dumont, Marc Duranton, Mohammed Fellahi, Roger Ferrer, Razya Ladelsky, Menno Lindwer, Xavier Martorell, Cupertino Miranda, Dorit Nuzman, Andrea C. Ornstein, Antoniu Pop, Sebastian Pop, Louis-Noël Pouchet, Alex Ramírez, David Ródenas, Erven Rohou, Ira Rosen, Uzi Shvadron, Konrad Trifunovic, Ayal Zaks:
ACOTES Project: Advanced Compiler Technologies for Embedded Streaming. Int. J. Parallel Program. 39(3): 397-450 (2011) - [j24]Juan Gonzalez, Judit Giménez, Marc Casas, Miquel Moretó, Alex Ramírez, Jesús Labarta, Mateo Valero:
Simulating Whole Supercomputer Applications. IEEE Micro 31(3): 32-45 (2011) - [j23]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
Dynamic Cache Partitioning Based on the MLP of Cache Misses. Trans. High Perform. Embed. Archit. Compil. 3: 3-23 (2011) - [j22]Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero:
A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. 4: 111-134 (2011) - [c68]Carlos Villavieja, Vasileios Karakostas, Lluís Vilanova, Yoav Etsion, Alex Ramírez, Avi Mendelson, Nacho Navarro, Adrián Cristal, Osman S. Unsal:
DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory. PACT 2011: 340-349 - [c67]Catalin Bogdan Ciobanu, Xavier Martorell, Georgi Kuzmanov, Alex Ramírez, Georgi Gaydadjiev:
Scalability Evaluation of a Polymorphic Register File: A CG Case Study. ARCS 2011: 13-25 - [c66]Sebastián Isaza, Friman Sánchez, Felipe Cabarcas, Alex Ramírez, Georgi Gaydadjiev:
Parametrizing multicore architectures for multiple sequence alignment. Conf. Computing Frontiers 2011: 31 - [c65]Sebastián Isaza, Ernst Houtgast, Friman Sánchez, Alex Ramírez, Georgi Gaydadjiev:
Scaling HMMER Performance on Multicore Architectures. CISIS 2011: 618-623 - [c64]Carlos Villavieja, Yoav Etsion, Alex Ramírez, Nacho Navarro:
FELI: HW/SW Support for On-Chip Distributed Shared Memory in Multicores. Euro-Par (1) 2011: 282-294 - [c63]Milan Pavlovic, Yoav Etsion, Alex Ramírez:
On the memory system requirements of future scientific applications: Four case-studies. IISWC 2011: 159-170 - [c62]Alejandro Rico, Alejandro Duran, Felipe Cabarcas, Yoav Etsion, Alex Ramírez, Mateo Valero:
Trace-driven simulation of multithreaded applications. ISPASS 2011: 87-96 - [c61]Alex Ramírez:
Supercomputing: Past, present, and a possible future. ICSAMOS 2011 - [c60]Augusto Vega, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Breaking the bandwidth wall in chip multiprocessors. ICSAMOS 2011: 255-262 - [c59]Nikola Rajovic, Nikola Puzovic, Lluís Vilanova, Carlos Villavieja, Alex Ramírez:
The low-power architecture approach towards exascale computing. ScalA@SC 2011: 1-2 - 2010
- [j21]Veerle Desmet, Sylvain Girbal, Alex Ramírez, Olivier Temam, Augusto Vega:
ArchExplorer for Automatic Design Space Exploration. IEEE Micro 30(5): 5-15 (2010) - [j20]Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev:
The SARC Architecture. IEEE Micro 30(5): 16-29 (2010) - [c58]Sebastián Isaza, Friman Sánchez, Georgi Gaydadjiev, Alex Ramírez, Mateo Valero:
Scalability Analysis of Progressive Alignment on a Multicore. CISIS 2010: 889-894 - [c57]Alex Ramírez, Shaobo Ji, Rob Riordan, Frank Ulbrich, Michael J. Hine:
Empowering Business Students - Using Web 2.0 Tools in the Classroom. CSEDU (1) 2010: 147-153 - [c56]Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé:
Starsscheck: A Tool to Find Errors in Task-Based Parallel Programs. Euro-Par (1) 2010: 2-13 - [c55]Friman Sánchez, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Long DNA Sequence Comparison on Multicore Architectures. Euro-Par (2) 2010: 247-259 - [c54]Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé:
Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors. HiPEAC 2010: 96-110 - [c53]Nikola Vujic, Marc González, Felipe Cabarcas, Alex Ramírez, Xavier Martorell, Eduard Ayguadé:
DMA++: on the fly data realignment for on-chip memories. HPCA 2010: 1-12 - [c52]Augusto Vega, Alejandro Rico, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Comparing last-level cache designs for CMP architectures. IFMT 2010: 2:1-2:11 - [c51]Milan Pavlovic, Yoav Etsion, Alex Ramírez:
Can Manycores Support the Memory Requirements of Scientific Applications? ISCA Workshops 2010: 65-76 - [c50]Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramírez, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero:
Task Superscalar: An Out-of-Order Task Pipeline. MICRO 2010: 89-100 - [c49]Catalin Bogdan Ciobanu, Georgi Kuzmanov, Georgi Gaydadjiev, Alex Ramírez:
A Polymorphic Register File for matrix operations. ICSAMOS 2010: 241-249 - [c48]Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramírez:
Interleaving granularity on high bandwidth memory architecture for CMPs. ICSAMOS 2010: 250-257 - [c47]Richard A. Aló, Diane Baxter, Karl Barnes, Al Kuslikis, Geoffrey C. Fox, Alex Ramírez:
Advancing Computational Science, Visualization and Homeland Security Research/ Education at Minority Serving Institutions National Model Promoted/ Implemented by MSI-CIEC (Minority Serving Institutions-CyberInfrastructure Empowerment Coalition). ICCS 2010: 903-912
2000 – 2009
- 2009
- [j19]Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck:
Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA. Rev. Avances en Sistemas Informática 6(1): 219-228 (2009) - [j18]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Rizos Sakellariou, Mateo Valero:
FlexDCP: a QoS framework for CMP architectures. ACM SIGOPS Oper. Syst. Rev. 43(2): 86-96 (2009) - [j17]Alejandro Rico, Alex Ramírez, Mateo Valero:
Available task-level parallelism on the Cell BE. Sci. Program. 17(1-2): 59-76 (2009) - [j16]Pieter Bellens, Josep M. Pérez, Felipe Cabarcas, Alex Ramírez, Rosa M. Badia, Jesús Labarta:
CellSs: Scheduling techniques to better exploit memory hierarchy. Sci. Program. 17(1-2): 77-95 (2009) - [j15]Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero:
DIA: A Complexity-Effective Decoding Architecture. IEEE Trans. Computers 58(4): 448-462 (2009) - [j14]Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Parallel Scalability of Video Decoders. J. Signal Process. Syst. 57(2): 173-194 (2009) - [c46]Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé:
Mapping stream programs onto heterogeneous multiprocessor systems. CASES 2009: 57-66 - [c45]Friman Sánchez, Alex Ramírez, Mateo Valero:
Quantitative analysis of sequence alignment applications on multiprocessor architectures. Conf. Computing Frontiers 2009: 61-70 - [c44]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez:
Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418 - [c43]Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero:
Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS 2009: 236-243 - [c42]Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé:
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors. SAMOS 2009: 12-23 - [c41]Carmelo Acosta, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
Thread to Core Assignment in SMT On-Chip Multiprocessors. SBAC-PAD 2009: 67-74 - 2008
- [j13]Kyle J. Nesbit, Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero, James E. Smith:
Multicore Resource Management. IEEE Micro 28(3): 6-16 (2008) - [c40]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
MLP-Aware Dynamic Cache Partitioning. HiPEAC 2008: 337-352 - [c39]Carmelo Acosta, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
MFLUSH: Handling Long-Latency Loads in SMT On-Chip Multiprocessors. ICPP 2008: 173-181 - [c38]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Analysis of video filtering on the cell processor. ISCAS 2008: 488-491 - [c37]Sebastián Isaza, Friman Sánchez, Georgi Gaydadjiev, Alex Ramírez, Mateo Valero:
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications. SAMOS 2008: 53-64 - [e2]Alex Ramírez, Gianfranco Bilardi, Michael Gschwind:
Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008. ACM 2008, ISBN 978-1-60558-077-7 [contents] - 2007
- [j12]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
Explaining Dynamic Cache Partitioning Speed Ups. IEEE Comput. Archit. Lett. 6(1): 1-4 (2007) - [j11]Oliverio J. Santana, Alex Ramírez, Mateo Valero:
Enlarging Instruction Streams. IEEE Trans. Computers 56(10): 1342-1357 (2007) - [j10]Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam:
High-Performance Embedded Architecture and Compilation Roadmap. Trans. High Perform. Embed. Archit. Compil. 1: 5-29 (2007) - [c36]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
MLP-Aware Dynamic Cache Partitioning. PACT 2007: 418 - [c35]Mauricio Alvarez, Esther Salamí, Alex Ramírez, Mateo Valero:
HD-VideoBench. A Benchmark for Evaluating High Definition Digital Video Applications. IISWC 2007: 120-125 - [c34]Mauricio Alvarez, Esther Salamí, Alex Ramírez, Mateo Valero:
Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications. ISPASS 2007: 62-71 - [c33]Daniel Jiménez-González, Xavier Martorell, Alex Ramírez:
Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications. ISPASS 2007: 210-219 - [c32]Francisco J. Cazorla, Enrique Fernández, Peter M. W. Knijnenburg, Alex Ramírez, Rizos Sakellariou, Mateo Valero:
On the Problem of Minimizing Workload Execution Time in SMT Processors. ICSAMOS 2007: 66-73 - [c31]Paul M. Carpenter, David Ródenas, Xavier Martorell, Alex Ramírez, Eduard Ayguadé:
A Streaming Machine Description and Programming Model. SAMOS 2007: 107-116 - [c30]Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero:
Online Prediction of Applications Cache Utility. ICSAMOS 2007: 169-177 - 2006
- [j9]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Predictable Performance in SMT Processors: Synergy between the OS and SMTs. IEEE Trans. Computers 55(7): 785-799 (2006) - [c29]Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero:
Branch predictor guided instruction decoding. PACT 2006: 202-211 - [c28]Friman Sánchez, Esther Salamí, Alex Ramírez, Mateo Valero:
Performance Analysis of Sequence Alignment Applications. IISWC 2006: 51-60 - 2005
- [j8]Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero:
Better Branch Prediction Through Prophet/Critic Hybrids. IEEE Micro 25(1): 80-89 (2005) - [j7]Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
Software Trace Cache. IEEE Trans. Computers 54(1): 22-35 (2005) - [c27]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Architectural support for real-time task scheduling in SMT processors. CASES 2005: 166-176 - [c26]Carmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero:
A Complexity-Effective Simultaneous Multithreading Architecture. ICPP 2005: 157-164 - [c25]Ayose Falcón, Alex Ramírez, Mateo Valero:
Effective Instruction Prefetching via Fetch Prestaging. IPDPS 2005 - [c24]Oliverio J. Santana, Alex Ramírez, Mateo Valero:
Multiple Stream Prediction. ISHPC 2005: 1-16 - [c23]Friman Sánchez, Mauricio Alvarez, Esther Salamí, Alex Ramírez, Mateo Valero:
On the Scalability of 1- and 2-Dimensional SIMD Extensions for Multimedia Applications. ISPASS 2005: 167-176 - [e1]Nader Bagherzadeh, Mateo Valero, Alex Ramírez:
Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005. ACM 2005, ISBN 1-59593-019-1 [contents] - 2004
- [j6]Ayose Falcón, Oliverio J. Santana, Alex Ramírez, Mateo Valero:
A latency-conscious SMT branch prediction architecture. Int. J. High Perform. Comput. Netw. 2(1): 11-21 (2004) - [j5]Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández:
Optimising long-latency-load-aware fetch policies for SMT processors. Int. J. High Perform. Comput. Netw. 2(1): 45-54 (2004) - [j4]Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández:
QoS for High-Performance SMT Processors in Embedded Systems. IEEE Micro 24(4): 24-31 (2004) - [j3]Oliverio J. Santana, Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
A low-complexity fetch architecture for high-performance superscalar processors. ACM Trans. Archit. Code Optim. 1(2): 220-245 (2004) - [c22]Oliverio J. Santana, Alex Ramírez, Mateo Valero:
Reducing Fetch Architecture Complexity Using Procedure Inlining. Interaction between Compilers and Computer Architectures 2004: 97-106 - [c21]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Predictable performance in SMT processors. Conf. Computing Frontiers 2004: 433-443 - [c20]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Implicit vs. Explicit Resource Allocation in SMT Processors. DSD 2004: 44-51 - [c19]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Feasibility of QoS for SMT. Euro-Par 2004: 535-540 - [c18]Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Enabling SMT for real-time embedded systems. EUSIPCO 2004: 1341-1344 - [c17]Ayose Falcón, Alex Ramírez, Mateo Valero:
A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors. HPCA 2004: 244-253 - [c16]Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández:
DCache Warn: An I-Fetch Policy to Increase SMT Efficiency. IPDPS 2004 - [c15]Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero:
Prophet/Critic Hybrid Branch Prediction. ISCA 2004: 250-263 - [c14]Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández:
Dynamically Controlled Resource Allocation in SMT Processors. MICRO 2004: 171-182 - 2003
- [c13]Francisco J. Cazorla, Enrique Fernández, Alex Ramírez, Mateo Valero:
Improving Memory Latency Aware Fetch Policies for SMT Processors. ISHPC 2003: 70-85 - [c12]Ayose Falcón, Oliverio J. Santana, Alex Ramírez, Mateo Valero:
Tolerating Branch Predictor Latency on SMT. ISHPC 2003: 86-98 - 2002
- [b1]Alex Ramírez:
High performance instruction fetch using software and hardware co-design. Polytechnic University of Catalonia, Spain, 2002 - [j2]Alex Ramírez, Josep Lluís Larriba-Pey, Carlos Navarro, Mateo Valero, Josep Torrellas:
Software Trace Cache for Commercial Applications. Int. J. Parallel Program. 30(5): 373-395 (2002) - [c11]Hans Vandierendonck, Alex Ramírez, Koenraad De Bosschere, Mateo Valero:
A Comparative Study of Redundancy in Trace Caches (Research Note). Euro-Par 2002: 512-516 - [c10]Oliverio J. Santana, Ayose Falcón, Enrique Fernández, Pedro Medina, Alex Ramírez, Mateo Valero:
A Comprehensive Analysis of Indirect Branch Prediction. ISHPC 2002: 133-145 - [c9]Ayose Falcón, Oliverio J. Santana, Pedro Medina, Enrique Fernández, Alex Ramírez, Mateo Valero:
Studying New Ways for Improving Adaptive History Length Branch Predictors. ISHPC 2002: 271-280 - [c8]Alex Ramírez, Oliverio J. Santana, Josep Lluís Larriba-Pey, Mateo Valero:
Fetching instruction streams. MICRO 2002: 371-382 - 2001
- [j1]Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
Instruction fetch architectures and code layout optimizations. Proc. IEEE 89(11): 1588-1609 (2001) - [c7]Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
Branch Prediction Using Profile Data. Euro-Par 2001: 386-393 - [c6]Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Lluís Larriba-Pey, P. Geoffrey Lowney, Mateo Valero:
Code layout optimizations for transaction processing workloads. ISCA 2001: 155-164 - 2000
- [c5]Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
The Effect of Code Reordering on Branch Prediction. IEEE PACT 2000: 189-198 - [c4]Carlos Navarro, Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
On the Performance of Fetch Engines Running DSS Workloads. Euro-Par 2000: 940-949 - [c3]Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
Trace Cache Redundancy: Red & Blue Traces. HPCA 2000: 325-333
1990 – 1999
- 1999
- [c2]Alex Ramírez, Josep Lluís Larriba-Pey, Carlos Navarro, Xavi Serrano, Mateo Valero, Josep Torrellas:
Optimization of Instruction Fetch for Decision Support Workloads. ICPP 1999: 238-245 - [c1]Alex Ramírez, Josep Lluís Larriba-Pey, Carlos Navarro, Josep Torrellas, Mateo Valero:
Software trace cache. International Conference on Supercomputing 1999: 119-126
Coauthor Index
[c85] [c81] [c78] [c74] [c71] [j28] [j26] [j24] [j23] [j22] [c62] [c60] [c58] [c55] [c52] [c50] [j19] [j18] [j17] [j15] [c45] [c43] [c41] [j13] [c40] [c39] [c37] [j12] [j11] [c36] [c35] [c34] [c32] [c30] [j9] [c29] [c28] [j8] [j7] [c27] [c26] [c25] [c24] [c23] [e1] [j6] [j5] [j4] [j3] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [j2] [c11] [c10] [c9] [c8] [j1] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
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