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Yang Hu 0001
Person information
- unicode name: 胡杨
- affiliation: Tsinghua University, School of integrated circuits, China
- affiliation (former): University of Texas at Dallas, Department of Electrical and Computer Engineering, Richardson, TX, USA
- affiliation (former): University of Florida, Department of Electrical and Computer Engineering, Gainesville, FL, USA
Other persons with the same name
- Yang Hu — disambiguation page
- Yang Hu 0002 — Beijing Jiaotong University, School of Mechanical, Electronic and Control Engineering, China
- Yang Hu 0003 — Science and Technology on Complex Aviation System Simulation Laboratory, Beijing, China (and 1 more)
- Yang Hu 0004 — Loughborough University, UK (and 1 more)
- Yang Hu 0005 — City University of Hong Kong, Department of Electronic Engineering, Hong Kong
- Yang Hu 0006 — University of Science and Technology of China, School of Information Science and Technology, Hefei, China (and 3 more)
- Yang Hu 0007 — Huazhong University of Science and Technology, Wuhan National Laboratory for Optoelectronics, China
- Yang Hu 0008 — Harbin Institute of Technology, School of Life Science and Technology, China (and 2 more)
- Yang Hu 0009 — North China Electric Power University, School of Control and Computer Engineering, Beijing, China
- Yang Hu 0010 — Huazhong University of Science and Technology, Wuhan, China
- Yang Hu 0011 — Imperial College London, Hamlyn Centre for Robotic Surgery, UK
- Yang Hu 0012 — Beijing Forestry University, College of Forestry, China
- Yang Hu 0013 — University of Amsterdam, Institute for Informatics, The Netherlands (and 1 more)
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2020 – today
- 2024
- [j17]Fengbin Tu, Zihan Wu, Yiqi Wang, Weiwei Wu, Leibo Liu, Yang Hu, Shaojun Wei, Shouyi Yin:
MulTCIM: Digital Computing-in-Memory-Based Multimodal Transformer Accelerator With Attention-Token-Bit Hybrid Sparsity. IEEE J. Solid State Circuits 59(1): 90-101 (2024) - [j16]Ruiqi Guo, Xiaofeng Chen, Lei Wang, Yang Wang, Hao Sun, Jingchuan Wei, Huiming Han, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
CIMFormer: A Systolic CIM-Array-Based Transformer Accelerator With Token-Pruning-Aware Attention Reformulating and Principal Possibility Gathering. IEEE J. Solid State Circuits 59(10): 3317-3329 (2024) - [j15]Yubin Qin, Yang Wang, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Yang Zhou, Yuanqi Fan, Jingchuan Wei, Tianbao Chen, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
Ayaka: A Versatile Transformer Accelerator With Low-Rank Estimation and Heterogeneous Dataflow. IEEE J. Solid State Circuits 59(10): 3342-3356 (2024) - [j14]Jianda Wang, Zhen Wang, Weili Wu, Yang Hu:
Optimizing the Micro-Architectural Performance of the Current and Emerging Edge Infrastructure. IEEE Trans. Cloud Comput. 12(1): 40-52 (2024) - [c55]Zhiheng Yue, Shaojun Wei, Yang Hu, Shouyi Yin:
CAP: A General Purpose Computation-in-memory with Content Addressable Processing Paradigm. DAC 2024: 22:1-22:6 - [c54]Xujiang Xiang, Zhiheng Yue, Yuxuan Li, Liuxin Lv, Shaojun Wei, Yang Hu, Shouyi Yin:
Dyn-Bitpool: A Two-sided Sparse CIM Accelerator Featuring a Balanced Workload Scheme and High CIM Macro Utilization. DAC 2024: 35:1-35:6 - [c53]Zheng Xu, Xu Dai, Shaojun Wei, Shouyi Yin, Yang Hu:
GSPO: A Graph Substitution and Parallelization Joint Optimization Framework for DNN Inference. DAC 2024: 214:1-214:6 - [c52]Xiaolong Yang, Yang Wang, Yubin Qin, Jiachen Wang, Shaojun Wei, Yang Hu, Shouyi Yin:
FQP: A Fibonacci Quantization Processor with Multiplication-Free Computing and Topological-Order Routing. DAC 2024: 230:1-230:6 - [c51]Xiaofeng Hou, Tongqiao Xu, Chao Li, Cheng Xu, Jiacheng Liu, Yang Hu, Jieru Zhao, Jingwen Leng, Kwang-Ting Cheng, Minyi Guo:
A Tale of Two Domains: Exploring Efficient Architecture Design for Truly Autonomous Things. ISCA 2024: 167-181 - [c50]Zhiheng Yue, Huizheng Wang, Jiahao Fang, Jinyi Deng, Guangyang Lu, Fengbin Tu, Ruiqi Guo, Yuxuan Li, Yubin Qin, Yang Wang, Chao Li, Huiming Han, Shaojun Wei, Yang Hu, Shouyi Yin:
Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture. ISCA 2024: 396-409 - [c49]Yubin Qin, Yang Wang, Zhiren Zhao, Xiaolong Yang, Yang Zhou, Shaojun Wei, Yang Hu, Shouyi Yin:
MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition. ISCA 2024: 1032-1047 - [c48]Zhiheng Yue, Xujiang Xiang, Fengbin Tu, Yang Wang, Yiming Wang, Shaojun Wei, Yang Hu, Shouyi Yin:
15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch. ISSCC 2024: 276-278 - [c47]Ruiqi Guo, Lei Wang, Xiaofeng Chen, Hao Sun, Zhiheng Yue, Yubin Qin, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu, Shouyi Yin:
20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models. ISSCC 2024: 362-364 - [c46]Yang Wang, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Huiming Han, Shaojun Wei, Yang Hu, Shouyi Yin:
34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications. ISSCC 2024: 566-568 - [c45]Yiqi Wang, Zhen He, Chenggang Zhao, Zihan Wu, Mingyu Gao, Huiming Han, Shaojun Wei, Yang Hu, Fengbin Tu, Shouyi Yin:
ETCIM: An Error-Tolerant Digital-CIM Processor with Redundancy-Free Repair and Run-Time MAC and Cell Error Correction. VLSI Technology and Circuits 2024: 1-2 - [c44]Yang Wang, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Huiming Han, Shaojun Wei, Yang Hu, Shouyi Yin:
A 22nm 54.94TFLOPS/W Transformer Fine-Tuning Processor with Exponent-Stationary Re-Computing, Aggressive Linear Fitting, and Logarithmic Domain Multiplicating. VLSI Technology and Circuits 2024: 1-2 - [c43]Ruiqi Guo, Xiaofeng Chen, Lei Wang, Fengbin Tu, Shaojun Wei, Yang Hu, Shouyi Yin:
A 28nm 4170-TFLOPS/W/b and 195-TFLOPS/mm2/b Multiply-Free Fully-Digital Floating-Point Compute-In-Memory Macro with Mitchell's Approximation. VLSI Technology and Circuits 2024: 1-2 - [c42]Yubin Qin, Yang Wang, Xiaolong Yang, Zhiren Zhao, Shaojun Wei, Yang Hu, Shouyi Yin:
A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication. VLSI Technology and Circuits 2024: 1-2 - [i15]Jinyi Deng, Xinru Tang, Zhiheng Yue, Guangyang Lu, Qize Yang, Jiahao Zhang, Jinxi Li, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin:
Efficient Orchestrated AI Workflows Execution on Scale-out Spatial Architecture. CoRR abs/2405.17221 (2024) - [i14]Jiahao Fang, Huizheng Wang, Qize Yang, Dehao Kong, Xu Dai, Jinyi Deng, Yang Hu, Shouyi Yin:
PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training. CoRR abs/2406.03868 (2024) - [i13]Huizheng Wang, Jiahao Fang, Xinru Tang, Zhiheng Yue, Jinxi Li, Yubin Qin, Sihan Guan, Qize Yang, Yang Wang, Chao Li, Yang Hu, Shouyi Yin:
SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. CoRR abs/2407.10416 (2024) - 2023
- [j13]Jianda Wang, Zhendong Wang, Bo Yu, Jie Tang, Shuaiwen Leon Song, Cong Liu, Yang Hu:
Data Fusion in Infrastructure-Augmented Autonomous Driving System: Why? Where? and How? IEEE Internet Things J. 10(18): 15857-15871 (2023) - [j12]Weiwei Wu, Fengbin Tu, Mengqi Niu, Zhiheng Yue, Leibo Liu, Shaojun Wei, Xiangyu Li, Yang Hu, Shouyi Yin:
STAR: An STGCN ARchitecture for Skeleton-Based Human Action Recognition. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2370-2383 (2023) - [j11]Jianda Wang, Zhen Wang, Yang Hu:
Towards an Efficient SIMD Virtual Radio Access Network (vRAN) and Edge Cloud System. IEEE Trans. Cloud Comput. 11(3): 3226-3238 (2023) - [c41]Xiaofeng Chen, Ruiqi Guo, Zhiheng Yue, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin:
A Systolic Computing-in-Memory Array based Accelerator with Predictive Early Activation for Spatiotemporal Convolutions. AICAS 2023: 1-5 - [c40]Ruiqi Guo, Yang Wang, Xiaofeng Chen, Lei Wang, Hao Sun, Jingchuan Wei, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
CIMFormer: A 38.9TOPS/W-8b Systolic CIM-Array Based Transformer Processor with Token-Slimmed Attention Reformulating and Principal Possibility Gathering. A-SSCC 2023: 1-3 - [c39]Yubin Qin, Yang Wang, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Yang Zhou, Yuanqi Fan, Jingchuan Wei, Tianbao Chen, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
A 28nm 49.7TOPS/W Sparse Transformer Processor with Random-Projection-Based Speculation, Multi-Stationary Dataflow, and Redundant Partial Product Elimination. A-SSCC 2023: 1-3 - [c38]Qidie Wu, Jiangyuan Gu, Youxu Lin, Boxiao Han, Hongjun He, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin:
RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA. DAC 2023: 1-6 - [c37]Yubin Qin, Yang Wang, Dazheng Deng, Zhiren Zhao, Xiaolong Yang, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction. ISCA 2023: 22:1-22:14 - [c36]Zhiheng Yue, Yang Wang, Huizheng Wang, Yabing Wang, Ruiqi Guo, Limei Tang, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction. ISSCC 2023: 138-139 - [c35]Fengbin Tu, Zihan Wu, Yiqi Wang, Weiwei Wu, Leibo Liu, Yang Hu, Shaojun Wei, Shouyi Yin:
MuITCIM: A 28nm $2.24 \mu\mathrm{J}$/Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal Transformers. ISSCC 2023: 248-249 - [c34]Fengbin Tu, Yiqi Wang, Zihan Wu, Weiwei Wu, Leibo Liu, Yang Hu, Shaojun Wei, Shouyi Yin:
TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration. ISSCC 2023: 254-255 - [c33]Jinyi Deng, Xinru Tang, Jiahao Zhang, Yuxuan Li, Linyun Zhang, Boxiao Han, Hongjun He, Fengbin Tu, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane. MICRO 2023: 1395-1408 - [c32]Yang Wang, Yubin Qin, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing. VLSI Technology and Circuits 2023: 1-2 - [i12]Shitong Shao, Xu Dai, Shouyi Yin, Lujun Li, Huanran Chen, Yang Hu:
Catch-Up Distillation: You Only Need to Train Once for Accelerating Sampling. CoRR abs/2305.10769 (2023) - [i11]Jinyi Deng, Xinru Tang, Jiahao Zhang, Yuxuan Li, Linyun Zhang, Fengbin Tu, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin:
Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane. CoRR abs/2307.02847 (2023) - [i10]Haojia Hui, Jiangyuan Gu, Xunbo Hu, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin:
WindMill: A Parameterized and Pluggable CGRA Implemented by DIAG Design Flow. CoRR abs/2309.01273 (2023) - [i9]Yang Hu, Xinhan Lin, Huizheng Wang, Zhen He, Xingmao Yu, Jiahao Zhang, Qize Yang, Zheng Xu, Sihan Guan, Jiahao Fang, Haoran Shang, Xinru Tang, Xu Dai, Shaojun Wei, Shouyi Yin:
Wafer-scale Computing: Advancements, Challenges, and Future Perspectives. CoRR abs/2310.09568 (2023) - 2022
- [j10]Yuqiong Qi, Yang Hu, Haibin Wu, Shen Li, Xiaochun Ye, Dongrui Fan:
A synergistic reinforcement learning-based framework design in driving automation. Comput. Electr. Eng. 101: 107989 (2022) - [c31]Xiaoming Zeng, Zhendong Wang, Yang Hu:
Enabling efficient deep convolutional neural network-based sensor fusion for autonomous driving. DAC 2022: 283-288 - [c30]Shaoshan Liu, Jianda Wang, Zhendong Wang, Bo Yu, Wei Hu, Yahui Liu, Jie Tang, Shuaiwen Leon Song, Cong Liu, Yang Hu:
Brief Industry Paper: The Necessity of Adaptive Data Fusion in Infrastructure-Augmented Autonomous Driving System. RTAS 2022: 293-296 - [i8]Xiaoming Zeng, Zhendong Wang, Yang Hu:
Enabling Efficient Deep Convolutional Neural Network-based Sensor Fusion for Autonomous Driving. CoRR abs/2202.11231 (2022) - [i7]Zhendong Wang, Yang Hu:
Towards a High-performance and Secure Memory System and Architecture for Emerging Applications. CoRR abs/2205.04002 (2022) - [i6]Shaoshan Liu, Jianda Wang, Zhendong Wang, Bo Yu, Wei Hu, Yahui Liu, Jie Tang, Shuaiwen Leon Song, Cong Liu, Yang Hu:
Brief Industry Paper: The Necessity of Adaptive Data Fusion in Infrastructure-Augmented Autonomous Driving System. CoRR abs/2207.00737 (2022) - [i5]Zhendong Wang, Xiaoming Zeng, Xulong Tang, Danfeng Zhang, Xing Hu, Yang Hu:
Demystifying Arch-hints for Model Extraction: An Attack in Unified Memory System. CoRR abs/2208.13720 (2022) - [i4]Zhendong Wang, Xiaoming Zeng, Shuaiwen Leon Song, Yang Hu:
Towards Efficient Architecture and Algorithms for Sensor Fusion. CoRR abs/2209.06272 (2022) - 2021
- [c29]Chenhao Xie, Xie Li, Yang Hu, Huwan Peng, Michael B. Taylor, Shuaiwen Leon Song:
Q-VR: system-level design for future mobile collaborative virtual reality. ASPLOS 2021: 587-599 - [c28]Zhendong Wang, Rujia Wang, Zihang Jiang, Xulong Tang, Shouyi Yin, Yang Hu:
Towards a Secure Integrated Heterogeneous Platform via Cooperative CPU/GPU Encryption. ATS 2021: 115-120 - [c27]Zhen Wang, Jianda Wang, Zhendong Wang, Yang Hu:
Characterization and Implication of Edge WebAssembly Runtimes. HPCC/DSS/SmartCity/DependSys 2021: 71-80 - [c26]Jianda Wang, Yang Hu:
Enabling Efficient SIMD Acceleration for Virtual Radio Access Network. ICPP 2021: 63:1-63:10 - [i3]Chenhao Xie, Xie Li, Yang Hu, Huwan Peng, Michael B. Taylor, Shuaiwen Leon Song:
Q-VR: System-Level Design for Future Mobile Collaborative Virtual Reality. CoRR abs/2102.13191 (2021) - [i2]Yuqiong Qi, Yang Hu, Haibin Wu, Shen Li, Haiyu Mao, Xiaochun Ye, Dongrui Fan, Ninghui Sun:
Tackling Variabilities in Autonomous Driving. CoRR abs/2104.10415 (2021) - 2020
- [j9]Liwei Zhou, Yang Hu, Yiorgos Makris:
A Hardware-Based Architecture-Neutral Framework for Real-Time IoT Workload Forensics. IEEE Trans. Computers 69(11): 1668-1680 (2020) - [j8]Zhendong Wang, Zihang Jiang, Zhen Wang, Xulong Tang, Cong Liu, Shouyi Yin, Yang Hu:
Enabling Latency-Aware Data Initialization for Integrated CPU/GPU Heterogeneous Platform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3433-3444 (2020) - [c25]Zhendong Wang, Zhen Wang, Cong Liu, Yang Hu:
Understanding and Tackling the Hidden Memory Latency for Edge-based Heterogeneous Platform. HotEdge 2020 - [c24]Jianda Wang, Yang Hu:
Performance Analysis of 5G NR vRAN Platform and its Implications on Edge Computing. ISPASS 2020: 215-217 - [c23]Soroush Bateni, Zhendong Wang, Yuankun Zhu, Yang Hu, Cong Liu:
Co-Optimizing Performance and Memory Footprint Via Integrated CPU/GPU Memory Management, an Implementation on Autonomous Driving Platform. RTAS 2020: 310-323 - [c22]Xiaofeng Hou, Chao Li, Jiacheng Liu, Lu Zhang, Yang Hu, Minyi Guo:
ANT-man: towards agile power management in the microservice era. SC 2020: 78 - [i1]Soroush Bateni, Zhendong Wang, Yuankun Zhu, Yang Hu, Cong Liu:
Co-Optimizing Performance and Memory FootprintVia Integrated CPU/GPU Memory Management, anImplementation on Autonomous Driving Platform. CoRR abs/2003.07945 (2020)
2010 – 2019
- 2019
- [c21]Guy Maor, Xiaoming Zeng, Zhendong Wang, Yang Hu:
An FPGA Implementation of Stochastic Computing-Based LSTM. ICCD 2019: 38-46 - [c20]Yang Hu, Jianda Wang:
Architectural and Cost Implications of the 5G Edge NFV Systems. ICCD 2019: 594-603 - [c19]Lu Zhang, Chao Li, Pengyu Wang, Yunxin Liu, Yang Hu, Quan Chen, Minyi Guo:
Characterizing and orchestrating NFV-ready servers for efficient edge data processing. IWQoS 2019: 22:1-22:10 - [c18]Jianda Wang, Yang Hu:
Characterizing and Understanding the Architectural Implications of Cloudnative Edge NFV Workloads. NFV-SDN 2019: 1-7 - 2018
- [j7]Siyang Li, Fenlin Liu, Jiwu Shu, Youyou Lu, Tao Li, Yang Hu:
A Flattened Metadata Service for Distributed File Systems. IEEE Trans. Parallel Distributed Syst. 29(12): 2641-2657 (2018) - [j6]Longjun Liu, Hongbin Sun, Chao Li, Yang Hu, Tao Li, Nanning Zheng:
Exploring Customizable Heterogeneous Power Distribution and Management for Datacenter. IEEE Trans. Parallel Distributed Syst. 29(12): 2798-2813 (2018) - [c17]Yang Hu, Tao Li:
Enabling Efficient Network Service Function Chain Deployment on Heterogeneous Server Platform. HPCA 2018: 27-39 - [c16]Mingcong Song, Kan Zhong, Jiaqi Zhang, Yang Hu, Duo Liu, Weigong Zhang, Jing Wang, Tao Li:
In-Situ AI: Towards Autonomous and Incremental Deep Learning for IoT Systems. HPCA 2018: 92-103 - [c15]Mingcong Song, Jiechen Zhao, Yang Hu, Jiaqi Zhang, Tao Li:
Prediction Based Execution on Deep Neural Networks. ISCA 2018: 752-763 - 2017
- [j5]Chao Li, Yang Hu, Juncheng Gu, Jingling Yuan, Tao Li:
Oasis: Scaling Out Datacenter Sustainably and Economically. IEEE Trans. Parallel Distributed Syst. 28(7): 1960-1973 (2017) - [c14]Yang Hu, Mingcong Song, Tao Li:
Towards "Full Containerization" in Containerized Network Function Virtualization. ASPLOS 2017: 467-481 - [c13]Mingcong Song, Yang Hu, Huixiang Chen, Tao Li:
Towards Pervasive and User Satisfactory CNN across GPU Microarchitectures. HPCA 2017: 1-12 - [c12]Huixiang Chen, Meng Wang, Yang Hu, Mingcong Song, Tao Li:
GaaS workload characterization under NUMA architecture for virtualized GPU. ISPASS 2017: 65-76 - [c11]Siyang Li, Youyou Lu, Jiwu Shu, Yang Hu, Tao Li:
LocoFS: a loosely-coupled metadata service for distributed file systems. SC 2017: 4 - 2016
- [j4]Longjun Liu, Hongbin Sun, Chao Li, Yang Hu, Jingmin Xin, Nanning Zheng, Tao Li:
RE-UPS: an adaptive distributed energy storage system for dynamically managing solar energy in green datacenters. J. Supercomput. 72(1): 295-316 (2016) - [c10]Mingcong Song, Yang Hu, Yunlong Xu, Chao Li, Huixiang Chen, Jingling Yuan, Tao Li:
Bridging the Semantic Gaps of GPU Acceleration for Scale-out CNN-based Big Data Processing: Think Big, See Small. PACT 2016: 315-326 - [c9]Yang Hu, Chao Li, Longjun Liu, Tao Li:
HOPE: Enabling Efficient Service Orchestration in Software-Defined Data Centers. ICS 2016: 10:1-10:12 - [c8]Longjun Liu, Hongbin Sun, Chao Li, Yang Hu, Nanning Zheng, Tao Li:
Towards an Adaptive Multi-Power-Source Datacenter. ICS 2016: 11:1-11:11 - [c7]Yang Hu, Tao Li:
Towards efficient server architecture for virtualized network function deployment: Implications and implementations. MICRO 2016: 8:1-8:12 - 2015
- [j3]Longjun Liu, Chao Li, Hongbin Sun, Yang Hu, Jingmin Xin, Nanning Zheng, Tao Li:
Leveraging Heterogeneous Power for Improving Datacenter Efficiency and Resiliency. IEEE Comput. Archit. Lett. 14(1): 41-45 (2015) - [c6]Longjun Liu, Chao Li, Hongbin Sun, Yang Hu, Juncheng Gu, Tao Li:
BAAT: Towards Dynamically Managing Battery Aging in Green Datacenters. DSN 2015: 307-318 - [c5]Chao Li, Yang Hu, Longjun Liu, Juncheng Gu, Mingcong Song, Xiaoyao Liang, Jingling Yuan, Tao Li:
Towards sustainable in-situ server systems in the big data era. ISCA 2015: 14-26 - [c4]Longjun Liu, Chao Li, Hongbin Sun, Yang Hu, Juncheng Gu, Tao Li, Jingmin Xin, Nanning Zheng:
HEB: deploying and managing hybrid energy buffers for improving datacenter efficiency and economy. ISCA 2015: 463-475 - 2014
- [j2]Chao Li, Rui Wang, Yang Hu, Ruijin Zhou, Ming Liu, Longjun Liu, Jingling Yuan, Tao Li, Depei Qian:
Towards Automated Provisioning and Emergency Handling in Renewable Energy Powered Datacenters. J. Comput. Sci. Technol. 29(4): 618-630 (2014) - [c3]Longjun Liu, Hongbin Sun, Yang Hu, Jingmin Xin, Nanning Zheng, Tao Li:
Leveraging distributed UPS energy for managing solar energy powered data centers. IGCC 2014: 1-8 - 2013
- [c2]Chao Li, Yang Hu, Ruijin Zhou, Ming Liu, Longjun Liu, Jingling Yuan, Tao Li:
Enabling datacenter servers to scale out economically and sustainably. MICRO 2013: 322-333 - 2012
- [j1]Shouyi Yin, Yang Hu, Zhen Zhang, Leibo Liu, Shaojun Wei:
Hybrid Wired/Wireless On-Chip Network Design for Application-Specific SoC. IEICE Trans. Electron. 95-C(4): 495-505 (2012) - 2010
- [c1]Yang Hu, Shouyi Yin, Leibo Liu, Shaojun Wei:
Mixed-level modeling for network on chip infrastructure in SoC design. APCCAS 2010: 911-914
Coauthor Index
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