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ORCIDYong Lim
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2020 – today
- 2024
[j6]Jaehong Jung
, Seunghyun Oh, Joomyoung Kim, Jinhyeon Lee, Wonkang Kim, Euiyoung Park, Seungyong Bae, Seungjin Kim, Jaehoon Lee, Yelim Youn, Yeongcheol Jeong, Sungsik Park, Kyungsoo Lee, Yong Lim, Junho Huh, Jongwoo Lee:
A Fully Integrated, Low-Noise, Cost-Effective Single-Crystal-Oscillator-Based Clock Management IC in 28-nm CMOS. IEEE J. Solid State Circuits 59(6): 1809-1822 (2024)- [c15]Yong Lim, Jaehoon Lee, Jongmi Lee, Kwangmin Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak:
9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nm. ISSCC 2024: 170-172 - [c14]Jongmi Lee, Seong-Eun Cho, Jaehoon Lee, Yong Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak:
9.6 A 6th-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nm. ISSCC 2024: 178-180 - 2023
- [c13]Hwaran Lee, Seokhee Hong, Joonsuk Park, Takyoung Kim, Meeyoung Cha, Yejin Choi, Byoung Pil Kim, Gunhee Kim, Eun-Ju Lee, Yong Lim, Alice Oh, Sangchul Park, Jung-Woo Ha:
SQuARe: A Large-Scale Dataset of Sensitive Questions and Acceptable Responses Created through Human-Machine Collaboration. ACL (1) 2023: 6692-6712 - [c12]Junghyun Yoon, Moon Hyung Jang, Changuk Lee, Yong Lim, Youngcheol Chae:
A 243μW 97.4dB-DR 50kHz-BW Multi-Rate CT Zoom ADC with Inherent DAC Mismatch Tolerance. CICC 2023: 1-2 - [i1]Hwaran Lee, Seokhee Hong, Joonsuk Park, Takyoung Kim, Meeyoung Cha, Yejin Choi, Byoung Pil Kim, Gunhee Kim, Eun-Ju Lee, Yong Lim, Alice Oh, Sangchul Park, Jung-Woo Ha:
SQuARe: A Large-Scale Dataset of Sensitive Questions and Acceptable Responses Created Through Human-Machine Collaboration. CoRR abs/2305.17696 (2023) - 2022
- [j5]Barosaim Sung, Hyun-Gi Seok, Jaekwon Kim, Jaehoon Lee, Taejin Jang, Ilhoon Jang, Youngmin Kim, Anna Yu, Jong-Hyun Jang, Jiyoung Lee, Jeongyeol Bae, Euiyoung Park, Sung-Jun Lee, Seokwon Lee, Joohan Kim, Beomkon Kim, Yong Lim, Seunghyun Oh, Jongwoo Lee:
A Single Path Digital-IF Receiver Supporting Inter/Intra 5-CA With a Single Integer LO-PLL in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 57(12): 3646-3655 (2022) - [c11]Woojin Jang, Gyeong-Gu Kang, Yong Lim, Hyun-Sik Kim:
A Pipeline ADC with Negative C-assisted SC Amplifier Canceling Gain Error and Nonlinearity. ESSCIRC 2022: 317-320 - [c10]Jaehong Jung, Seunghyun Oh, Joo-Myoung Kim, Gihyeok Ha, Jinhyeon Lee, Seungjin Kim, Euiyoung Park, Jaehoon Lee, Yelim Yoon, Seungyong Bae, Wonkang Kim, Yong Lim, Kyungsoo Lee, Junho Huh, Jongwoo Lee, Thomas Byunghak Cho:
A Single-Crystal-Oscillator-Based Clock-Management IC with 18× Start-Up Time Reduction and 0.68ppm/ºC Duty-Cycled Machine-Learning-Based RCO Calibration. ISSCC 2022: 58-60 - [c9]Barosaim Sung, Hyun-Gi Seok, Jaekwon Kim, Jaehoon Lee, Taejin Jang, Ilhoon Jang, Youngmin Kim, Anna Yu, Jong-Hyun Jang, Jiyoung Lee, Jeongyeol Bae, Euiyoung Park, Sung-Jun Lee, Seokwon Lee, Joohan Kim, Beomkon Kim, Yong Lim, Seunghyun Oh, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang:
A Single-Path Digital-IF Receiver Supporting Inter/Intra 5-CA with a Single Integer LO-PLL in 14nm CMOS FinFET. ISSCC 2022: 440-442 - [c8]Jaehoon Lee, Yong Lim, Jongmi Lee, Taejin Jang, Kwonwoo Kang, Jongpil Cho, Seunghyun Oh, Jongwoo Lee:
A 0.56mW 63.6dB SNDR 250MS/s SAR ADC in 8nm FinFET. VLSI Technology and Circuits 2022: 90-92 - [p1]Sangchul Park, Yong Lim, Haksoo Ko:
Data Governance and Trust: Lessons from South Korean Experiences Coping with COVID-19. The Cambridge Handbook of Responsible Artificial Intelligence 2022: 309-328 - 2021
- [c7]Chilun Lo, Jongmi Lee, Yong Lim, Younghyun Yoon, Hyunseok Hwang, Jaehoon Lee, Moo-Yeol Choi, Myungjin Lee, Seunghyun Oh, Jongwoo Lee:
10.1 A 116μ W 104.4dB-DR 100.6dB-SNDR CT Δ∑ Audio ADC Using Tri-Level Current-Steering DAC with Gate-Leakage Compensated Off-Transistor-Based Bias Noise Filter. ISSCC 2021: 164-166 - 2020
- [c6]Jaehoon Lee, Yong Lim, Barosaim Sung, Seunghyun Oh, Jung-Hoon Chun, Jongwoo Lee:
An Effective Transconductance Controlled Offset Calibration for Dynamic Comparators. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c5]Barosaim Sung, Chilun Lo, Jaehoon Lee, Sangdon Jung, Seungjin Kim, Jaehong Jung, Seungyong Bae, Youngsea Cho, Yong Lim, Dooseok Choi, Myeongcheol Shin, Soonwoo Choi, Byungki Han, Seunghyun Oh, Jongwoo Lee:
A Blocker-Tolerant Direct Sampling Receiver for Wireless Multi-Channel Communication in 14nm FinFET CMOS. A-SSCC 2019: 165-168 - 2017
- [j4]John Bell, Phil Knag, Shuanghong Sun, Yong Lim, Thomas Chen, Jeffrey Fredenburg, Chia-Hsiang Chen, Chunyang Zhai, Aaron Z. Rocca, Nicholas Collins, Andres Tamez, Jorge Pernillo, Justin M. Correll, Alan B. Tanner, Zhengya Zhang, Michael P. Flynn:
A 1.5-GHz 6.144T Correlations/s 64 × 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging. IEEE J. Solid State Circuits 52(5): 1450-1457 (2017) - 2016
- [c4]Fred N. Buhler, Adam E. Mendrela, Yong Lim, Jeffrey A. Fredenburg, Michael P. Flynn:
A 16-channel noise-shaping machine learning analog-digital interface. VLSI Circuits 2016: 1-2 - 2015
- [j3]Yong Lim, Michael P. Flynn:
A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers. IEEE J. Solid State Circuits 50(10): 2331-2341 (2015) - [j2]Yong Lim, Michael P. Flynn:
A 1 mW 71.5 dB SNDR 50 MS/s 13 bit Fully Differential Ring Amplifier Based SAR-Assisted Pipeline ADC. IEEE J. Solid State Circuits 50(12): 2901-2911 (2015) - [c3]Yong Lim, Michael P. Flynn:
26.1 A 1mW 71.5dB SNDR 50MS/S 13b fully differential ring-amplifier-based SAR-assisted pipeline ADC. ISSCC 2015: 1-3 - 2014
- [c2]Yong Lim, Michael P. Flynn:
11.5 A 100MS/s 10.5b 2.46mW comparator-less pipeline ADC using self-biased ring amplifiers. ISSCC 2014: 202-203 - 2010
- [c1]Yong Lim, Kyoungmin Koh, Kyungmin Kim, Han Yang, Juha Kim, Youngkyun Jeong, Seungjin Lee, Hansoo Lee, Sin-Hwan Lim, Yunseok Han, Jinwoo Kim, Jaecheol Yun, Seogheon Ham, Yun-Tae Lee:
A 1.1e- temporal noise 1/3.2-inch 8Mpixel CMOS image sensor using pseudo-multiple sampling. ISSCC 2010: 396-397
1980 – 1989
- 1985
- [j1]Yong Lim:
An interpolation technique for computing the DFT of a sparse sequence. IEEE Trans. Acoust. Speech Signal Process. 33(6): 1456-1460 (1985)
Coauthor Index
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