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ORCIDSalvador Petit
Salvador Petit Marti
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- affiliation: Polytechnic University of Valencia, Spain
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2020 – today
- 2024
[j46]Lucia Pons, Marta Navarro, Salvador Petit, Julio Pons, María Engracia Gómez, Julio Sahuquillo:
Smt efficiency in supervised ML methods: a throughput and interference analysis. J. Big Data 11(1): 152 (2024)- [j45]Lucia Pons, Salvador Petit, Julio Pons
, María Engracia Gómez, Julio Sahuquillo:
A modular approach to build a hardware testbed for cloud resource management research. J. Supercomput. 80(8): 10552-10583 (2024) - [c63]Marta Navarro, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
SYNPA: SMT Performance Analysis and Allocation of Threads to Cores in ARM Processors. IPDPS 2024: 705-715 - [c62]Ibai Calero, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Characterizing Power and Performance Interference Scalability in the 28-core ARM ThunderX2. PDP 2024: 143-147 - 2023
- [j44]Lucia Pons, Josué Feliu, Julio Sahuquillo, María Engracia Gómez, Salvador Petit, Julio Pons, Chaoyi Huang:
Cloud White: Detecting and Estimating QoS Degradation of Latency-Critical Workloads in the Public Cloud. Future Gener. Comput. Syst. 138: 13-25 (2023) - [j43]Miguel A. Avargues, Manel Lurbe, Salvador Petit, María Engracia Gómez, Rui Yang, Xiaoping Zhu, Guanhao Wang, Julio Sahuquillo:
Main memory controller with multiple media technologies for big data workloads. J. Big Data 10(1): 75 (2023) - [c61]Marta Navarro, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Thread-to-Core Allocation in ARM Processors Building Synergistic Pairs. PACT 2023: 335-336 - [c60]Lucia Pons, Salvador Petit, Julio Pons, María Engracia Gómez, Chaoyi Huang, Julio Sahuquillo:
Stratus: A Hardware/Software Infrastructure for Controlled Cloud Research. PDP 2023: 299-306 - [i2]Marta Navarro, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
SYNPA: SMT Performance Analysis and Allocation of Threads to Cores in ARM Processors. CoRR abs/2310.12786 (2023) - 2022
- [j42]Lucia Pons, Josué Feliu, José Puche, Chaoyi Huang, Salvador Petit, Julio Pons, María Engracia Gómez, Julio Sahuquillo:
Effect of Hyper-Threading in Latency-Critical Multithreaded Cloud Applications and Utilization Analysis of the Major System Resources. Future Gener. Comput. Syst. 131: 194-208 (2022) - [j41]Josué Feliu, Ajeya Naithani, Julio Sahuquillo, Salvador Petit, Moinuddin K. Qureshi, Lieven Eeckhout:
VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors. IEEE Trans. Computers 71(6): 1386-1398 (2022) - [j40]Manel Lurbe, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
DeepP: Deep Learning Multi-Program Prefetch Configuration for the IBM POWER 8. IEEE Trans. Computers 71(10): 2646-2658 (2022) - [c59]Lucia Pons, Julio Sahuquillo, Salvador Petit, Julio Pons:
Cache-Poll: Containing Pollution in Non-Inclusive Caches Through Cache Partitioning. ICPP 2022: 33:1-33:11 - [c58]Hugo Tárrega, Alejandro Valero, Vicente Lorente, Salvador Petit, Julio Sahuquillo:
Fast-track cache: a huge racetrack memory L1 data cache. ICS 2022: 23:1-23:12 - [c57]Manel Lurbe, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
A Neural Network to Estimate Isolated Performance from Multi-Program Execution. PDP 2022: 63-66 - 2021
- [j39]Jose Duro, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Segment Switching: A New Switching Strategy for Optical HPC Networks. IEEE Access 9: 43095-43106 (2021) - 2020
- [j38]José Puche, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
An efficient cache flat storage organization for multithreaded workloads for low power processors. Future Gener. Comput. Syst. 110: 1037-1054 (2020) - [j37]Josué Feliu, Julio Sahuquillo, Salvador Petit, Lieven Eeckhout:
Thread Isolation to Improve Symbiotic Scheduling on SMT Multicore Processors. IEEE Trans. Parallel Distributed Syst. 31(2): 359-373 (2020) - [j36]Carlos Navarro, Josué Feliu, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Bandwidth-Aware Dynamic Prefetch Configuration for IBM POWER8. IEEE Trans. Parallel Distributed Syst. 31(8): 1970-1982 (2020) - [j35]Lucia Pons, Julio Sahuquillo, Vicent Selfa, Salvador Petit, Julio Pons:
Phase-Aware Cache Partitioning to Target Both Turnaround Time and System Performance. IEEE Trans. Parallel Distributed Syst. 31(11): 2556-2568 (2020) - [c56]Eduardo Yago, Pau Castelló, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Impact of the Array Shape and Memory Bandwidth on the Execution Time of CNN Systolic Arrays. DSD 2020: 510-517 - [i1]Lucia Pons, Josué Feliu, José Puche, Chaoyi Huang, Salvador Petit, Julio Pons, María Engracia Gómez, Julio Sahuquillo:
Understanding Cloud Workloads Performance in a Production like Environment. CoRR abs/2010.05031 (2020)
2010 – 2019
- 2019
- [j34]Jose Duro, Jose Antonio Pascual, Salvador Petit, Julio Sahuquillo, María Engracia Gómez:
Modeling and analysis of the performance of exascale photonic networks. Concurr. Comput. Pract. Exp. 31(21) (2019) - [j33]Alejandro Valero, Francisco Candel, Darío Suárez Gracia, Salvador Petit, Julio Sahuquillo:
An Aging-Aware GPU Register File Design Based on Data Redundancy. IEEE Trans. Computers 68(1): 4-20 (2019) - [j32]Francisco Candel, Alejandro Valero, Salvador Petit, Julio Sahuquillo:
Efficient Management of Cache Accesses to Boost GPGPU Memory Subsystem Performance. IEEE Trans. Computers 68(10): 1442-1454 (2019) - [j31]José Puche, Salvador Petit, Julio Sahuquillo, María Engracia Gómez:
FOS: a low-power cache organization for multicores. J. Supercomput. 75(10): 6542-6573 (2019) - [j30]J. Rubén Titos Gil, Antonio Flores, Ricardo Fernández Pascual, Alberto Ros, Salvador Petit, Julio Sahuquillo, Manuel E. Acacio:
Way Combination for an Adaptive and Scalable Coherence Directory. IEEE Trans. Parallel Distributed Syst. 30(11): 2608-2623 (2019) - 2018
- [j29]Francisco Candel, Salvador Petit, Julio Sahuquillo, José Duato:
Accurately modeling the on-chip and off-chip GPU memory subsystem. Future Gener. Comput. Syst. 82: 510-519 (2018) - [j28]Josué Feliu, Julio Sahuquillo, Salvador Petit:
Designing lab sessions focusing on real processors for computer architecture courses: A practical perspective. J. Parallel Distributed Comput. 118(Part): 128-139 (2018) - [c55]Francisco Candel, Salvador Petit, Alejandro Valero, Julio Sahuquillo:
Improving GPU Cache Hierarchy Performance with a Fetch and Replacement Cache. Euro-Par 2018: 235-248 - [c54]Lucia Pons, Vicent Selfa, Julio Sahuquillo, Salvador Petit, Julio Pons Terol:
Improving System Turnaround Time with Intel CAT by Identifying LLC Critical Applications. Euro-Par 2018: 603-615 - [c53]Clara Furió, Josué Feliu, Salvador Petit, Jose Duro, Julio Sahuquillo:
A Workload Generator for Evaluating SMT Real-Time Systems. HPCS 2018: 367-374 - [c52]Jose Duro, Salvador Petit, Julio Sahuquillo, María Engracia Gómez:
Workload Characterization for Exascale Computing Networks. HPCS 2018: 383-389 - 2017
- [j27]Salvador Petit, Julio Sahuquillo, María Engracia Gómez, Vicent Selfa:
A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies. J. Parallel Distributed Comput. 105: 63-72 (2017) - [j26]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores. IEEE Trans. Computers 66(5): 905-911 (2017) - [j25]Josué Feliu, Stijn Eyerman, Julio Sahuquillo, Salvador Petit, Lieven Eeckhout:
Improving IBM POWER8 Performance Through Symbiotic Job Scheduling. IEEE Trans. Parallel Distributed Syst. 28(10): 2838-2851 (2017) - [j24]Vicent Selfa, Julio Sahuquillo, Salvador Petit, María Engracia Gómez:
A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches. IEEE Trans. Parallel Distributed Syst. 28(11): 3021-3032 (2017) - [j23]Alejandro Valero, Negar Miralaei, Salvador Petit, Julio Sahuquillo, Timothy M. Jones:
On Microarchitectural Mechanisms for Cache Wearout Reduction. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 857-871 (2017) - [c51]Vicent Selfa, Julio Sahuquillo, Lieven Eeckhout, Salvador Petit, María Engracia Gómez:
Application Clustering Policies to Address System Fairness with Intel's Cache Allocation Technology. PACT 2017: 194-205 - [c50]Jose Duro, Salvador Petit, Julio Sahuquillo, María Engracia Gómez:
Modeling a Photonic Network for Exascale Computing. HPCS 2017: 511-518 - [c49]Francisco Candel, Alejandro Valero, Salvador Petit, Darío Suárez Gracia, Julio Sahuquillo:
Exploiting Data Compression to Mitigate Aging in GPU Register Files. SBAC-PAD 2017: 57-64 - 2016
- [j22]Alejandro Valero, Negar Miralaei, Salvador Petit, Julio Sahuquillo, Timothy M. Jones:
Enhancing the L1 Data Cache Design to Mitigate HCI. IEEE Comput. Archit. Lett. 15(2): 93-96 (2016) - [j21]Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Luis March, José Duato:
A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks. Future Gener. Comput. Syst. 56: 211-219 (2016) - [j20]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Bandwidth-Aware On-Line Scheduling in SMT Multicores. IEEE Trans. Computers 65(2): 422-434 (2016) - [c48]Vicent Selfa, Julio Sahuquillo, Salvador Petit, María Engracia Gómez:
Student Research Poster: A Low Complexity Cache Sharing Mechanism to Address System Fairness. PACT 2016: 455 - [c47]Josué Feliu, Stijn Eyerman, Julio Sahuquillo, Salvador Petit:
Symbiotic job scheduling on the IBM POWER8. HPCA 2016: 669-680 - [c46]José Puche, Sergio Lechago, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Accurately modeling a photonic NoC in a detailed CMP simulation framework. HPCS 2016: 387-394 - [c45]Francisco Candel, Salvador Petit, Julio Sahuquillo, José Duato:
Impact of Memory-Level Parallelism on the Performance of GPU Coherence Protocols. PDP 2016: 305-308 - 2015
- [j19]Alejandro Valero, Salvador Petit, Julio Sahuquillo, David R. Kaeli, José Duato:
A reuse-based refresh policy for energy-aware eDRAM caches. Microprocess. Microsystems 39(1): 37-48 (2015) - [j18]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Design of Hybrid Second-Level Caches. IEEE Trans. Computers 64(7): 1884-1897 (2015) - [c44]Francisco Candel, Salvador Petit, Julio Sahuquillo, José Duato:
Accurately modeling the GPU memory subsystem. HPCS 2015: 179-186 - [c43]Salvador Petit:
Current challenges in simulations of HPC systems. HPCS 2015: 653-655 - [c42]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Addressing Fairness in SMT Multicores with a Progress-Aware Scheduler. IPDPS 2015: 187-196 - [c41]Julio Sahuquillo, Salvador Petit, Vicent Selfa, María Engracia Gómez:
A Research-Oriented Course on Advanced Multicore Architecture. IPDPS Workshops 2015: 760-765 - 2014
- [j17]Josué Feliu, Salvador Petit, Julio Sahuquillo, José Duato:
Cache-Hierarchy Contention-Aware Scheduling in CMPs. IEEE Trans. Parallel Distributed Syst. 25(3): 581-590 (2014) - [j16]Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López:
Efficient Register Renaming and Recovery for High-Performance Processors. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1506-1514 (2014) - [c40]Vicente Lorente, Alejandro Valero, Salvador Petit, Pierfrancesco Foglia, Julio Sahuquillo:
Analyzing the Optimal Voltage/Frequency Pair in Fault-Tolerant Caches. HPCC/CSS/ICESS 2014: 19-26 - [c39]José Luis March, Salvador Petit, Julio Sahuquillo, Houcine Hassan, José Duato:
Dynamic WCET Estimation for Real-Time Multicore Embedded Systems Supporting DVFS. HPCC/CSS/ICESS 2014: 27-33 - [c38]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Addressing bandwidth contention in SMT multicores through scheduling. ICS 2014: 167 - [e2]Luís M. B. Lopes, Julius Zilinskas, Alexandru Costan, Roberto G. Cascella, Gabor Kecskemeti, Emmanuel Jeannot, Mario Cannataro, Laura Ricci, Siegfried Benkner, Salvador Petit, Vittorio Scarano, José Gracia, Sascha Hunold, Stephen L. Scott, Stefan Lankes, Christian Lengauer, Jesús Carretero, Jens Breitbart, Michael Alexander:
Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International Workshops, Porto, Portugal, August 25-26, 2014, Revised Selected Papers, Part I. Lecture Notes in Computer Science 8805, Springer 2014, ISBN 978-3-319-14324-8 [contents] - [e1]Luís M. B. Lopes, Julius Zilinskas, Alexandru Costan, Roberto G. Cascella, Gabor Kecskemeti, Emmanuel Jeannot, Mario Cannataro, Laura Ricci, Siegfried Benkner, Salvador Petit, Vittorio Scarano, José Gracia, Sascha Hunold, Stephen L. Scott, Stefan Lankes, Christian Lengauer, Jesús Carretero, Jens Breitbart, Michael Alexander:
Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International Workshops, Porto, Portugal, August 25-26, 2014, Revised Selected Papers, Part II. Lecture Notes in Computer Science 8806, Springer 2014, ISBN 978-3-319-14312-5 [contents] - 2013
- [j15]José Luis March, Julio Sahuquillo, Salvador Petit, Houcine Hassan, José Duato:
Power-aware scheduling with effective task migration for real-time multicore embedded systems. Concurr. Comput. Pract. Exp. 25(14): 1987-2001 (2013) - [j14]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors. IEEE Trans. Computers 62(5): 944-955 (2013) - [c37]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
L1-bandwidth aware thread allocation in multicore SMT processors. PACT 2013: 123-132 - [c36]Vicente Lorente, Alejandro Valero, Julio Sahuquillo, Salvador Petit, Ramon Canal, Pedro López, José Duato:
Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modes. DATE 2013: 83-88 - [c35]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Using Huge Pages and Performance Counters to Determine the LLC Architecture. ICCS 2013: 2557-2560 - [c34]Alejandro Valero, Julio Sahuquillo, Salvador Petit, José Duato:
Exploiting reuse information to reduce refresh energy in on-chip eDRAM caches. ICS 2013: 491-492 - 2012
- [j13]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Combining recency of information with selective random and a victim cache in last-level caches. ACM Trans. Archit. Code Optim. 9(3): 16:1-16:20 (2012) - [j12]Alejandro Valero, Salvador Petit, Julio Sahuquillo, Pedro López, José Duato:
Design, Performance, and Energy Consumption of eDRAM/SRAM Macrocells for L1 Data Caches. IEEE Trans. Computers 61(9): 1231-1242 (2012) - [j11]Monica Serrano, Julio Sahuquillo, Salvador Petit, Houcine Hassan, José Duato:
A cost-effective heuristic to schedule local and remote memory in cluster computers. J. Supercomput. 59(3): 1533-1551 (2012) - [j10]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, David R. Kaeli:
A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions. IEEE Trans. Parallel Distributed Syst. 23(8): 1361-1368 (2012) - [j9]Alejandro Valero, Julio Sahuquillo, Vicente Lorente, Salvador Petit, Pedro López, José Duato:
Impact on Performance and Energy of the Retention Time and Processor Frequency in L1 Macrocell-Based Data Caches. IEEE Trans. Very Large Scale Integr. Syst. 20(6): 1108-1117 (2012) - [c33]Julio Sahuquillo, María Engracia Gómez, Salvador Petit:
OMHI 2012: First International Workshop on On-chip Memory Hierarchies and Interconnects: Organization, Management and Implementation. Euro-Par Workshops 2012: 305-306 - [c32]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Analyzing the optimal ratio of SRAM banks in hybrid caches. ICCD 2012: 297-302 - [c31]Monica Serrano, Salvador Petit, Julio Sahuquillo, Rafael Ubal, Houcine Hassan, José Duato:
Page-Based Memory Allocation Policies of Local and Remote Memory in Cluster Computers. ICPADS 2012: 612-619 - [c30]Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
Understanding Cache Hierarchy Contention in CMPs to Improve Job Scheduling. IPDPS 2012: 508-519 - [c29]José Luis March, Salvador Petit, Julio Sahuquillo, Houcine Hassan, José Duato:
Efficiently Handling Memory Accesses to Improve QoS in Multicore Systems under Real-Time Constraints. SBAC-PAD 2012: 286-293 - 2011
- [j8]José Luis March, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
A New Energy-Aware Dynamic Task Set Partitioning Algorithm for Soft and Hard Embedded Real-Time Systems. Comput. J. 54(8): 1282-1294 (2011) - [c28]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Improving Last-Level Cache Performance by Exploiting the Concept of MRU-Tour. PACT 2011: 214 - [c27]José Luis March, Julio Sahuquillo, Salvador Petit, Houcine Hassan, José Duato:
A Dynamic Power-Aware Partitioner with Task Migration for Multicore Embedded Systems. Euro-Par (1) 2011: 218-229 - [c26]Monica Serrano, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
A Cluster Computer Performance Predictor for Memory Scheduling. ICA3PP (2) 2011: 353-362 - [c25]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
MRU-Tour-based Replacement Algorithms for Last-Level Caches. SBAC-PAD 2011: 112-119 - 2010
- [c24]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
Exploiting subtrace-level parallelism in clustered processors. PACT 2010: 555-556 - [c23]Monica Serrano, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
A Scheduling Heuristic to Handle Local and Remote Memory in Cluster Computers. HPCC 2010: 35-42 - [c22]José Luis March, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
Extending a Multicore Multithread Simulator to Model Power-Aware Hard Real-Time Systems. ICA3PP (2) 2010: 444-453 - [c21]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, David R. Kaeli:
Out-of-order retirement of instructions in sequentially consistent multiprocessors. ICCD 2010: 1-8 - [c20]Diana Bautista Rayo, Julio Sahuquillo Borrás, Houcine Hassan Mohamed, Salvador Petit, José Duato:
Balancing Task Resource Requirements in Embedded Multithreaded Multicore Processors to Reduce Power Consumption. PDP 2010: 200-204 - [c19]Diana Bautista, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
Dynamic task set partitioning based on balancing resource requirements and utilization to reduce power consumption. SAC 2010: 521-526
2000 – 2009
- 2009
- [j7]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Houcine Hassan, Pedro López:
Power Reduction In Advanced Embedded IPC Processors. Intell. Autom. Soft Comput. 15(3): 495-507 (2009) - [j6]Salvador Petit Marti, Julio Sahuquillo Borrás, Pedro Juan López Rodríguez, Rafael Ubal Tena, José Duato Marín:
A Complexity-Effective Out-of-Order Retirement Microarchitecture. IEEE Trans. Computers 58(12): 1626-1639 (2009) - [c18]Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López, José Duato:
An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions. DSD 2009: 635-642 - [c17]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López:
Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors. Euro-Par 2009: 309-320 - [c16]Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López:
A power-aware hybrid RAM-CAM renaming mechanism for fast recovery. ICCD 2009: 150-157 - [c15]Diana Bautista, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption. ICS 2009: 513-514 - [c14]Alejandro Valero, Julio Sahuquillo, Salvador Petit, Vicente Lorente, Ramon Canal, Pedro López, José Duato:
An hybrid eDRAM/SRAM macrocell to implement first-level data caches. MICRO 2009: 213-221 - 2008
- [c13]Noel Tomás, Julio Sahuquillo, Salvador Petit, Pedro López:
Reducing the Number of Bits in the BTB to Attack the Branch Predictor Hot-Spot. Euro-Par 2008: 317-326 - [c12]Diana Bautista, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato:
A simple power-aware scheduling for multicore systems when running real-time applications. IPDPS 2008: 1-7 - [c11]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
The impact of out-of-order commit in coarse-grain, fine-grain and simultaneous multithreaded architectures. IPDPS 2008: 1-11 - 2007
- [j5]Julio Sahuquillo, Noel Tomás, Salvador Petit, Ana Pont:
Spim-Cache: A Pedagogical Tool for Teaching Cache Memories Through Code-Based Exercises. IEEE Trans. Educ. 50(3): 244-250 (2007) - [c10]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato:
VB-MT: Design Issues and Performance of the Validation Buffer Microarchitecture for Multithreaded Processors. PACT 2007: 429 - [c9]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Houcine Hassan, Pedro López:
Leakage Current Reduction in Data Caches on Embedded Systems. IPC 2007: 45-50 - [c8]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López:
Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. SBAC-PAD 2007: 62-68 - 2006
- [j4]Rafael Ubal, Juan-Carlos Cano, Salvador Petit, Julio Sahuquillo:
RACFP: a training tool to work with floating-point representation, algorithms, and circuits in undergraduate courses. IEEE Trans. Educ. 49(3): 321-331 (2006) - [j3]Salvador Petit, Julio Sahuquillo, Ana Pont, David R. Kaeli:
Addressing a workload characterization study to the design of consistency protocols. J. Supercomput. 38(1): 49-72 (2006) - [c7]Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López:
Applying the zeros switch-off technique to reduce static energy in data caches. SBAC-PAD 2006: 133-140 - [c6]Salvador Petit, Noel Tomás, Julio Sahuquillo, Ana Pont:
An execution-driven simulation tool for teaching cache memories in introductory computer organization courses. WCAE 2006: 4 - 2005
- [j2]Julio Sahuquillo, Salvador Petit, Ana Pont, Veljko M. Milutinovic:
Exploring the performance of split data cache schemes on superscalar processors and symmetric multiprocessors. J. Syst. Archit. 51(8): 451-469 (2005) - [c5]Salvador Petit, Julio Sahuquillo, Jose M. Such, David R. Kaeli:
Exploiting temporal locality in drowsy cache policies. Conf. Computing Frontiers 2005: 371-377 - [c4]Salvador Petit, Julio Sahuquillo, Ana Pont:
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol. PDP 2005: 197-204 - 2004
- [c3]Salvador Petit, Julio Sahuquillo, Ana Pont, David R. Kaeli:
Characterizing the Dynamic Behavior of Workload Execution in SVM systems. SBAC-PAD 2004: 230-237 - 2002
- [c2]Salvador Petit, Julio Sahuquillo, Ana Pont:
Characterizing Parallel Workloads to Reduce Multiple Writer Overhead in Shared Virtual Memory Systems. PDP 2002: 261-268 - 2001
- [c1]Salvador Petit, Julio Sahuquillo, Ana Pont:
About the sensitivity of the HLRC-DU protocol on diff and page sizes. ISPASS 2001: 45-48 - 2000
- [j1]Salvador Petit, José A. Gil, Julio Sahuquillo, Ana Pont:
LIDE: a simulation environment for shared virtual memory systems. SIGARCH Comput. Archit. News 28(4): 11-18 (2000)
Coauthor Index
José Duato
aka: José Duato Marín
aka: José Duato Marín
Houcine Hassan
aka: Houcine Hassan Mohamed
aka: Houcine Hassan Mohamed
Pedro López 0001
aka: Pedro Juan López Rodríguez
aka: Pedro Juan López Rodríguez
Julio Sahuquillo
aka: Julio Sahuquillo Borrás
aka: Julio Sahuquillo Borrás
[j46] [j45] [c63] [c62] [j44] [j43] [c61] [c60] [i2] [j42] [j41] [j40] [c59] [c58] [c57] [j39] [j38] [j37] [j36] [j35] [c56] [i1] [j34] [j33] [j32] [j31] [j30] [j29] [j28] [c55] [c54] [c53] [c52] [j27] [j26] [j25] [j24] [j23] [c51] [c50] [c49] [j22] [j21] [j20] [c48] [c47] [c46] [c45] [j19] [j18] [c44] [c42] [c41] [j17] [j16] [c40] [c39] [c38] [j15] [j14] [c37] [c36] [c35] [c34] [j13] [j12] [j11] [j10] [j9] [c33] [c32] [c31] [c30] [c29] [j8] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [j7] [j6] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [j5] [c10] [c9] [c8] [j4] [j3] [c7] [c6] [j2] [c5] [c4] [c3] [c2] [c1] [j1]
Rafael Ubal
aka: Rafael Ubal Tena
aka: Rafael Ubal Tena
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