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2010 – 2019
- 2015
[j5]Masanori Furuta, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Junya Matsuno, Shigehito Saigusa, Tetsuro Itakura:
A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(2): 492-499 (2015)- 2014
- [c8]Shigehito Saigusa, Toshiya Mitomo, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Shusuke Kawai, Tong Wang, Masanori Furuta, Kei Shiraishi, Koichiro Ban, Seiichiro Horikawa, Tomoya Tandai, Ryoko Matsuo, Takeshi Tomizawa, Hiroaki Hoshino, Junya Matsuno, Yukako Tsutsumi, Ryoichi Tachibana, Osamu Watanabe, Tetsuro Itakura:
20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. ISSCC 2014: 348-349 - 2013
- [j4]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". IEEE J. Solid State Circuits 48(6): 1540 (2013) - [c7]Junya Matsuno, Masahiro Hosoya, Masanori Furuta, Tetsuro Itakura:
A 3-GS/s 5-bit Flash ADC with wideband input buffer amplifier. VLSI-DAT 2013: 1-4 - 2012
- [j3]Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka:
A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion. IEEE J. Solid State Circuits 47(8): 1820-1827 (2012) - [j2]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication. IEEE J. Solid State Circuits 47(12): 3160-3171 (2012) - [c6]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication. ISSCC 2012: 266-268 - 2011
- [c5]Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka:
A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller. CICC 2011: 1-4 - 2010
- [j1]Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe:
A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization. IEEE J. Solid State Circuits 45(12): 2785-2793 (2010) - [c4]Masahiro Hosoya, Toshiya Mitomo, Osamu Watanabe:
A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range. ESSCIRC 2010: 466-469 - [c3]Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe:
A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization. ISSCC 2010: 66-67
2000 – 2009
- 2008
- [c2]Hiroshi Yoshida, Takehiko Toyoda, T. Yasuda, Yosuke Ogasawara, M. Ishii, T. Murasaki, Gaku Takemura, Masaomi Iwanaga, T. Takida, Yuta Araki, T. Hashimoto, K. Sami, Teruo Imayama, H. Shimizu, Hideyuki Kokatsu, Y. Tsuda, I. Tamura, H. Masuoka, Masahiro Hosoya, R. Ito, Hidenori Okuni, T. Kato, K. Sato, K. Nonin, K. Osawa, R. Fujimoto, S. Kawaguchi, Hiroshi Tsurumi, N. Itoh:
A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface. ESSCIRC 2008: 142-145 - [c1]Shoji Otaka, Masahiro Hosoya, Hiroaki Ishihara, Toru Hashimoto, Yuta Araki:
0.13 μm CMOS Cartesian loop transmitter IC with fast calibration and switching scheme from opened to closed loop. ESSCIRC 2008: 342-345
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