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2020 – today
- 2024
[j15]Abhinav Kathuria
, Anu Gupta, R. K. Singla:
Aspect-Oriented Lexicon-Based Sentiment Analysis of Students' Feedback. J. Circuits Syst. Comput. 33(3) (2024)- [j14]Jaswinder Singh, Anu Gupta, Preet Kanwal:
The vital role of community in open source software development: A framework for assessment and ranking. J. Softw. Evol. Process. 36(7) (2024) - 2023
- [j13]Abhinav Kathuria, Anu Gupta, R. K. Singla:
AOH-Senti: Aspect-Oriented Hybrid Approach to Sentiment Analysis of Students' Feedback. SN Comput. Sci. 4(2): 152 (2023) - 2022
- [j12]Anu Gupta, Vijay Kumar Jain, Vikas Arya, Hemraj Verma:
Consumer Green Consumption Behavior: A Myth or Reality in the Information Age? A Study Based on Bibliometric Analysis Approach. Inf. Resour. Manag. J. 35(2): 1-19 (2022) - [j11]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
Dedicated hardware architecture for localizing iris in VW images. J. King Saud Univ. Comput. Inf. Sci. 34(7): 4568-4578 (2022) - 2021
- [j10]Meetha V. Shenoy, Smriti Sridhar, Girish Salaka, Anu Gupta, Rajiv Gupta:
A Holistic Framework for Crime Prevention, Response, and Analysis With Emphasis on Women Safety Using Technology and Societal Participation. IEEE Access 9: 66188-66207 (2021)
2010 – 2019
- 2019
- [j9]Harjap Saini, Anu Gupta:
Constant power consumption design of novel differential logic gate for immunity against differential power analysis. IET Circuits Devices Syst. 13(1): 103-109 (2019) - [c12]Harjap Singh Saini, Anu Gupta:
Differential Power Analysis Immune Design of FinFET Based Novel Differential Logic Gate. ISCAS 2019: 1-5 - 2018
- [j8]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
Memory-efficient architecture of circle Hough transform and its FPGA implementation for iris localisation. IET Image Process. 12(10): 1753-1761 (2018) - [j7]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
Hardware Accelerators for Iris Localization. J. Signal Process. Syst. 90(4): 655-671 (2018) - 2017
- [j6]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
Low-latency median filter core for hardware implementation of 5 × 5 median filtering. IET Image Process. 11(10): 927-934 (2017) - 2016
- [j5]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
A Novel Edge-Map Creation Approach for Highly Accurate Pupil Localization in Unconstrained Infrared Iris Images. J. Electr. Comput. Eng. 2016: 4709876:1-4709876:10 (2016) - [c11]Indu Arora, Anu Gupta:
Developing and validating virtualized transactional application of educational institutes using InFraMegh. ICACCI 2016: 1647-1653 - 2015
- [j4]Priya Gupta, Anu Gupta, Abhijit R. Asati:
Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region. Int. J. Reconfigurable Comput. 2015: 749816:1-749816:10 (2015) - [c10]Vineet Kumar, Abhijit R. Asati, Anu Gupta:
An Iris localization method for noisy infrared iris images. ICSIPA 2015: 208-213 - [c9]Sneh Lata Murotiya, Anu Gupta:
Design of High Speed Ternary Full Adder and Three-Input XOR Circuits Using CNTFETs. VLSID 2015: 292-297 - 2014
- [c8]Sachin Maheshwari, Jimit Patel, Sumit K. Nirmalkar, Anu Gupta:
Logical effort based power-delay-product optimization. ICACCI 2014: 565-569 - 2013
- [c7]Sachin Maheshwari, Himadri Singh Raghav, Anu Gupta:
Characterization of Logical Effort for Improved Delay. VDAT 2013: 108-117 - [c6]Sachin Maheshwari, Rameez Raza, Pramod Kumar, Anu Gupta:
Convex Optimization of Energy and Delay Using Logical Effort Method in Deep Sub-micron Technology. VDAT 2013: 185-193 - 2012
- [c5]Anu Gupta, Subhrojyoti Sarkar:
An Efficient High Frequency and Low Power Analog Multiplier in Current Domain. VDAT 2012: 1-9 - 2010
- [j3]Subhendu Kumar Sahoo, Anu Gupta, Abhijit R. Asati, Chandra Shekhar:
A Novel Redundant Binary Number to Natural Binary Number Converter. J. Signal Process. Syst. 59(3): 297-307 (2010)
2000 – 2009
- 2009
- [j2]Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta:
Dual channel addition based FFT processor architecture for signal and image processing. Int. J. High Perform. Syst. Archit. 2(1): 35-45 (2009) - [c4]Ashutosh Mehra, Anu Gupta, Sharvil Patil, Abhishek Mehra, Subhendu Kumar Sahoo:
A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers. ARTCom 2009: 115-117 - [c3]Amit Agarkhed, Sharvil Patil, Anu Gupta:
Improved Implementation of CRL and SCRL Gates for Ultra Low Power. ARTCom 2009: 123-125 - 2008
- [c2]Tushar Uttarwar, Sanket Jain, Anu Gupta:
Design of a High Performance, Low Power, Fully Differential Telescopic Cascode Amplifier using Common-Mode Feedback Circuit. EIAT/IETA 2008: 249-252 - 2007
- [c1]Anu Gupta, Ravinder Kumar Singla:
An Empirical Investigation of Defect Management in Free/Open Source Software Projects. SCSS (1) 2007: 68-73 - 2006
- [j1]Anu Gupta, Bipin Kulkarni:
Automation of clock distribution network design for digital integrated circuits using divide and conquer technique. Integr. 39(4): 407-419 (2006)
Coauthor Index
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last updated on 2024-09-10 01:11 CEST by the dblp team
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