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ORCIDACM Great Lakes Symposium on VLSI 2024: Clearwater, FL, USA
- Inna Partin-Vaisband, Srinivas Katkoori, Lu Peng, Boris Vaisband, Tooraj Nikoubin:
Proceedings of the Great Lakes Symposium on VLSI 2024, GLSVLSI 2024, Clearwater, FL, USA, June 12-14, 2024. ACM 2024
Session 1A: VLSI Circuits and Design I
- Yousef Safari
, Yushu Zhao, Boris Vaisband:
Co-DTC: Concentric Trench-Based Integrated Capacitors for Advanced Chiplet-Based Platforms. 1-6 - Changxu Liu, Danqing Tang, Jie Song, Hao Zhou, Shoumeng Yan, Fan Yang:
HMNTT: A Highly Efficient MDC-NTT Architecture for Privacy-preserving Applications. 7-12 - Chaolong Xu, Fangxu Lv, Zhengbin Pang, Liquan Xiao, Zhouhao Yang:
FPGA Implementation of Sequence Detector for High-Speed PAM4 Wireline Transceiver. 13-18
Session 1B: Testing, Reliability, Fault-Tolerance
- Aibin Yan, Chen Dong, Xing Guo, Jie Song, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen:
IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications. 19-24 - Haojie Jian, Chao Chen, Zheng Wang, Pengfei Wu:
PerFT-N: Low-overhead Permanent Fault-Tolerance Mechanism for Neural Processing Units. 25-31 - Vincenzo Petrolo, Sourav Medya, Mariagrazia Graziano, Debjit Pal:
DETECTive: Machine Learning-driven Automatic Test Pattern Prediction for Faults in Digital Circuits. 32-37
Session 1C: Emerging Computing & Post-CMOS Technologies I
- Seunggyu Lee, Wonjae Lee, Youngsoo Shin:
Integrated Netlist Synthesis and In-Memory Mapping for Memristor-Aided Logic. 38-43 - Collin Beaudoin, Koustubh Phalak, Swaroop Ghosh:
AltGraph: Redesigning Quantum Circuits Using Generative Graph Models for Efficient Optimization. 44-49 - Shruthi Karunakar, Meenakshi Atkade, Akash Poptani, Rajshekar Kalayappan, Sandeep Chandran:
CASH: Criticality-Aware Split Hybrid L1 Data Cache. 50-56
Session 1D: VLSI for Machine Learning and Artificial Intelligence I
- Gian Singh, Sarma B. K. Vrudhula:
A DRAM-based Near-Memory Architecture for Accelerated and Energy-Efficient Execution of Transformers. 57-62 - Zikang Zhou, Xuyang Duan, Kaiqi Chen, Yaqi Chen, Jun Han:
ML-Fusion: Determining Memory Levels for Data Reuse Between DNN Layers. 63-68 - Pratik Shrestha, Alec Aversa, Saran Phatharodom, Ioannis Savidis:
EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation. 69-77
Session 2A: VLSI Circuits and Design II
- Ebadollah Taheri, Pooya Aghanoury, Sudeep Pasricha, Mahdi Nikdast, Nader Sehatbakhsh:
SCRIPT: A Multi-Objective Routing Framework for Securing Chiplet Systems against Distributed DoS Attacks. 78-85 - Yichao Zhang, Marco Bertuletti, Samuel Riedel, Matheus A. Cavalcante, Alessandro Vanelli-Coralli, Luca Benini:
TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios. 86-91 - Pratyush Nandi, Anubhav Mishra, Madhav Rao:
GOLDS: Genetic Algorithm-based Optimization of Custom FPGA Architecture Layout Design for Secure Silicon. 92-97
Session 2B: IoT and Smart Systems I
- Guillaume Chacun, Mehdi Akeddar, Thomas Rieder, Bruno Da Rocha Carvalho, Marina Zapater:
DroneBandit: Multi-armed contextual bandits for collaborative edge-to-cloud inference in resource-constrained nanodrones. 98-104 - Ruben Dominguez, José Baca, Chen Pan:
MARS: MAximizing throughput for MPPT-based self-sustaining LoRa Systems. 105-110 - Yang Ni, William Youngwoo Chung, Samuel Cho, Zhuowen Zou, Mohsen Imani:
Efficient Exploration in Edge-Friendly Hyperdimensional Reinforcement Learning. 111-118
Session 2C: Emerging Computing & Post-CMOS Technologies II
- Avimita Chatterjee, Debarshi Kundu, Swaroop Ghosh:
Q-Embroidery: A Study on Weaving Quantum Error Correction into the Fabric of Quantum Classifiers. 119-124 - Wenhui Zhang, Xinkuang Geng, Qin Wang, Jie Han, Honglan Jiang:
A Low-Power and High-Accuracy Approximate Adder for Logarithmic Number System. 125-131 - Debarshi Kundu, Archisman Ghosh, Srinivasan Ekambaram, Jian Wang, Nikolay V. Dokholyan, Swaroop Ghosh:
Application of Quantum Tensor Networks for Protein Classification. 132-137
Session 2D: VLSI for Machine Learning and Artificial Intelligence II
- Phani Pavan Kambhampati, Ajay B. S, Madhav Rao:
Energy Efficient Multi-Modal Stress Detection System with Dynamic Adaptive Spiking Neurons. 138-143 - Wendi Sun, Wenhao Sun, Yifan Wang, Yi Kang, Song Chen:
Communication Minimized Model-Architecture Co-design for Efficient Convolution Acceleration. 144-150 - Fabian Lesniak, Annina Gutermann, Tanja Harbaum, Jürgen Becker:
Enhanced Accelerator Design for Efficient CNN Processing with Improved Row-Stationary Dataflow. 151-157
Session 3A: Computer-Aided Design (CAD) I
- Sunan Zou, Jiaxi Zhang, Guojie Luo:
Incremental SAT-based Exact Synthesis. 158-163 - Xinshi Zang, Wenhao Lin, Shiju Lin, Jinwei Liu, Evangeline F. Y. Young:
An Open-Source Fast Parallel Routing Approach for Commercial FPGAs. 164-169 - Yuchao Liao, Tosiron Adegbija, Roman Lysecky, Ravi Tandon:
Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. 170-176 - Andrew B. Kahng, Sayak Kundu, Shreyas Thumathy:
Scalable Flip-Flop Clustering Using Divide and Conquer For Capacitated K-Means. 177-184
Session 3B: Hardware Security I
- Armin Darjani, Nima Kavand, Akash Kumar:
Flip-Lock: A Flip-Flop-Based Logic Locking Technique for Thwarting ML-based and Algorithmic Structural Attacks. 185-191 - Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao:
The Fuzz Odyssey: A Survey on Hardware Fuzzing Frameworks for Hardware Design Verification. 192-197 - Rajesh Kumar Datta, Guangwei Zhao, Dipali Jain, Kaveh Shamsi:
On Hardware Trojan Detection using Oracle-Guided Circuit Learning. 198-203 - Ke Xia, Sheng Wei:
DM-TEE: Trusted Execution Environment for Disaggregated Memory. 204-209
Special Session 1: Hardware Implementation for Post-Quantum Cryptography and Homomorphic Encryption: Arithmetic, Architecture, and Security
- Pengzhou He, Ben Mongirdas, Çetin Kaya Koç, Jiafeng Xie:
LAMP: Efficient Implementation of Lightweight Accelerator for Polynomial MultiPlication, From Falcon to RBLWE-ENC. 210-215 - Prasanna Ravi, Shivam Bhasin, Anupam Chattopadhyay, Aikata, Sujoy Sinha Roy:
Backdooring Post-Quantum Cryptography: Kleptographic Attacks on Lattice-based KEMs. 216-221 - Oleg Mazonka, Mohammed Nabeel Thari Moopan, Michail Maniatakos:
Exploring Generalization of Shoup Modular Multiplier. 222-227 - Suraj Mandal, Debapriya Basu Roy:
Design of a Lightweight Fast Fourier Transformation for FALCON using Hardware-Software Co-Design. 228-232
Special Session 2: Harnessing Large-scale Machine Learning Modules for Enhanced Design and Verification of Hardware Systems
- Samit Shahnawaz Miftah, Amisha Srivastava, Hyunmin Kim, Kanad Basu:
Assert-O: Context-based Assertion Optimization using LLMs. 233-239 - Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao:
Exploring Coverage Metrics in Hardware Fuzzing: A Comprehensive Analysis. 240-245 - Alec Aversa, Ioannis Savidis:
Harnessing Heterogeneity for Targeted Attacks on 3-D ICs. 246-251 - Sudipta Paria, Aritra Dasgupta, Swarup Bhunia:
Navigating SoC Security Landscape on LLM-Guided Paths. 252-257
Poster Session 1 VLSI Circuits and Design
- Gaoming Du, Zhuo Chen, Zhenmin Li, Xiaolei Wang, Duoli Zhang:
A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature. 258-262 - Omid Bazgir, Satwik Gali, Tooraj Nikoubin:
Area-power and Energy Efficient Substitution box (S-box) in Advanced Encryption Standard (AES). 263-267 - Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam:
A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations. 268-271 - Guocheng Zhao, Yongxiang Cao:
Highly Efficient Load-Balanced Dataflow for SpGEMMs on Systolic Arrays. 272-276 - Zihan Yin, Annewsha Datta, Shwetha Vijayakumar, Ajey P. Jacob, Akhilesh Jaiswal:
A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation. 277-281 - Mohamed Adel Gharib, Salma Abdelzaher, Inna Partin-Vaisband:
An Analytical Model for High-Frequency Through Silicon Vias. 282-286 - Surya Penmetsa, Fahad Rahman Amik, Zhanguang Zhang, Yingying Fu, Yingxue Zhang, Wulong Liu, Jianye Hao:
Generalizable and Relation Sensitive Netlist Representation for Analog Circuit Design. 287-291 - Dantu Nandini Devi, Gandi Ajay Kumar, Bindu G. Gowda, Madhav Rao:
Integrated MAC-based Systolic Arrays: Design and Performance Evaluation. 292-295 - Matchima Buddhanoy, Kamil Khan, Aleksandar Milenkovic, Sudeep Pasricha, Biswajit Ray:
Improving Block Management in 3D NAND Flash SSDs with Sub-Block First Write Sequencing. 296-300 - Ling Yang, Zhong Zheng, Libo Huang, Run Yan, Sheng Ma, Yongwen Wang, Weixia Xu:
Cost-Effective Value Predictor for ILP processors through Design Space Exploration. 301-304 - Hariprasadh Govindasamy, Babak Esfandiari, Paulo Garcia:
Accelerating Boolean Constraint Propagation for Efficient SAT-Solving on FPGAs. 305-309
IoT and Smart Systems
- Vikash Sathiamoorthy, Shuo Huai, Hao Kong, Di Liu, Wendy Yong Yi Loy, Christian Makaya, Daren Ho, Ravi Subramaniam, Qian Lin, Weichen Liu:
FedTR: Federated Learning Framework with Transfer Learning for Industrial Visual Inspection. 310-314 - Mohammed Alawad, Mohammad Munzurul Islam:
Sparsifying Graph Neural Networks with Compressive Sensing. 315-318 - Mohammad Mezanur Rahman Monjur, Qiaoyan Yu:
Advanced Continuous-Time Convolution Framework for Security Assurance in Wireless Sensor Networks. 319-322 - Jishnu Banerjee, Sahidul Islam, Wei Wei, Chen Pan, Mimi Xie:
Autotile: Autonomous Task-tiling for Deep Inference on Battery-less Embedded System. 323-327
Testing, Reliability, Fault-Tolerance
- Christopher P. Vasquez, Travis LeCompte, Xu Yuan, Nian-Feng Tzeng, Lu Peng:
Soft Error Resilience Analysis of LSTM Networks. 328-332 - Janani Aravind, Victor Oyadongha, Daniel B. Limbrick:
Comprehensive Analysis of Generated Single Event Transients in Most Common Logic Cells of Skywater's 130-nm Technology. 333-337 - Jingzhou Li, Huaiyu Chen, Wenbin Zhang, Hu He:
HCRF: A Hardware Checkpoint-based Recovery Framework in light dual-core lockstep processors. 338-342 - Richard C. Yarnell, Mousam Hossain, Raul Graterol, Ayush Pindoria, Sujan Ghimire, Muhtasim Alam Chowdhury, Soheil Salehi, Yu Bai, Ronald F. DeMara:
Educational Tool-spaces for Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis. 343-346 - Brian J. Skromme, Megan A. O'Donnell, Wendy M. Barnard:
Step-by-Step Tutoring Support for Student Success in Circuit Analysis Courses. 347-350
Late Breaking Results
- Sriharini Krishnakumar, Yaroslav Popryho, Inna Partin-Vaisband:
System Architecture Optimization for Vertical Power Delivery. 351-352 - Michael Fore, Simranjit Singh, Dimitrios Stamoulis:
GeckOpt: LLM System Efficiency via Intent-Based Tool Selection. 353-354 - Alaaddin Goktug Ayar, Sercan Aygun, M. Hassan Najafi, Martin Margala:
Word2HyperVec: From Word Embeddings to Hypervectors for Hyperdimensional Computing. 355-356
Session 4A: VLSI Circuits and Design III
- Duo Yu, Ang Li, Naifeng Jing, Jianfei Jiang, Weiguang Sheng, Qin Wang:
VDA: A Simple but Efficient Virtual-Channel-Based Deadlock Avoidance Scheme for Scalable Chiplet Networks. 357-363 - Xinyi Li, Wenjie Fan, Heng Zhang, Jinlun Ji, Tong Cheng, Shiping Li, Li Li, Yuxiang Fu:
TTNNM: Thermal- and Traffic-Aware Neural Network Mapping on 3D-NoC-based Accelerator. 364-369 - Rami Rasheedi, Inna Partin-Vaisband:
An Embedded Multi-Layer Spiral Square Inductor for Integrated Power Delivery - Physical Design and Analytical Models. 370-375 - Tianji Liu, Qijing Wang, Lixin Liu, Fangzhou Wang, Evangeline F. Y. Young:
On Advanced Methodologies for Microarchitecture Design Space Exploration. 376-382
Session 4B: Computer-Aided Design (CAD) II
- Qijing Wang, Jinwei Liu, Martin D. F. Wong, Evangeline F. Y. Young:
A Multi-agent Generative Model for Collaborative Global Routing Refinement. 383-389 - Andrew B. Kahng, Bodhisatta Pramanik, Mingyu Woo:
A Hybrid ECO Detailed Placement Flow for Improved Reduction of Dynamic IR Drop. 390-396 - Fang-Yu Hsu, Tzu-Chuan Lin, Wai-Kei Mak, Ting-Chi Wang:
A Bounding Box-based Net Partitioning Method for Double-sided Routing. 397-402 - Olympia Axelou, Kostas Kolomvatsos, George Floros, Nestor E. Evmorfopoulos, Georg I. Georgakos, George I. Stamoulis:
An Electromigration-Aware Wire Sizing Methodology via Particle Swarm Optimization. 403-408
Session 4C: Hardware Security II
- Preet Derasari, Guru Venkataramani:
EPIC: Efficient and Proactive Instruction-level Cyberdefense. 409-414 - Joseph Madera, Kyle Juretus:
Boolean Domain Attack on Corrupt and Correct Based Logic Locking Techniques. 415-420 - Shaoqian Jin, Yulin Li, Liwei Chen, Gang Shi:
SSFuzz: Generating syntactic and semantic seeds for RISC-V processors. 421-426 - Sunwoong Kim, Wonhee Cho:
Accelerating Homomorphic Comparison Operations for Thresholding Using an Asymmetric Input Range and Input Scaling. 427-432
Session 5A: Computer-Aided Design (CAD) III
- Xinshi Zang, Qin Luo, Zhongwei Shao, Jifeng Zhang, Evangeline F. Y. Young, Martin D. F. Wong:
Dynamic Multi-FPGA Prototyping Platforms with Simultaneous Networking, Placement and Routing. 433-439 - Shan Shen, Dingcheng Yang, Yuyang Xie, Chunyan Pei, Bei Yu, Wenjian Yu:
Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on SRAM Designs. 440-445 - Chun Wang, Yi Fang, Sihai Zhang:
Feature Fusion based Hotspot Detection with R-EfficientNet. 446-451 - Feng Guo, Jiawei Liu, Jianwang Zhai, Jingyu Jia, Kang Zhao, Chuan Shi:
PGAU: Static IR Drop Analysis for Power Grid using Attention U-Net Architecture and Label Distribution Smoothing. 452-458
Session 5B: Hardware Security III
- Vishnuvardhan Venkatramani Iyer, Jacob D. Rezac:
Using EM Side-Channels Near a Bluetooth Server Implementation to Monitor Bit-Level Leakages in BLE Communication Channels. 459-464 - Ruochen Dai, Zhaoxiang Liu, Orlando Arias, Xiaolong Guo, Tuba Yavuz:
DTjRTL: A Configurable Framework for Automated Hardware Trojan Insertion at RTL. 465-470 - Sajeed Mohammad, Farimah Farahmandi:
DyFORA: Dynamic Firmware Obfuscation and Remote Attestation using Hardware Signatures. 471-476 - Sreenitha Kasarapu, Dipkamal Bhusal, Nidhi Rastogi, Sai Manoj Pudukotai Dinakarrao:
Comprehensive Analysis of Consistency and Robustness of Machine Learning Models in Malware Detection. 477-482
Special Session 3: Beyond Security of Silicon: Navigating the Hardware Security Landscape of Tomorrow
- Gaines Odom, Hardhik Mohanty, Ujjwal Guin, Bhaskar Krishnamachari:
Blockchain-Enabled Whitelisting Mechanisms for Enhancing Security in 3D ICs. 483-488 - Bulbul Ahmed, M. Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation. 489-494 - Furkan Aydin, Emre Karabulut, Aydin Aysu:
Extended Abstract: Pre-Silicon Vulnerability Assessment for AI/ML Hardware. 495 - Mohammad Akyash, Hadi Mardani Kamali:
Evolutionary Large Language Models for Hardware Security: A Comparative Survey. 496-501
Poster Session 2 Computer-Aided Design
- Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler:
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. 502-506 - Yangjie Wu, Yuhan Zhu, Genggeng Liu, Xing Huang:
Anomaly Detection Method based on Discrete Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips. 507-510 - Qijing Wang, Xiaopeng Zhang, Martin D. F. Wong, Evangeline F. Y. Young:
ControLayout: Conditional Diffusion for Style-Controllable and Violation-Fixable Layout Pattern Generation. 511-515 - Yong-Fong Chang, Yung-Chih Chen, Yu-Chen Cheng, Shu-Hong Lin, Che-Hsu Lin, Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang:
IR drop Prediction Based on Machine Learning and Pattern Reduction. 516-519 - Yuqin Wang, Cheng Guo, Xiaojing Su, Xin Hong, Zixi Liu, Xiaohuan Ling, Bojie Ma, Pengyu Ren, Yujie Jiang, Yajuan Su, Yayi Wei:
An Automatic Insertion Scheme of Extra Via for DSA-MP Hybrid Lithography. 520-524 - Dongliang Xia, Wenxin Yu, Zhaoqi Fu, Zejun Gan, Chengjin Li, Yupeng Zhang:
A P&R Co- Optimization Engine for Reducing Congestion. 525-528 - Junqian Huang, Yuhan Zhu, Xing Huang, Genggeng Liu:
Washing Optimization Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. 529-532 - Zhenyuan Wu, Yuhan Zhu, Xing Huang, Genggeng Liu:
Error Recovery Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. 533-536 - Jinyu Bai, He Zhang, Wang Kang:
MixMixQ: Quantization with Mixed Bit-Sparsity and Mixed Bit-Width for CIM Accelerators. 537-540
Emerging Computing & Post-CMOS Technologies
- Sabrina Hassan Moon, Dayane Reis:
AFeCAM: An Energy Efficient Analog 1FeFET Content Addressable Memory. 541-545 - Fang Qi, Xin Fu, Xu Yuan, Nian-Feng Tzeng, Lu Peng:
A New Routing Strategy to Improve Success Rates of Quantum Computers. 546-550 - Sepehr Tabrizchi, Nedasadat Taheri, Shaahin Angizi, Arman Roohi:
RACSen: Residue Arithmetic and Chaotic Processing in Sensors to Enhance CMOS Imager Security. 551-555 - Satwik Kundu, Debarshi Kundu, Swaroop Ghosh:
Evaluating Efficacy of Model Stealing Attacks and Defenses on Quantum Neural Networks. 556-559
Hardware Security
- Siqin Liu, Saumya Chauhan, Avinash Karanth:
SNAC: Mitigation of Snoop-Based Attacks with Multi-Tier Security in NoC Architectures. 560-563 - Tasnuva Farheen, Sourav Roy, Andrew Cannon, Jia Di, Shahin Tajik, Domenic Forte:
Amnesiac Memory: A Self-Destructive Polymorphic Mechanism Against Cold Boot Data Remanence Attack. 564-568 - Ruochen Dai, Tuba Yavuz:
Detecting Hardware Trojans using Model Guided Symbolic Execution. 569-573 - Kuheli Pratihar, Soumi Chatterjee, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay:
Breaching the Gap: Modelling SRAM-PUFs via Side-Channel Signatures. 574-578 - Gwok-Waa Wan, Sam-Zaak Wong, Xi Wang:
Jailbreaking Pre-trained Large Language Models Towards Hardware Vulnerability Insertion Ability. 579-582 - Yankun Zhu, Siting Liu, Liyu Yang, Pingqiang Zhou:
LDL-SCA: Linearized Deep Learning Side-Channel Attack Targeting Multi-tenant FPGAs✱. 583-587 - Rasheed Almawzan, Atri Chatterjee, Aritra Dasgupta, Swarup Bhunia:
LISA: A Multi-Layered Iterative Framework for Hardening Obfuscation with Modular Unit Transformations. 588-591
VLSI for Machine Learning and Artificial Intelligence
- Zixi Liu, Yibo Lin, Xiaojing Su, Xiaohuan Ling, Xin Hong, Bojie Ma, Yajuan Su, Yayi Wei:
Automated Lithography Resolution Enhancement with Deep Learning Enabled Layout Modification during Physical Design Stage. 592-598 - Yunji Qin, Wenqi Lou, Chao Wang, Lei Gong, Xuehai Zhou:
Enhancing Long Sequence Input Processing in FPGA-Based Transformer Accelerators through Attention Fusion. 599-603 - Prashanth H. C., Madhav Rao:
Performance Analysis of OFA-NAS ResNet Topologies Across Diverse Hardware Compute Units. 604-607
Special Session 4: Low Power and Efficient Machine Learning: Moving Intelligence to the Edge
- Shay Snyder, Victoria Clerico, Guojing Cong, Shruti R. Kulkarni, Catherine D. Schuman, Sumedh R. Risbud, Maryam Parsa:
Transductive Spiking Graph Neural Networks for Loihi. 608-613 - Bokyung Kim, Hai Li, Yiran Chen:
Processing-in-Memory Designs Based on Emerging Technology for Efficient Machine Learning Acceleration. 614-619 - Banafsheh Saber Latibari, Soheil Salehi, Houman Homayoun, Avesta Sasan:
IRET: Incremental Resolution Enhancing Transformer. 620-625 - Ali Karkehabadi, Houman Homayoun, Avesta Sasan:
FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropogation. 626-632 - Sanket Shukla, Sathwika Bavikadi, Sai Manoj Pudukotai Dinakarrao:
Energy Harvesting-assisted Ultra-Low-Power Processing-in-Memory Accelerator for ML Applications. 633-638
Special Session 5: Next-generation Compute Acceleration with Emerging Circuits and Systems
- Seema G. Aarella, Venkata Prasanth Yanambaka, Saraju P. Mohanty, Elias Kougianos:
Fortified-Edge 4.0: A ML-Based Error Correction Framework for Secure Authentication in Collaborative Edge Computing. 639-644 - Vedant Karia, Abdullah M. Zyarah, Dhireesha Kudithipudi:
PositCL: Compact Continual Learning with Posit Aware Quantization. 645-650 - Shamiul Alam, Ahmedullah Aziz:
Ultra-Area-Efficient Cryogenic XNOR Logic Gate with Superconducting Heater Cryotron to Advance High-Performance Computing. 651-656 - Alakananda Mitra, Saraju P. Mohanty, Elias Kougianos:
ToEFL: A Novel Approach for Training on Edge in Smart Agriculture. 657-662 - Siamak Biglari, Ruixiao Huang, Hui Zhao, Saraju P. Mohanty:
Designing Reconfigurable Interconnection Network of Heterogeneous Chiplets Using Kalman Filter. 663-668
Special Session 6: Security-by-Design for Smart Electronics
- Venkata Prasanth Yanambaka, Ayas Kanta Swain, Saswat Kumar Ram, Saraju P. Mohanty:
Security-by-Design For Smart Electronics. 669 - Soumyashree Mangaraj, Jaganath Prasad Mohanty, Samit Ari, Ayas Kanta Swain, Kamalakanta Mahapatra:
PACAC: PYNQ Accelerated Cardiac Arrhythmia Classifier with secure transmission- A Deep Learning based Approach. 670-675 - Venkata Karthik Vishnu Vardhan Bathalapalli, Venkata Prasanth Yanambaka, Saraju P. Mohanty, Elias Kougianos:
PUFshield: A Hardware-Assisted Approach for Deepfake Mitigation Through PUF-Based Facial Feature Attestation. 676-681 - Samir Ahmed, Shakil Mahmud, Robert Karam:
Modular Security Evaluation Platform for Physiological Closed-Loop Control Systems. 682-687 - Pawan Oraon, Soumyashree Mangaraj, Ayas Kanta Swain, Kamalakanta Mahapatra:
Hardware Accelerated Quantized Hand Written Digit Recognition via High Level Synthesis. 688-693
Session 6A: IoT and Smart Systems II
- Uttej Kallakuri, Edward Humes, Tinoosh Mohsenin:
Resource-Aware Saliency-Guided Differentiable Pruning for Deep Neural Networks. 694-699 - Ping-Xiang Chen, Dongjoo Seo, Biswadip Maity, Nikil D. Dutt:
KDTree-SOM: Self-organizing Map based Anomaly Detection for Lightweight Autonomous Embedded Systems. 700-705 - Zhaojun Lu, Qidong Chen, Peng Xu, Jiliang Zhang, Gang Qu:
A Cryptographic Hardware Engineering Course based on FPGA and Security Analysis Equipment. 706-711
Session 6B: Emerging Computing & Post-CMOS Technologies III
- Nishanth Goud Chennagouni, Mashrafi Alam Kajol, Diliang Chen, Dongpeng Xu, Qiaoyan Yu:
Feature-driven Approximate Computing for Wearable Health-Monitoring Systems. 712-717 - Yutong Wang, Zhaojun Ni, Siting Liu:
Can Stochastic Computing Truly Tolerate Bit Flips? 718-723 - Mohammed Alawad, Md Ishak:
Probabilistic Bayesian Neural Networks for Efficient Inference. 724-729
Session 6C: VLSI for Machine Learning and Artificial Intelligence III
- Arash Fayyazi, Mahdi Nazemi, Arya Fayyazi, Massoud Pedram:
NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions. 730-735 - Siqin Liu, Prakash Chand Kuve, Avinash Karanth:
HSCONN: Hardware-Software Co-Optimization of Self-Attention Neural Networks for Large Language Models. 736-741 - Zhixiong Di, Xufeng Wei, Yiduo Chen, Shuanglong Wu, Peihao Sun, Qiang Wu:
A Remote FPGA-based Experimental Teaching System Design Supporting Single-board Multi-user and Multi-board Single-user Operations in MOOCs. 742-747
Special Session 7: AI for Science at Hardware Platforms
- Yi Sheng, Junhuan Yang, Youzuo Lin, Weiwen Jiang, Lei Yang:
Toward Fair Ultrasound Computing Tomography: Challenges, Solutions and Outlook. 748-753 - Junhuan Yang, Yi Sheng, Yuzhou Zhang, Hanchen Wang, Youzuo Lin, Lei Yang:
Enhanced AI for Science using Diffusion-based Generative AI - A Case Study on Ultrasound Computing Tomography. 754-759 - Yuxin Yang, Zixu Wang, Pegah Ahadian, Abby Jerger, Jeremy Zucker, Song Feng, Feixiong Cheng, Qiang Guan:
A Deep Multimodal Representation Learning Framework for Accurate Molecular Properties Prediction. 760-765 - Dharanidhar Dang, Priyabrata Dash, Ahmedullah Aziz:
P-ReTI: Silicon Photonic Accelerator for Greener and Real-Time AI. 766-769
Special Session 8: Signal Processing with Neuromorphic Computing
- Deniz Najafi, Sepehr Tabrizchi, Ranyang Zhou, Mohammadreza Amel Solouki, Andrew Marshall, Arman Roohi, Shaahin Angizi:
Hybrid Magneto-electric FET-CMOS Integrated Memory Design for Instant-on Computing. 770-775 - Shay Snyder, Sumedh R. Risbud, Maryam Parsa:
Asynchronous Neuromorphic Optimization in Lava. 776-778 - Brett Witherspoon, Aaron R. Young:
Event-Driven Sensing and Embedded Neuromorphic Platforms for Gamma Radiation Monitoring. 779-784 - Mst Shamim Ara Shawkat, Shante Hicks, Nahin Irfan:
Review of Neuromorphic Processing for Vision Sensors. 785-790
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