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20. MBMV 2017: Bremen, Germany
- Daniel Große, Rolf Drechsler:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February 8-9, 2017. Shaker Verlag 2017, ISBN 978-3-8440-4996-1 - Hananeh Aliee, Abbas BanaiyanMofrad, Michael Glaß, Jürgen Teich, Nikil D. Dutt:
Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores. MBMV 2017: 1-12 - Hussam Amrouch, Jörg Henkel:
Containing Guardbands: From the Macro to Micro Time Domain. MBMV 2017: 13-14 - Benjamin Beichler, Michael Rethfeldt, Hannes Raddatz, Björn Konieczek, Peter Danielis, Christian Haubelt, Dirk Timmermann:
Optimization of a novel WLAN Simulation Framework for Prototyping Network Applications and Protocols. MBMV 2017: 15-26 - Saman Fröhlich, Daniel Große, Rolf Drechsler:
Exakte BDD Minimierung mit Fehlerschranke für den Einsatz im Approximate Computing. MBMV 2017: 27-38 - Christoph Grimm, Carna Radojicic:
Extending Affine Arithmetic for Formal Verification of Analog/Mixed-Signal Systems. MBMV 2017: 39-40 - Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille:
Verifikation von Networked Labs-on-Chip Architekturen. MBMV 2017: 41-42 - Amrutansh Gudivada, Daniel Kriesten, Ulrich Heinkel, Rene Röllig, Matthias Lenk:
OpenCL- Design Flow for High Level Synthesis and Cross-Platform Portability. MBMV 2017: 43-50 - M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz:
Speculative disassembly of binary code. MBMV 2017: 51-52 - Felix Neubauer, Karsten Scheibler, Bernd Becker, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller, Detlef Fehrer:
Accurate Dead Code Detection in Embedded C Code by Arithmetic Constraint Solving. MBMV 2017: 53-54 - Thiyagarajan Purusothaman, Christoph Grimm:
SystemC AMS based Co-simulation Framework for Cyber Physical Systems. MBMV 2017: 55-66 - Heinz Riener, Rüdiger Ehlers, Görschwin Fey:
Counterexample-Guided EF Synthesis of Boolean Functions. MBMV 2017: 67-74 - Leonard Schneider, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler:
Einfluss von Zellformen auf das Routing von Digital Microfluidic Biochips. MBMV 2017: 75-78 - Tobias Seufert, Christoph Scholl:
Sequential Verification Using Reverse PDR. MBMV 2017: 79-90 - Sebastian Simon, Jérôme Kirscher, Alexander W. Rath, Zhiqiang Zhang, Linus Maurer:
Pre-silicon Verification of an Automotive Battery Management System in the Context of the Application. MBMV 2017: 91-102 - Patrick Sittel, Martin Kumm, Konrad Möller, Martin Hardieck, Peter Zipf:
High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits. MBMV 2017: 103-114 - Ralf Stemmer, Maher Fakih:
Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication. MBMV 2017: 115-116 - Tobias Strauch:
A Novel RTL ATPG Model Based on Gate Inherent Faults of Complex Gates. MBMV 2017: 117-128 - Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz:
Dynamic Power Optimization based on Formal Property Checking of Operations. MBMV 2017: 129-136
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