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ORCIDGanesh S. Dasika
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2020 – today
- 2021
[c14]Nishil Talati, Di Jin, Haojie Ye, Ajay Brahmakshatriya, Ganesh S. Dasika, Saman P. Amarasinghe, Trevor N. Mudge, Danai Koutra, Ronald G. Dreslinski:
A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning. IISWC 2021: 87-100
2010 – 2019
- 2017
- [c13]Jiecao Yu, Andrew Lukefahr, David J. Palframan, Ganesh S. Dasika, Reetuparna Das, Scott A. Mahlke:
Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism. ISCA 2017: 548-560 - 2014
- [j5]Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull:
A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2290-2298 (2014) - 2013
- [c12]Ankit Sethia, Ganesh S. Dasika, Mehrzad Samadi, Scott A. Mahlke:
APOGEE: Adaptive prefetching on GPUs for energy efficiency. PACT 2013: 73-82 - [c11]Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull:
A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation. CICC 2013: 1-4 - 2012
- [j4]Ankit Sethia, Ganesh S. Dasika, Trevor N. Mudge, Scott A. Mahlke:
A Customized Processor for Energy Efficient Scientific Computing. IEEE Trans. Computers 61(12): 1711-1723 (2012) - 2011
- [b1]Ganesh S. Dasika:
Power-Efficient Accelerators for High-Performance Applications. University of Michigan, USA, 2011 - [j3]David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw:
A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation. IEEE J. Solid State Circuits 46(1): 18-31 (2011) - [j2]David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw:
Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation". IEEE J. Solid State Circuits 46(3): 705 (2011) - [c10]Ganesh S. Dasika, Ankit Sethia, Trevor N. Mudge, Scott A. Mahlke:
PEPSC: A Power-Efficient Processor for Scientific Computing. PACT 2011: 101-110 - 2010
- [c9]Ganesh S. Dasika, Ankit Sethia, Vincentius Robby, Trevor N. Mudge, Scott A. Mahlke:
MEDICS: ultra-portable processing for medical image reconstruction. PACT 2010: 181-192 - [c8]Shantanu Gupta, Shuguang Feng, Amin Ansari, Ganesh S. Dasika, Scott A. Mahlke:
CoreGenesis: erasing core boundaries for robust and configurable performance. PACT 2010: 571-572 - [c7]Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Clark, Trevor N. Mudge, Scott A. Mahlke:
Mighty-morphing power-SIMD. CASES 2010: 67-76 - [c6]David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw:
A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation. ISSCC 2010: 284-285
2000 – 2009
- 2009
- [c5]Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke:
Bridging the computation gap between programmable processors and hardwired accelerators. HPCA 2009: 313-322 - [c4]Ganesh S. Dasika, Kevin Fan, Scott A. Mahlke:
Power-efficient medical image processing using PUMA. SASP 2009: 29-34 - 2008
- [c3]Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott A. Mahlke, David M. Bull:
DVFS in loop accelerators using BLADES. DAC 2008: 894-897 - 2005
- [j1]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown:
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Trans. Computers 54(8): 998-1012 (2005) - [c2]Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown:
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. CGO 2005: 179-190 - 2003
- [c1]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown:
Increasing the number of effective registers in a low-power processor using a windowed register file. CASES 2003: 125-136
Coauthor Index
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