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ORCIDIEEE Transactions on Computers, Volume 54
Volume 54, Number 1, January 2005
- Gam D. Nguyen:
Error-Detection Codes: Algorithms and Fast Implementation. 1-11 - Marcelo E. Kaihara, Naofumi Takagi
:
A Hardware Algorithm for Modular Multiplication/Division. 12-21 - Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero:
Software Trace Cache. 22-35 - Harshavardhan Sabbineni, Krishnendu Chakrabarty:
Location-Aided Flooding: An Energy-Efficient Data Dissemination Protocol for Wireless Sensor Networks. 36-46 - Tei-Wei Kuo, Yung-Sheng Chao, Chin-Fu Kuo, Cheng Chang:
Real-Time Dwell Scheduling of Component-Oriented Phased Array Radars. 47-60 - Ismet Bayraktaroglu, Alex Orailoglu:
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations. 61-75 - Chidamber Kulkarni, C. Ghez, Miguel Miranda, Francky Catthoor, Hugo De Man:
Cache Conscious Data Layout Organization for Conflict Miss Reduction in Embedded Multimedia Applications. 76-81 - Peter G. Sassone, D. Scott Wills:
Scaling Up the Atlas Chip-Multiprocessor. 82-87 - Ganesan Umanesan, Eiji Fujiwara:
Parallel Decoding Cyclic Burst Error Correcting Codes. 87-92
Volume 54, Number 2, February 2005
- Viktor K. Prasanna, Fabrizio Lombardi:
Editor's Note. 97-
- Arash Reyhani-Masoleh, M. Anwar Hasan:
Low Complexity Word-Level Sequential Normal Basis Multipliers. 98-110 - Peter-Michael Seidel, Lee D. McFearin, David W. Matula:
Secondary Radix Recodings for Higher Radix Multipliers. 111-123 - Xiaoyu Ruan, Rajendra S. Katti:
Left-to-Right Optimal Signed-Binary Representation of a Pair of Integers. 124-131 - Augustus K. Uht:
Uniprocessor Performance Enhancement through Adaptive Clock Frequency Control. 132-140 - James Burns, Jean-Luc Gaudiot:
Area and System Clock Effects on SMT/CMP Throughput. 141-152 - Martin Omaña, Daniele Rossi, Cecilia Metra:
Low Cost and High Speed Embedded Two-Rail Code Checker. 153-164 - Pao-Lien Lai, Jimmy J. M. Tan, Chien-Ping Chang, Lih-Hsing Hsu:
Conditional Diagnosability Measures for Large Multiprocessor Systems. 165-175 - Jianxi Fan, Xiaola Lin:
The t/k-Diagnosability of the BC Graphs. 176-184 - Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta:
Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache. 185-197 - Marco Caccamo, Giorgio C. Buttazzo, Deepu C. Thomas:
Efficient Reclaiming in Reservation-Based Real-Time Systems with Variable Execution Times. 198-213 - Haibin Lu:
A Novel High-Order Tree for Secure Multicast Key Management. 214-224
- Giorgos Dimitrakopoulos, Dimitris Nikolos:
High-Speed Parallel-Prefix VLSI Ling Adders. 225-231 - Luca G. Tallini:
Bounds on the Capacity of the Unidirectional Channels. 232-235 - Maxim Teslenko, Andrés Martinelli, Elena Dubrova:
Bound-Set Preserving ROBDD Variable Orderings May Not Be Optimum. 236-237 - Hyogon Kim, Jin-Ho Kim, Inhye Kang, Saewoong Bahk:
Preventing Session Table Explosion in Packet Inspection Computers. 238-240
Volume 54, Number 3, March 2005
- Guest Editors' Introduction: Special Issue on Computer Arithmetic. 241-242
- Sorin Dan Cotofana, Casper Lageweg, Stamatis Vassiliadis:
Addition Related Arithmetic Operations via Controlled Transport of Charge. 243-256 - Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller:
Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables. 257-271 - Zhijun Huang, Milos D. Ercegovac:
High-Performance Low-Power Left-to-Right Array Multiplier Design. 272-283 - Albert Danysh, Dimitri Tan:
Architecture and Implementation of a Vector/SIMD Multiply-Accumulate Unit. 284-293 - Peter Kornerup:
Digit Selection for SRT Division and Square Root. 294-303 - José-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, Javier D. Bruguera:
High-Speed Function Approximation Using a Minimax Quadratic Interpolator. 304-318 - Florent de Dinechin, Arnaud Tisserand:
Multipartite Table Methods. 319-330 - Nicolas Brisebarre, David Defour, Peter Kornerup, Jean-Michel Muller, Nathalie Revol:
A New Range-Reduction Algorithm. 331-339 - Damien Stehlé, Vincent Lefèvre, Paul Zimmermann:
Searching Worst Cases of a One-Variable Function Using Lattice Reduction. 340-346 - Tomás Lang, Elisardo Antelo:
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics. 347-361 - Peter L. Montgomery:
Five, Six, and Seven-Term Karatsuba-Like Formulae. 362-369 - Amir K. Daneshbeh, M. Anwarul Hasan:
A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over GF(2m). 370-380
Volume 54, Number 4, April 2005
- Dror Baron, Yoram Bresler:
Antisequential Suffix Sorting for BWT-Based Data Compression. 385-397 - Stergios V. Anastasiadis, Peter J. Varman, Jeffrey Scott Vitter, Ke Yi:
Optimal Lexicographic Shaping of Aggregate Streaming Data. 398-408 - Zhiyuan Ren, Bruce H. Krogh, Radu Marculescu:
Hierarchical Adaptive Dynamic Power Management. 409-420 - Markus Volkmer, Sebastian Wallner:
Tree Parity Machine Rekeying Architectures. 421-427 - Arnold L. Rosenberg, Matthew Yurkewych:
Guidelines for Scheduling Some Common Computation-Dags for Internet-Based Computing. 428-438 - Jiwu Shu, Bigang Li, Weimin Zheng:
Design and Implementation of an SAN System Based on the Fiber Channel Protocol. 439-448 - Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev:
Design and Analysis of Dual-Rail Circuits for Security Applications. 449-460 - Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis:
Software-Based Self-Testing of Embedded Processors. 461-475 - Ioannis Voyiatzis:
Test Vector Embedding into Accumulator-Generated Sequences: A Linear-Time Solution. 476-484
- Haining Fan, Yiqi Dai:
Fast Bit-Parallel GF(2^n) Multiplier for All Trinomials. 485-490 - Costas Efstathiou, Haridimos T. Vergos, Giorgos Dimitrakopoulos, Dimitris Nikolos:
Efficient Diminished-1 Modulo 2^n+1 Multipliers. 491-496
Volume 54, Number 5, May 2005
- Jürgen Abel, William John Teahan:
Universal Text Preprocessing for Data Compression. 497-507 - Jeffrey A. Barnett:
Dynamic Task-Level Voltage Scheduling Optimizations. 508-520 - V. C. Ravikumar, Rabi N. Mahapatra, Laxmi N. Bhuyan:
EaseCAM: An Energy and Storage Efficient TCAM-Based Router Architecture for IP Lookup. 521-533 - Rajgopal Kannan:
The KR-Benes Network: A Control-Optimal Rearrangeable Permutation Network. 534-544 - Haibin Lu, Kun Suk Kim, Sartaj K. Sahni:
Prefix and Interval-Partitioned Dynamic IP Router-Tables. 545-557 - Elia Ardizzoni, Alan A. Bertossi, Maria Cristina Pinotti, Shashank Ramaprasad, Romeo Rizzi, Madhusudana V. S. Shashanka:
Optimal Skewed Data Allocation on Multiple Channels with Flat Broadcast per Channel. 558-572 - Mazen Kharbutli, Yan Solihin, Jaejin Lee:
Eliminating Conflict Misses Using Prime Number-Based Cache Indexing. 573-586 - Qingbo Zhu, Yuanyuan Zhou:
Power-Aware Storage Cache Management. 587-602 - Dimiter R. Avresky, Natcho H. Natchev:
Dynamic Reconfiguration in Computer Clusters with Irregular Topologies in the Presence of Multiple Node and Link Failures. 603-615 - Jianchang Yang, Qiangfeng Jiang, D. Manivannan, Mukesh Singhal:
A Fault-Tolerant Distributed Channel Allocation Scheme for Cellular Networks. 616-269 - Jun Yang, Lan Gao, Youtao Zhang:
Improving Memory Encryption Performance in Secure Processors. 630-640
Volume 54, Number 6, June 2005
- Trevor N. Mudge:
Introduction to the Special Section on Energy Efficient Computing. 641- - Masanori Hariyama, Tetsuya Aoyama, Michitaka Kameyama:
Genetic Approach to Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages. 642-650 - Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
Charge-Recovery Computing on Silicon. 651-659 - Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das:
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. 660-671 - Murali Jayapala, Francisco Barat, Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck:
Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors. 672-683 - Brett H. Meyer, Joshua J. Pieper, JoAnn M. Paul, Jeffrey E. Nelson, Sean M. Pieper, Anthony G. Rowe:
Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors. 684-697 - Allen C. Cheng, Gary S. Tyson:
An Energy Efficient Instruction Set Synthesis Framework for Low Power Embedded System Designs. 698-713 - Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan:
Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations. 714-726 - Benton H. Calhoun, Denis C. Daly, Naveen Verma, Daniel F. Finchelstein, David D. Wentzloff, Alice Wang, Seong-Hwan Cho, Anantha P. Chandrakasan:
Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes. 727-740 - Jessica H. Tseng, Krste Asanovic:
A Speculative Control Scheme for an Energy-Efficient Banked Register Fil. 741-751 - Swarup Bhunia, Animesh Datta, Nilanjan Banerjee, Kaushik Roy:
GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. 752-766
- Bugra Gedik, Ling Liu:
A Scalable Peer-to-Peer Architecture for Distributed Information Monitoring Applications. 767-782
Volume 54, Number 7, July 2005
- Viktor K. Prasanna:
Editor's Note. 785-787
- Robert B. Reese, Mitchell A. Thornton, Cherrice Traver:
A Coarse-Grain Phased Logic CPU. 788-799 - Hans Vandierendonck, Koenraad De Bosschere:
XOR-Based Hash Functions. 800-812 - Haibin Lu, Sartaj Sahni:
A B-Tree Dynamic Router-Table Design. 813-824 - Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong:
FPU Implementations with Denormalized Numbers. 825-836 - Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli:
Digit-Recurrence Dividers with Reduced Logical Depth. 837-851 - Robert Granger, Dan Page, Martijn Stam:
Hardware and Software Normal Basis Arithmetic for Pairing-Based Cryptography in Characteristic Three. 852-860 - Thomas J. Wollinger, Jan Pelzl, Christof Paar:
Cantor versus Harley: Optimization and Analysis of Explicit Formulae for Hyperelliptic Curve Cryptosystems. 861-872 - Xuehong Sun, Yiqiang Q. Zhao:
An On-Chip IP Address Lookup Algorithm. 873-885 - Sanghamitra Roy, Prith Banerjee:
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. 886-896 - Huiyang Zhou, Thomas M. Conte:
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction. 897-912
- André Seznec, Roger Espasa:
Conflict-Free Accesses to Strided Vectors on a Banked Cache. 913-196 - Byeong Kil Lee, Lizy Kurian John:
Implications of Executing Compression and Encryption Applications on General Purpose Processors. 917-922 - Carlos Álvarez, Jesús Corbal, Mateo Valero:
Fuzzy Memoization for Floating-Point Multimedia Applications. 922-927
Volume 54, Number 8, August 2005
- Tao Tao, Amar Mukherjee:
Pattern Matching in LZW Compressed File. 929-938 - Song Jiang, Xiaodong Zhang:
Making LRU Friendly to Weak Locality Workloads: A Novel Replacement Algorithm to Improve Buffer Cache Performance. 939-952 - Robert D. Kenney, Michael J. Schulte:
High-Speed Multioperand Decimal Adders. 953-963 - Jianbin Wei, Xiaobo Zhou, Cheng-Zhong Xu:
Robust Processing Rate Allocation for Proportional Slowdown Differentiation on Internet Servers. 964-977 - Yi Zou, Krishnendu Chakrabarty:
A Distributed Coverage- and Connectivity-Centric Technique for Selecting Active Nodes in Wireless Sensor Networks. 978-991 - Berk Sunar:
An Efficient Basis Conversion Algorithm for Composite Fields with Given Representations. 992-997 - Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown:
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. 998-1012 - Arjan Durresi, Vamsi Paruchuri, S. Sitharama Iyengar, Rajgopal Kannan:
Optimized Broadcast Protocol for Sensor Networks. 1013-1024 - Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Resve A. Saleh:
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures. 1025-1040
Volume 54, Number 9, September 2005
- Jon T. Butler, Tsutomu Sasao, Munehiro Matsuura:
Average Path Length of Binary Decision Diagrams. 1041-1053 - Stephen Bique:
New Characterizations of 2D Discrete Cosine Transform. 1054-1060 - Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou, Erl-Huei Lu:
Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m). 1061-1070 - Gui Liang Feng, Robert H. Deng, Feng Bao, Jia-Chen Shen:
New Efficient MDS Array Codes for RAID Part I: Reed-Solomon-Like Codes for Tolerating Three Disk Failures. 1071-1080 - Joongseok Park, Sartaj Sahni:
Maximum Lifetime Broadcasting in Wireless Networks. 1081-1090 - Li Xiao, Yunhao Liu, Lionel M. Ni:
Improving Unstructured Peer-to-Peer Systems by Adaptive Connection Establishment. 1091-1103 - Andreas Ermedahl, Friedhelm Stappert, Jakob Engblom:
Clustered Worst-Case Execution-Time Calculation. 1104-1122 - Krishna V. Palem:
Energy Aware Computing through Probabilistic Switching: A Study of Limits. 1123-1137 - Haisang Wu, Binoy Ravindran, E. Douglas Jensen, Peng Li:
Time/Utility Function Decomposition Techniques for Utility Accrual Scheduling Algorithms in Real-Time Distributed Systems. 1138-1153 - Alexandre Petrenko, Nina Yevtushenko:
Testing from Partial Deterministic FSM Specifications. 1154-1165 - Hamidreza Hashempour, Fabrizio Lombardi:
Application of Arithmetic Coding to Compression of VLSI Test Data. 1166-1177
- Julian Satran, Dafna Sheinwald, Ilan Shimony:
Out of Order Incremental CRC Computation. 1178-1181
- Qingchun Chen, Kam-yiu Lam, Pingzhi Fan:
Comments on "Distributed Bayesian Algorithms for Fault-Tolerant Event Region Detection in Wireless Sensor Networks'. 1182-1183
Volume 54, Number 10, October 2005
- Wen-mei W. Hwu, Krishna V. Palem:
Guest Editors' Introduction. 1185-1187 - Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean:
Supporting Demanding Hard-Real-Time Systems with STI. 1188-1202 - Ann Gordon-Ross, Frank Vahid:
Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware. 1203-1215 - Partha Biswas, Nikil D. Dutt:
Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using Instruction Set Extensions. 1216-1226 - Enric Gibert, F. Jesús Sánchez, Antonio González:
Distributed Data Cache Designs for Clustered VLIW Processors. 1227-1241 - Alain Darte, Robert Schreiber, Gilles Villard:
Lattice-Based Memory Allocation. 1242-1257 - Nathan Clark, Hongtao Zhong, Scott A. Mahlke:
Automated Custom Instruction Generation for Domain-Specific Processor Acceleration. 1258-1270
- Nicolas Boullis, Arnaud Tisserand:
Some Optimizations of Hardware Multiplication by Constant Matrices. 1271-1282 - Deng Pan, Yuanyuan Yang:
FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches. 1283-1297 - Yung-Yuan Chen:
Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring. 1298-1313 - Zoran Dimitrijevic, Raju Rangaswami, Edward Y. Chang:
Systems Support for Preemptive Disk Scheduling. 1314-1326
Volume 54, Number 11, November 2005
- Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, Nana B. Sam:
The VPC Trace-Compression Algorithms. 1329-1344 - José L. Núñez-Yáñez, Vassilios A. Chouliaras:
A Configurable Statistical Lossless Compression Core Based on Variable Order Markov Modeling and Arithmetic Coding. 1345-1359 - Joshua J. Yi, David J. Lilja, Douglas M. Hawkins:
Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor. 1360-1373 - François Arnault, Thierry P. Berger:
Design and Properties of a New Pseudorandom Generator Based on a Filtered FCSR Automaton. 1374-1383 - Sudipta Rakshit, Ratan K. Guha:
Fair Bandwidth Sharing in Distributed Systems: A Game-Theoretic Approach. 1384-1393 - Hyong-youb Kim, Scott Rixner, Vijay S. Pai:
Network Interface Data Caching. 1394-1408 - Amitava Datta:
A Fault-Tolerant Protocol for Energy-Efficient Permutation Routing in Wireless Networks. 421 - Chengdu Huang, Tarek F. Abdelzaher:
Bounded-Latency Content Distribution: Feasibility and Evaluation. 1422-1437 - Punit Chandra, Ajay D. Kshemkalyani:
Causality-Based Predicate Detection across Space and Time. 1438-1453
- Majid Khabbazian, T. Aaron Gulliver, Vijay K. Bhargava:
A New Minimal Average Weight Representation for Left-to-Right Point Multiplication Methods. 1454-1459 - Kanghee Kim, José Luis Díaz, Lucia Lo Bello, José María López, Chang-Gun Lee, Sang Lyul Min:
An Exact Stochastic Analysis of Priority-Driven Periodic Real-Time Systems and Its Approximations. 1460-1466 - James Chien-Mo Li:
Diagnosis of Multiple Hold-Time and Setup-Time Faults in Scan Chains. 1467-1472
Volume 54, Number 12, December 2005
- Gui Liang Feng, Robert H. Deng, Feng Bao, Jia-Chen Shen:
New Efficient MDS Array Codes for RAID Part II: Rabin-Like Codes for Tolerating Multiple (greater than or equal to 4) Disk Failures. 1473-1483 - Jens-Peter Kaps, Kaan Yüksel, Berk Sunar:
Energy Scalable Universal Hashing. 1484-1495 - Aneesh Aggarwal, Manoj Franklin:
Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. 1496-1507 - Erkay Savas:
A Carry-Free Architecture for Montgomery Inversion. 1508-1519 - Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk:
Optimizing Hardware Function Evaluation. 1520-1531 - Matthew W. Heath, Wayne P. Burleson, Ian G. Harris:
Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test. 1532-1546 - Wei Zhang:
Replication Cache: A Small Fully Associative Cache to Improve Data Cache Reliability. 1547-1555 - Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt:
An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors. 1556-1571 - Michael A. Palis:
The Granularity Metric for Fine-Grain Real-Time Scheduling. 1572-1583 - Mainak Chatterjee, Giridhar D. Mandyam, Sajal K. Das:
Joint Reliability of Medium Access Control and Radio Link Protocol in 3G CDMA Systems. 1584-1597 - James Chin, Mehrdad Nourani:
FITS: An Integrated ILP-Based Test Scheduling Environment. 1598-1613 - Christoforos N. Hadjicostis:
Aliasing Probability Calculations for Arbitrary Compaction under Independently Selected Random Test Vectors. 1614-1627
- Ku-Young Chang, Dowon Hong, Hyun Sook Cho:
Low Complexity Bit-Parallel Multiplier for GF(2^m) Defined by All-One Polynomials Using Redundant Representation. 1628-1630
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