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ORCIDAngshuman Parashar
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2020 – today
- 2024
[c23]Qijing Huang, Po-An Tsai, Joel S. Emer, Angshuman Parashar:
Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms. ISCA 2024: 150-166- 2023
- [c22]Michael Gilbert, Yannan Nellie Wu, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators. ISPASS 2023: 316-318 - [c21]Yannan Nellie Wu
, Po-An Tsai, Saurav Muralidharan, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity. MICRO 2023: 1106-1120 - [i9]Yannan Nellie Wu, Po-An Tsai, Saurav Muralidharan, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity. CoRR abs/2305.12718 (2023) - 2022
- [j7]Sheng-Chun Kao, Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
A Formalism of DNN Accelerator Flexibility. Proc. ACM Meas. Anal. Comput. Syst. 6(2): 41:1-41:23 (2022) - [j6]Prasanth Chatarasi, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Tushar Krishna, Vivek Sarkar:
Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators. ACM Trans. Archit. Code Optim. 19(1): 6:1-6:26 (2022) - [c20]Sheng-Chun Kao, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators. DATE 2022: 232-237 - [c19]Sheng-Chun Kao, Angshuman Parashar, Po-An Tsai, Tushar Krishna:
Demystifying Map Space Exploration for NPUs. IISWC 2022: 269-281 - [c18]Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi:
Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization. ISPASS 2022: 254-266 - [c17]Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling. MICRO 2022: 1377-1395 - [c16]Sheng-Chun Kao, Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
A Formalism of DNN Accelerator Flexibility. SIGMETRICS (Abstracts) 2022: 53-54 - [i8]Eric Qin, Raveesh Garg, Abhimanyu Bambhaniya, Michael Pellauer, Angshuman Parashar, Sivasankaran Rajamanickam, Cong Hao, Tushar Krishna:
Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity. CoRR abs/2201.08916 (2022) - [i7]Sheng-Chun Kao, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators. CoRR abs/2201.11220 (2022) - [i6]Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling. CoRR abs/2205.05826 (2022) - [i5]Sheng-Chun Kao, Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
A Formalism of DNN Accelerator Flexibility. CoRR abs/2206.02987 (2022) - [i4]Sheng-Chun Kao, Angshuman Parashar, Po-An Tsai, Tushar Krishna:
Demystifying Map Space Exploration for NPUs. CoRR abs/2210.03731 (2022) - 2021
- [j5]Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar, Tushar Krishna:
Flexion: A Quantitative Metric for Flexibility in DNN Accelerators. IEEE Comput. Archit. Lett. 20(1): 1-4 (2021) - [c15]Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Sivasankaran Rajamanickam, Roberto Gioiosa, Tushar Krishna:
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators. PACT 2021: 30-44 - [c14]Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher:
Mind mappings: enabling efficient algorithm-accelerator mapping space search. ASPLOS 2021: 943-958 - [c13]Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators. ISPASS 2021: 232-234 - [i3]Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher:
Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search. CoRR abs/2103.01489 (2021) - [i2]Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Sivasankaran Rajamanickam, Roberto Gioiosa, Tushar Krishna:
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators. CoRR abs/2109.07419 (2021) - 2020
- [b1]Tushar Krishna, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Ananda Samajdar:
Data Orchestration in Deep Learning Accelerators. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2020, ISBN 978-3-031-00639-5 - [j4]Hyoukjun Kwon, Prasanth Chatarasi, Vivek Sarkar, Tushar Krishna, Michael Pellauer, Angshuman Parashar:
MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings. IEEE Micro 40(3): 20-29 (2020)
2010 – 2019
- 2019
- [c12]Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer:
Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS 2019: 304-315 - [c11]Hyoukjun Kwon, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, Tushar Krishna:
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflow: A Data-Centric Approach. MICRO 2019: 754-768 - 2017
- [c10]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. ISCA 2017: 27-40 - [i1]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. CoRR abs/1708.04485 (2017) - 2015
- [j3]Michael Pellauer, Angshuman Parashar, Michael Adler, Bushra Ahsan, Randy L. Allmon, Neal Clayton Crago, Kermin Fleming, Mohit Gambhir, Aamer Jaleel, Tushar Krishna, Daniel Lustig, Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, Joel S. Emer:
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures. ACM Trans. Comput. Syst. 33(3): 10:1-10:32 (2015) - 2014
- [j2]Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer:
Efficient Spatial Processing Element Control via Triggered Instructions. IEEE Micro 34(3): 120-137 (2014) - 2013
- [c9]Peng Li, Angshuman Parashar, Michael Pellauer, Tao Wang, Joel S. Emer:
A Hierarchical Architectural Framework for Reconfigurable Logic Computing. IPDPS Workshops 2013: 287-292 - [c8]Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer:
Triggered instructions: a control paradigm for spatially-programmed architectures. ISCA 2013: 142-153 - 2012
- [c7]Kermin Elliott Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel S. Emer:
Leveraging latency-insensitivity to ease multiple FPGA design. FPGA 2012: 175-184 - 2011
- [c6]Michael Adler, Kermin Fleming, Angshuman Parashar, Michael Pellauer, Joel S. Emer:
Leap scratchpads: automatic memory and cache management for reconfigurable logic. FPGA 2011: 25-28 - [c5]Michael Pellauer, Michael Adler, Michel A. Kinsy, Angshuman Parashar, Joel S. Emer:
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing. HPCA 2011: 406-417
2000 – 2009
- 2007
- [c4]Niranjan Soundararajan, Angshuman Parashar, Anand Sivasubramaniam:
Mechanisms for bounding vulnerabilities of processor structures. ISCA 2007: 506-515 - 2006
- [c3]Angshuman Parashar, Anand Sivasubramaniam, Sudhanva Gurumurthi:
SlicK: slice-based locality exploitation for efficient redundant multithreading. ASPLOS 2006: 95-105 - 2004
- [j1]Puneet Sharma, Angshuman Parashar, Subhashis Banerjee, Prem Kumar Kalra:
An uncalibrated lightfield acquisition system. Image Vis. Comput. 22(14): 1197-1202 (2004) - [c2]Angshuman Parashar, Sudhanva Gurumurthi, Anand Sivasubramaniam:
A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy. ISCA 2004: 376-386 - 2002
- [c1]Puneet Sharma, Angshuman Parashar, Subhashis Banerjee, Prem Kumar Kalra:
An Uncalibrated Lightfield Acquisition System. ICVGIP 2002
Coauthor Index
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last updated on 2024-10-21 20:31 CEST by the dblp team
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