56th MICRO 2023: Toronto, ON, Canada

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Best Paper Session

Session 1A: Accelerators Based on HW/SW Co-Design Accelerators for Matrix Processing

Session 1B: Architectural Support/ Programming Languages, Case Study

Session 1C: Design Automation, Synthesis, Hardware Generation

Session 2A: ML Design Space ExplorationGeneration

Session 2B: Microarchitecture

Session 2C: Accelerators for Graphs, Robotics

Session 3A: ML Sparsity

Session 3B: GPUs

Session 4A: ML Architecture

Session 4B: Quantum

Session 4C: Emerging Technologies: Superconducting, Photonics, DNA

Session 5A: Security Encryption/Confidentiality Support

Session 5B: Prefetching

Session 5C: Processing-In-Memory

Session 6A: Security Hardware

Session 6B: Datacenter Networks

Session 6C: Reliability, Availability

Session 7A: Accelerators Various

Session 7B: Caches, Intermitent Computing, Persistency

Session 8A: Accelerators for Neural Nets Accelerators for Matrix Processing

Session 8B: Virtual Memory (Translation)

Session 8C: Benchmarking and Methodology

Session 9A: Accelerators in Processors

Session 9B: ML Compiler Optimizations/ Reconfigurable Architectures

Session 9C: Domain Specific Genomics