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Kevin J. M. Martin

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affiliation: University of Southern Brittany, France
affiliation (PhD 2010): University of Rennes 1, France

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2020 – today

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2024
[j10]
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Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs. IEEE Trans. Parallel Distributed Syst. 35(7): 1293-1306 (2024)
[c31]
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Joseph W. Faye, Naouel Haggui, Florent Kermarrec, Kevin J. M. Martin, Shuvra S. Bhattacharyya, Jean-François Nezan, Maxime Pelcat:
Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications. DASIP 2024: 68-79
[c30]
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Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications. DASIP 2024: 83-95
2023
[b2]
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Kevin J. M. Martin:
Mapping parallel applications on parallel architectures: Granularity of parallelism and synchronisation. University of Southern Brittany, France, 2023
[j9]
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Satyajit Das, Kevin J. M. Martin, Thomas Peyret, Philippe Coussy:
An Efficient and Flexible Stochastic CGRA Mapping Approach. ACM Trans. Embed. Comput. Syst. 22(1): 8:1-8:24 (2023)
2022
[j8]
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Mostafa Rizk, Kevin J. M. Martin, Jean-Philippe Diguet:
Run-Time Remapping Algorithm of Dataflow Actors on NoC-Based Heterogeneous MPSoCs. IEEE Trans. Parallel Distributed Syst. 33(10): 3959-3976 (2022)
[j7]
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Alemeh Ghasemi, Marcelo Ruaro, Rodrigo Cataldo, Jean-Philippe Diguet, Kevin J. M. Martin:
The Impact of Cache and Dynamic Memory Management in Static Dataflow Applications. J. Signal Process. Syst. 94(7): 721-738 (2022)
[j6]
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Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Energy Efficient Hardware Loop Based Optimization for CGRAs. J. Signal Process. Syst. 94(9): 895-912 (2022)
[c29]
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Marcelo Ruaro, Kevin J. M. Martin:
ManyGUI: A Graphical Tool to Accelerate Many-core Debugging Through Communication, Memory, and Energy Profiling. DroneSE/RAPIDO@HiPEAC 2022: 39-46
[c28]
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Kevin J. M. Martin:
Twenty Years of Automated Methods for Mapping Applications on CGRA. IPDPS Workshops 2022: 679-686
[c27]
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Navonil Chatterjee, Marcelo Ruaro, Kevin J. M. Martin, Jean-Philippe Diguet:
Mitigating Transceiver and Token Controller Permanent Faults in Wireless Network-on-Chip. PDP 2022: 238-245
2021
[j5]
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Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Jarbas Silveira, Gustavo Sanchez, Johanna Sepúlveda, César A. M. Marcon, Jean-Philippe Diguet:
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization. IEEE Trans. Parallel Distributed Syst. 32(5): 1102-1116 (2021)
[j4]
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Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Floating Point CGRA based Ultra-Low Power DSP Accelerator. J. Signal Process. Syst. 93(10): 1159-1171 (2021)
[c26]
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Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Hardware Based Loop Optimization for CGRA Architectures. ARC 2021: 65-80
[c25]
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Alemeh Ghasemi, Rodrigo Cataldo, Jean-Philippe Diguet, Kevin J. M. Martin:
On Cache Limits for Dataflow Applications and Related Efficient Memory Management Strategies. DASIP 2021: 68-76
2020
[c24]
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Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Giuseppe Tagliavini, Philippe Coussy, Luca Benini, Davide Rossi:
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE. DATE 2020: 1067-1072
[c23]
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Satyajit Das, Rohit Prasad, Kevin J. M. Martin, Philippe Coussy:
Energy Efficient Acceleration Of Floating Point Applications Onto CGRA. ICASSP 2020: 1563-1567

2010 – 2019

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2019
[j3]
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Satyajit Das, Kevin J. M. Martin, Davide Rossi, Philippe Coussy, Luca Benini:
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1095-1108 (2019)
[c22]
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Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs. DATE 2019: 336-341
2018
[c21]
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Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Johanna Sepúlveda, Altamiro Amadeu Susin, César A. M. Marcon, Jean-Philippe Diguet:
Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications. DAC 2018: 83:1-83:6
[c20]
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Hugo Miomandre, Julien Hascoët, Karol Desnos, Kevin J. M. Martin, Benoît Dupont de Dinechin, Jean-François Nezan:
Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures. PARMA-DITAM@HiPEAC 2018: 51-56
[c19]
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Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi:
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics. ISCAS 2018: 1-5
[c18]
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  - conf/socc/MondalCMMDD18
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Hemanta Kumar Mondal, Rodrigo Cadore Cataldo, César Augusto Missio Marcon, Kevin J. M. Martin, Sujay Deb, Jean-Philippe Diguet:
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing. SoCC 2018: 1-6
2017
[j2]
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Thanh Dinh Ngo, Kevin J. M. Martin, Jean-Philippe Diguet:
Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs. J. Signal Process. Syst. 87(1): 63-80 (2017)
[c17]
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Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi, Luca Benini:
Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures. ASP-DAC 2017: 127-132
[c16]
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Satyajit Das, Davide Rossi, Kevin J. M. Martin, Philippe Coussy, Luca Benini:
A 142MOPS/mW integrated programmable array accelerator for smart visual processing. ISCAS 2017: 1-4
2016
[c15]
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Kevin J. M. Martin, Mostafa Rizk, Martha Johanna Sepúlveda, Jean-Philippe Diguet:
Notifying memories: a case-study on data-flow applications with NoC interfaces implementation. DAC 2016: 35:1-35:6
[c14]
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Pierre Langlois, Kevin J. M. Martin, Eduardo Juárez Martínez:
Demo Night. DASIP 2016: 222
[c13]
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Satyajit Das, Thomas Peyret, Kevin J. M. Martin, Gwenolé Corre, Mathieu Thevenin, Philippe Coussy:
A Scalable Design Approach to Efficiently Map Applications on CGRAs. ISVLSI 2016: 655-660
2015
[c12]
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Kevin J. M. Martin, Yvan Eustache, Jean-Philippe Diguet, Thanh Dinh Ngo, Emmanuel Casseau, Yaset Oliva:
Compa backend: A dynamic runtime for the execution of dataflow programs onto multi-core platforms. DASIP 2015: 1-2
[c11]
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Paola Vallejo, Mickaël Kerboeuf, Kevin J. M. Martin, Jean-Philippe Babau:
Improving reuse by means of asymmetrical model migrations: An application to the Orcc case study. MoDELS 2015: 358-367
2014
[c10]
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Thomas Peyret, Gwenolé Corre, Mathieu Thevenin, Kevin J. M. Martin, Philippe Coussy:
Efficient application mapping on CGRAs based on backward simultaneous scheduling/binding and dynamic graph transformations. ASAP 2014: 169-172
[c9]
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Thanh Dinh Ngo, Daniel Sepulveda, Kevin J. M. Martin, Jean-Philippe Diguet:
Communication-model based embedded mapping of dataflow actors on heterogeneous MPSoC. DASIP 2014: 1-8
[c8]
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Yaset Oliva, Emmanuel Casseau, Kevin J. M. Martin, Pierre Bomel, Jean-Philippe Diguet, Hervé Yviquel, Mickaël Raulet, Erwan Raffin, Laurent Morin:
Orcc's compa-backend demonstration. DASIP 2014: 1-2
[c7]
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Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet:
Virtual Devices for Hot-Pluggable Processors. DSD 2014: 58-65
[c6]
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Thomas Peyret, Gwenolé Corre, Mathieu Thevenin, Kevin J. M. Martin, Philippe Coussy:
An automated design approach to map applications on CGRAs. ACM Great Lakes Symposium on VLSI 2014: 229-230
2013
[c5]
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Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet:
Virtual UARTs for Reconfigurable Multi-processor Architectures. IPDPS Workshops 2013: 252-259
[c4]
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Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin J. M. Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys:
GeCoS: A framework for prototyping custom hardware design flows. SCAM 2013: 100-105
2012
[j1]
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Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot:
Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation. ACM Trans. Reconfigurable Technol. Syst. 5(2): 10:1-10:38 (2012)
2010
[b1]
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Kevin J. M. Martin:
Génération automatique d'extensions de jeux d'instructions de processeurs. (Automatic Generation of Instruction-set Extensions). University of Rennes 1, France, 2010

2000 – 2009

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2009
[c3]
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Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot:
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. ASAP 2009: 145-152
[c2]
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Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot:
How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. ERSA 2009: 29-42
[c1]
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Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot:
Constraint-Driven Identification of Application Specific Instructions in the DURASE System. SAMOS 2009: 194-203

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