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Dheeraj Kumar Sinha
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2010 – 2019
- 2017
- [j1]Dheeraj Kumar Sinha, Amitabh Chatterjee:
SPICE level implementation of physics of filamentation in ESD protection devices. Microelectron. Reliab. 79: 239-247 (2017) - [c4]Ashok Ray, Gaurav Kumar, Sushanta Bordoloi, Dheeraj Kumar Sinha, Pratima Agarwal, Gaurav Trivedi:
FEM Based Device Simulator for High Voltage Devices. VDAT 2017: 127-135 - 2016
- [c3]Vishnuram Abhinav, Dheeraj Kumar Sinha, Amitabh Chatterjee, Forrest Brewer:
A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach. VLSID 2016: 282-287 - [c2]Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev:
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET. VLSID 2016: 312-317 - 2015
- [c1]Vishnuram Abhinav, Amitabh Chatterjee, Dheeraj Kumar Sinha, Rajan Singh:
Methodology for optimizing ESD protection for high speed LVDS based I/Os. VDAT 2015: 1-5
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last updated on 2024-10-07 21:19 CEST by the dblp team
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