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Ajith Sivadasan
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2010 – 2019
- 2018
- [c6]Ajith Sivadasan, Riddhi Jitendrakumar Shah, Vincent Huard, Florian Cacho, Lorena Anghel:
NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI. DATE 2018: 997-998 - 2017
- [c5]Ajith Sivadasan, Armelle Notin, Vincent Huard, Etienne Maurin, Souhir Mhira, Florian Cacho, Lorena Anghel:
Workload dependent reliability timing analysis flow. DATE 2017: 736-737 - 2016
- [c4]Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel:
Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis. ERMAVSS@DATE 2016: 38-40 - [c3]Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel:
Study of workload impact on BTI HCI induced aging of digital circuits. DATE 2016: 1020-1021 - [c2]Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel:
Activity profiling: Review of different solutions to develop reliable and performant design. IOLTS 2016: 47-50 - [c1]Lorena Anghel, Ahmed Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard:
Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results. VTS 2016: 1
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