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2020 – today
- 2022
[j9]Pascal Nasahl, Miguel Osorio, Pirmin Vogel, Michael Schaffner, Timothy Trippel, Dominic Rizzo, Stefan Mangard:
SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(4): 56-87 (2022)- [i7]Pascal Nasahl, Miguel Osorio, Pirmin Vogel, Michael Schaffner, Timothy Trippel, Dominic Rizzo, Stefan Mangard:
SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element. CoRR abs/2205.04775 (2022) - 2020
- [j8]Matheus A. Cavalcante
, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini:
Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 530-543 (2020) - [c22]Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, David Wentzlaff:
BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research. ASPLOS 2020: 699-714 - [c21]Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini:
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS 2020: 1-3
2010 – 2019
- 2019
- [j7]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. IEEE Trans. Computers 68(4): 484-497 (2019) - [j6]Jiawei Liao, Michael Jost, Michael Schaffner, Michele Magno, Matthias Korb, Luca Benini, Felix Tebbenjohanns, René Reimann, Vijay Jain, Michael Gross, Andrei Militaru, Martin Frimmer, Lukás Novotný:
FPGA Implementation of a Kalman-Based Motion Estimator for Levitated Nanoparticles. IEEE Trans. Instrum. Meas. 68(7): 2374-2386 (2019) - [c20]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. DATE 2019: 662-667 - [c19]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. ISOCC 2019: 117-118 - [c18]Salvatore Di Girolamo, Konstantin Taranov, Andreas Kurth, Michael Schaffner, Timo Schneider, Jakub Beránek, Maciej Besta, Luca Benini, Duncan Roweth, Torsten Hoefler:
Network-accelerated non-contiguous memory transfers. SC 2019: 56:1-56:14 - [i6]Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini:
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. CoRR abs/1906.00478 (2019) - [i5]Salvatore Di Girolamo, Konstantin Taranov, Andreas Kurth, Michael Schaffner, Timo Schneider, Jakub Beránek, Maciej Besta, Luca Benini, Duncan Roweth, Torsten Hoefler:
Network-Accelerated Non-Contiguous Memory Transfers. CoRR abs/1908.08590 (2019) - 2018
- [b2]Michael Schaffner:
Energy-efficient VLSI architectures for real-time and 3D video processing. ETH Zürich, Switzerland, Hartung-Gorre Verlag 2018, ISBN 978-3-86628-624-5, pp. 1-272 - [j5]Andrin Caviezel, Michael Schaffner, Lukas Cavigelli, Pascal Niklaus, Yves Bühler, Perry Bartelt, Michele Magno, Luca Benini:
Design and Evaluation of a Low-Power Sensor Device for Induced Rockfall Experiments. IEEE Trans. Instrum. Meas. 67(4): 767-779 (2018) - [j4]Michael Schaffner, Florian Scheidegger, Lukas Cavigelli, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Towards Edge-Aware Spatio-Temporal Filtering in Real-Time. IEEE Trans. Image Process. 27(1): 265-280 (2018) - [c17]A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew P. J. Emerson, Andrés Tomás, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn:
The transprecision computing paradigm: Concept, design, and applications. DATE 2018: 1105-1110 - [c16]Manuel Eggimann, Christelle Gloor, Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, Aljosa Smolic, Luca Benini:
Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS. ISCAS 2018: 1-5 - [c15]Michael Jost, Michael Schaffner, Michele Magno, Matthias Korb, Luca Benini, René Reimann, Vijay Jain, Michael Gross, Andrei Militaru, Martin Frimmer, Lukás Novotný:
An accurate system for optimal state estimation of a levitated nanoparticle. SAS 2018: 1-6 - [i4]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. CoRR abs/1803.04783 (2018) - [i3]Michael Schaffner, Luca Benini:
On the Feasibility of FPGA Acceleration of Molecular Dynamics Simulations. CoRR abs/1808.04201 (2018) - [i2]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. CoRR abs/1812.00182 (2018) - 2017
- [j3]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. IEEE J. Solid State Circuits 52(1): 98-112 (2017) - [c14]Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, A. Cristiano I. Malossi, Constantine Bekas, Luca Benini:
Impact of temporal subsampling on accuracy and performance in practical video classification. EUSIPCO 2017: 996-1000 - [i1]Manuel Eggimann, Christelle Gloor, Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, Aljosa Smolic, Luca Benini:
Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS. CoRR abs/1711.03538 (2017) - 2016
- [j2]Michael Schaffner, Frank K. Gürkaynak, Pierre Greisen, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW. IEEE Trans. Circuits Syst. Video Technol. 26(11): 2093-2108 (2016) - [c13]Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. ARITH 2016: 95-103 - [c12]Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
High-efficiency logarithmic number unit design based on an improved cotransformation scheme. DATE 2016: 1387-1392 - [c11]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
4.6 A 65nm CMOS 6.4-to-29.2pJ/[email protected] shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. ISSCC 2016: 82-83 - 2015
- [c10]Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Luca Benini:
DRAM or no-DRAM?: exploring linear solver architectures for image domain warping in 28 nm CMOS. DATE 2015: 707-712 - [c9]Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Automatic multiview synthesis - Towards a mobile system on a chip. VCIP 2015: 1-4 - [c8]Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Automatic multiview synthesis - Prototype demo. VCIP 2015: 1 - 2014
- [c7]Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini:
An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing. DAC 2014: 132:1-132:6 - 2013
- [c6]Michael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gürkaynak, Hubert Kaeslin, Aljoscha Smolic:
MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping. ESSCIRC 2013: 61-64 - [c5]Michael Schaffner, Pierre Greisen, Simon Heinzle, Aljoscha Smolic:
Efficient image resampling for multiview displays. ICASSP 2013: 2252-2256 - [c4]Michael Schaffner, Pascal Hager, Lukas Cavigelli, Pierre Greisen, Frank K. Gürkaynak, Hubert Kaeslin:
A real-time 720p feature extraction core based on Semantic Kernels Binarized. VLSI-SoC 2013: 27-32 - [c3]Michael Schaffner, Pascal A. Hager, Lukas Cavigelli, Z. Fang, Pierre Greisen, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini:
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized. VLSI-SoC (Selected Papers) 2013: 144-167 - 2012
- [j1]Pierre Greisen, Michael Schaffner, Simon Heinzle, Marian Runo, Aljoscha Smolic, Andreas Burg, Hubert Kaeslin, Markus H. Gross:
Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications. IEEE Trans. Circuits Syst. Video Technol. 22(11): 1577-1589 (2012) - [c2]Pierre Greisen, Michael Schaffner, Danny Luu, Val Mikos, Simon Heinzle, Frank K. Gürkaynak, Aljoscha Smolic:
Spatially-Varying Image Warping: Evaluations and VLSI Implementations. VLSI-SoC (Selected Papers) 2012: 64-87 - [c1]Pierre Greisen, Richard Emler, Michael Schaffner, Simon Heinzle, Frank K. Gürkaynak:
A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS. VLSI-SoC 2012: 105-110
1990 – 1999
- 1996
- [b1]Michael Schaffner:
Methoden zur automatischen Generierung von Simulationsmodellen für ASIC-Bibliotheken. Mainz 1996, ISBN 978-3-89653-054-7, pp. I-XII, 1-164
Coauthor Index
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