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2020 – today
- 2020
[c42]Niklas Kochdumper, Ahmad Tarraf
, Malgorzata Rechmal, Markus Olbrich, Lars Hedrich, Matthias Althoff:
Establishing Reachset Conformance for the Formal Analysis of Analog Circuits. ASP-DAC 2020: 199-204- [c41]Malgorzata Rechmal-Lesse, Gerald Alexander Koroa, Yeremia Gunawan Adhisantoso, Markus Olbrich:
Automatically Generated Nonlinear Analog Circuit Models Enclosing Variations with Intervals and Affine Forms for Reachability Analysis. DDECS 2020: 1-4 - [c40]Markus Olbrich:
Extended Probability Distribution Arithmetic. ICECOCS 2020: 1-6 - [c39]Ahmad Tarraf, Lars Hedrich, Niklas Kochdumper, Malgorzata Rechmal-Lesse, Markus Olbrich:
Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets. ISVLSI 2020: 7-12 - [c38]Malgorzata Rechmal-Lesse, Gerald Alexander Koroa, Yeremia Gunawan Adhisantoso, Markus Olbrich:
Automated Model Generation Including Variations for Formal Verification of Nonlinear Analog Circuits. NEWCAS 2020: 66-69
2010 – 2019
- 2019
- [j2]Carna Zivkovic, Christoph Grimm, Markus Olbrich, Oliver Scharf, Erich Barke:
Hierarchical Verification of AMS Systems With Affine Arithmetic Decision Diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1785-1798 (2019) - [c37]Sara Divanbeigi, Evan Aditya, Zhongpin Wang, Markus Olbrich:
Enabling Complex Stimuli in Accelerated Mixed-Signal Simulation. DAC 2019: 69 - 2018
- [c36]Sara Divanbeigi, Felix Winkler, Martin Bergen, Markus Olbrich:
Modeling and Accelerated Mixed-Signal Simulation of a Control System. DDECS 2018: 95-100 - [c35]Bjorn Bredthauer, Markus Olbrich, Erich Barke:
STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units. ISPDC 2018: 77-84 - 2017
- [c34]Andreas Furtig, Georg Glaeser, Christoph Grimm, Lars Hedrich, Stefan Heinen, Hyun-Sek Lukas Lee, Gregor Nitsche, Markus Olbrich, Carna Radojicic, Fabian Speicher:
Novel metrics for Analog Mixed-Signal coverage. DDECS 2017: 97-102 - 2016
- [c33]Erich Barke, Andreas Furtig, Georg Glaeser, Christoph Grimm, Lars Hedrich, Stefan Heinen, Eckhard Hennig, Hyun-Sek Lukas Lee, Wolfgang Nebel, Gregor Nitsche, Markus Olbrich, Carna Radojicic, Fabian Speicher:
Embedded tutorial: Analog-/mixed-signal verification methods for AMS coverage analysis. DATE 2016: 1102-1111 - 2015
- [c32]Hyun-Sek Lukas Lee, Matthias Althoff, Stefan Hoelldampf, Markus Olbrich, Erich Barke:
Automated generation of hybrid system models for reachability analysis of nonlinear analog circuits. ASP-DAC 2015: 725-730 - [c31]Oliver Scharf, Markus Olbrich, Erich Barke:
Split and merge strategies for solving uncertain equations using affine arithmetic. SimuTools 2015: 1-8 - [c30]Artur Quiring, Markus Olbrich, Erich Barke:
Fast global interconnnect driven 3D floorplanning. VLSI-SoC 2015: 313-318 - 2014
- [j1]Martin Barke, Michael Kärgel, Markus Olbrich, Ulf Schlichtmann:
Robustness measurement of integrated circuits and its adaptation to aging effects. Microelectron. Reliab. 54(6-7): 1058-1065 (2014) - [c29]C. Katzschke, M.-P. Sohn, Markus Olbrich, Volker Meyer zu Bexten, Markus Tristl, Erich Barke:
Application of Mission Profiles to enable cross-domain constraint-driven design. DATE 2014: 1-6 - [c28]Michael Kärgel, Markus Olbrich, Erich Barke:
Simulation Based Verification with Range Based Signal Representations for Mixed-Signal Systems. SBCCI 2014: 42:1-42:7 - 2013
- [c27]Artur Quiring, Markus Olbrich, Erich Barke:
Improving 3D-Floorplanning using smart selection operations in meta-heuristic optimization. 3DIC 2013: 1-6 - 2012
- [c26]Stefan Hoelldampf, Hyun-Sek Lukas Lee, Daniel Zaum, Markus Olbrich, Erich Barke:
Efficient generation of analog circuit models for accelerated mixed-signal simulation. SoCC 2012: 104-109 - 2011
- [c25]Artur Quiring, Marc Lindenberg, Markus Olbrich, Erich Barke:
3D floorplanning considering vertically aligned rectilinear modules using T∗-tree. 3DIC 2011: 1-5 - [c24]Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz:
A theoretical probabilistic simulation framework for dynamic power estimation. ICCAD 2011: 708-715 - [c23]Stefan Hoelldampf, Daniel Zaum, Markus Olbrich, Erich Barke:
Using analog circuit behavior to generate SystemC events for an acceleration of mixed-signal simulation. ICCD 2011: 108-112 - [c22]Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz:
A gate sizing method for glitch power reduction. SoCC 2011: 24-29 - [c21]Min Zhang, R. Häußler, Markus Olbrich, Harald Kinzelbach, Erich Barke:
A Statistical Learning Based Modeling Approach and Its Application in Leakage Library Characterization. VLSI Design 2011: 106-111 - 2010
- [c20]Florian Schupfer, Christoph Grimm, Markus Olbrich, Michael Kärgel, Erich Barke:
Towards Abstract Analysis Techniques for Range Based System Simulations. FDL 2010: 159-164 - [c19]Daniel Zaum, Stefan Hoelldampf, Markus Olbrich, Erich Barke, Ingmar Neumann:
An Accelerated Mixed-Signal Simulation Kernel for SystemC. FDL 2010: 234-239
2000 – 2009
- 2009
- [c18]Daniel Zaum, Stefan Hoelldampf, Markus Olbrich, Erich Barke, Ingmar Neumann, Sebastian Schmidt:
The PRAISE approach for accelerated transient analysis applied to wire models. BMAS 2009: 120-125 - [c17]Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler:
Fast dynamic power estimation considering glitch filtering. SoCC 2009: 361-364 - 2008
- [c16]Markus Olbrich, Erich Barke:
Distribution arithmetic for stochastical analysis. ASP-DAC 2008: 537-542 - [c15]Darius Grabowski, Markus Olbrich, Erich Barke:
Analog circuit simulation using range arithmetics. ASP-DAC 2008: 762-767 - [c14]Thomas Jambor, Daniel Zaum, Markus Olbrich, Erich Barke:
A Trapezoidal Approach to Corner Stitching Data Structures for Arbitrary Routing Angles. DDECS 2008: 54-58 - [c13]Stefan Hoelldampf, Daniel Zaum, Markus Olbrich, Erich Barke, Ingmar Neumann, Sebastian Schmidt:
Methodologies for High-Level Modelling and Evaluation in the Automotive Domain (invited). FDL 2008: 73-77 - [c12]Philipp V. Panitz, Markus Olbrich, Erich Barke, Markus Bühler, Jürgen Koehl:
Considering possible opens in non-tree topology wire delay calculation. ACM Great Lakes Symposium on VLSI 2008: 17-22 - 2007
- [c11]Hedi Harizi, Robert HauBler, Markus Olbrich, Erich Barke:
Efficient Modeling Techniques for Dynamic Voltage Drop Analysis. DAC 2007: 706-711 - [c10]Min Zhang, Markus Olbrich, David Seider, Martin Frerichs, Harald Kinzelbach, Erich Barke:
CMCal: an accurate analytical approach for the analysis of process variations with non-gaussian parameters and nonlinear functions. DATE 2007: 243-248 - [c9]Darius Grabowski, Markus Olbrich, Christoph Grimm, Erich Barke:
Range Arithmetics to Speed up Reachability Analysis of Analog Systems. FDL 2007: 38-43 - [c8]Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl:
Robust wiring networks for DfY considering timing constraints. ACM Great Lakes Symposium on VLSI 2007: 43-48 - 2005
- [c7]Lars A. Schreiner, Markus Olbrich, Erich Barke, Volker Meyer zu Bexten:
Routing of analog busses with parasitic symmetry. ISPD 2005: 14-19 - 2004
- [c6]Markus Olbrich, Erich Barke:
Placement Using a Localization Probability Model (LPM). DATE 2004: 1412 - [c5]Idris Kaya, Silke Salewski, Markus Olbrich, Erich Barke:
Wirelength Reduction Using 3-D Physical Design. PATMOS 2004: 453-462 - 2003
- [c4]Andreas Hermann, Markus Olbrich, Erich Barke:
Placing substrate contacts into mixed-signal circuits controlling circuit performance. CICC 2003: 373-376 - [c3]Andreas Hermann, Markus Olbrich, Erich Barke:
Substrate Modeling and Noise Reduction in Mixed-Signal Circuits. VLSI-SOC 2003: 13-18 - 2001
- [c2]Markus Olbrich, Achim Rein, Erich Barke:
An improved hierarchical classification algorithm for structural analysis of integrated circuits. DATE 2001: 807
1990 – 1999
- 1998
- [b1]Markus Olbrich:
Relationenorientiertes Modellieren mit Objekten in der Bauinformatik. University of Hanover, Hannover, Germany, VDI-Verlag 1998, ISBN 978-3-18-315004-5, pp. 1-124 - [c1]Jörn Stohmann, Klaus Harbich, Markus Olbrich, Erich Barke:
An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping. FPL 1998: 79-88
Coauthor Index
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