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ORCIDMostafa E. Salehi
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2020 – today
- 2023
[c15]Najmeh Nazari
, Mostafa E. Salehi:
Inter-Layer Hybrid Quantization Scheme for Hardware Friendly Implementation of Embedded Deep Neural Networks. ACM Great Lakes Symposium on VLSI 2023: 193-196- [c14]Iman Dadras, Sakineh Seydi, Mohammad Hasan Ahmadilivani, Jaan Raik, Mostafa E. Salehi:
Fully-Fusible Convolutional Neural Networks for End-to-End Fused Architecture with FPGA Implementation. ICECS 2023: 1-5 - 2022
- [j19]Seyed Ahmad Mirsalari, Najmeh Nazari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
FaCT-LSTM: Fast and Compact Ternary Architecture for LSTM Recurrent Neural Networks. IEEE Des. Test 39(3): 45-53 (2022) - 2021
- [j18]Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Mostafa E. Salehi, Soheil Ghiasi:
E2BNet: MAC-free yet accurate 2-level binarized neural network accelerator for embedded systems. J. Real Time Image Process. 18(4): 1285-1299 (2021) - [c13]Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
ELC-ECG: Efficient LSTM Cell for ECG Classification Based on Quantized Architecture. ISCAS 2021: 1-5 - 2020
- [j17]Iraj Moghaddasi, Mostafa E. Salehi, Mehdi Kargahi:
Aging-Aware Instruction-Level Statistical Dynamic Timing Analysis for Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 433-442 (2020) - [c12]Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
MuBiNN: Multi-Level Binarized Recurrent Neural Network for EEG Signal Classification. ISCAS 2020: 1-5 - [c11]Najmeh Nazari, Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
Multi-level Binarized LSTM in EEG Classification for Wearable Devices. PDP 2020: 175-181 - [i4]Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
MuBiNN: Multi-Level Binarized Recurrent Neural Network for EEG signal Classification. CoRR abs/2004.08914 (2020) - [i3]Najmeh Nazari, Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab:
Multi-level Binarized LSTM in EEG Classification for Wearable Devices. CoRR abs/2004.11206 (2020)
2010 – 2019
- 2019
- [j16]Iraj Moghaddasi, Arash Fouman, Mostafa E. Salehi, Mehdi Kargahi:
Instruction-Level NBTI Stress Estimation and Its Application in Runtime Aging Prediction for Embedded Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1427-1437 (2019) - [c10]Najmeh Nazari, Mohammad Loni, Mostafa E. Salehi, Masoud Daneshtalab, Mikael Sjödin:
TOT-Net: An Endeavor Toward Optimizing Ternary Neural Networks. DSD 2019: 305-312 - 2018
- [j15]Mostafa E. Salehi, Ali Azarpeyvand, Armin Hajaboutalebi Aboutalebi:
Vulnerability Analysis of Adder Architectures Considering Design and Synthesis Constraints. J. Electron. Test. 34(1): 7-14 (2018) - [j14]Hamed Norouzi, Mostafa E. Salehi:
Evolutionary design for energy-efficient approximate digital circuits. Microprocess. Microsystems 57: 52-64 (2018) - 2017
- [c9]Hamid Nejatollahi, Mostafa E. Salehi:
Reliability-Aware Voltage Scaling of Multicore Processors in Dark Silicon Era. TopHPC 2017: 242-262 - 2016
- [j13]Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi:
Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. Integr. 53: 14-26 (2016) - [j12]Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie, Saeed Safari:
Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor. Microprocess. Microsystems 42: 113-126 (2016) - [j11]M. Hassan Najafi, Mostafa E. Salehi:
A Fast Fault-Tolerant Architecture for Sauvola Local Image Thresholding Algorithm Using Stochastic Computing. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 808-812 (2016) - [j10]Hamed Dorosti, Ali Teymouri, Sied Mehdi Fakhraie, Mostafa E. Salehi:
Ultralow-Energy Variation-Aware Design: Adder Architecture Study. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1165-1168 (2016) - 2015
- [j9]Hamid Nejatollahi, Mostafa E. Salehi:
Voltage scaling and dark silicon in symmetric multicore processors. J. Supercomput. 71(10): 3958-3973 (2015) - 2014
- [j8]Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie:
An analytical method for reliability aware instruction set extension. J. Supercomput. 67(1): 104-130 (2014) - [j7]Amir Yazdanbakhsh, Mostafa E. Salehi, Sied Mehdi Fakhraie:
Customized pipeline and instruction set architecture for embedded processing engines. J. Supercomput. 68(2): 948-977 (2014) - 2012
- [j6]Mostafa E. Salehi, Sied Mehdi Fakhraie, Amir Yazdanbakhsh:
Instruction set architectural guidelines for embedded packet-processing engines. J. Syst. Archit. 58(3-4): 112-125 (2012) - [j5]Farshad Firouzi, Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie:
Adaptive fault-tolerant DVFS with dynamic online AVF prediction. Microelectron. Reliab. 52(6): 1197-1208 (2012) - [c8]Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie:
CIVA: Custom instruction vulnerability analysis framework. DDECS 2012: 318-323 - [c7]Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie:
Vulnerability Analysis for Custom Instructions. DSD 2012: 144-147 - [i2]Mehdi Alipour, Mostafa E. Salehi:
Performance-Optimum Superscalar Architecture for Embedded Applications. CoRR abs/1204.2809 (2012) - [i1]Mehdi Alipour, Mostafa E. Salehi, Hesamodin Shojaei Baghini:
Design Space Exploration to Find the Optimum Cache and Register File Size for Embedded Applications. CoRR abs/1205.1871 (2012) - 2011
- [j4]Abbas Rahimi, Mostafa E. Salehi, Siamak Mohammadi, Sied Mehdi Fakhraie:
Low-energy GALS NoC with FIFO - Monitoring dynamic voltage scaling. Microelectron. J. 42(6): 889-896 (2011) - [j3]Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie:
An accurate model for soft error rate estimation considering dynamic voltage and frequency scaling effects. Microelectron. Reliab. 51(2): 460-467 (2011) - [j2]Mostafa E. Salehi, Mehrzad Samadi, Mehrdad Najibi, Ali Afzali-Kusha, Massoud Pedram, Sied Mehdi Fakhraie:
Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1931-1935 (2011) - 2010
- [c6]Ali Azarpeyvand, Mostafa E. Salehi, Farshad Firouzi, Amir Yazdanbakhsh, Sied Mehdi Fakhraie:
Instruction reliability analysis for embedded processors. DDECS 2010: 20-23 - [c5]Mostafa E. Salehi, Hamed Dorosti, Sied Mehdi Fakhraie:
Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications. DSD 2010: 269-272 - [c4]Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie, Saeed Safari:
Reliability-Aware Dynamic Voltage and Frequency Scaling. ISVLSI 2010: 304-309 - [c3]Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie:
Energy-aware design space exploration of registerfile for extensible processors. ICSAMOS 2010: 273-281
2000 – 2009
- 2009
- [j1]Mostafa E. Salehi, Sied Mehdi Fakhraie:
Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development. J. Syst. Archit. 55(7-9): 373-386 (2009) - 2008
- [c2]Mostafa E. Salehi, Sied Mehdi Fakhraie, Abbas Banaiyan, Abbas Hormati:
Design of a Custom Packet Switching Engine for Network Applications. CSICC 2008: 790-794 - 2006
- [c1]Mehrdad Najibi, Mostafa E. Salehi, Ali Afzali-Kusha, Massoud Pedram, Seid Mehdi Fakhraie, Hossein Pedram:
Dynamic voltage and frequency management based on variable update intervals for frequency setting. ICCAD 2006: 755-760
Coauthor Index
aka: Seid Mehdi Fakhraie
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