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ORCIDShouhei Kousai
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2010 – 2019
- 2017
[j14]Song Hu
, Shouhei Kousai, Hua Wang:
A Compact Broadband Mixed-Signal Power Amplifier in Bulk CMOS With Hybrid Class-G and Dynamic Load Trajectory Manipulation. IEEE J. Solid State Circuits 52(6): 1463-1478 (2017)- [j13]Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, Jun Deguchi:
A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing. IEEE J. Solid State Circuits 52(10): 2679-2689 (2017) - 2016
- [j12]Song Hu, Shouhei Kousai, Hua Wang:
A Broadband Mixed-Signal CMOS Power Amplifier With a Hybrid Class-G Doherty Efficiency Enhancement Technique. IEEE J. Solid State Circuits 51(3): 598-613 (2016) - [c22]Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, Jun Deguchi:
Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology. A-SSCC 2016: 25-28 - 2015
- [j11]Song Hu, Shouhei Kousai, Jong Seok Park, Outmane Lemtiri Chlieh, Hua Wang:
Design of A Transformer-Based Reconfigurable Digital Polar Doherty Power Amplifier Fully Integrated in Bulk CMOS. IEEE J. Solid State Circuits 50(5): 1094-1106 (2015) - [c21]Song Hu, Shouhei Kousai, Hua Wang:
2.8 A broadband CMOS digital power amplifier with hybrid Class-G Doherty efficiency enhancement. ISSCC 2015: 1-3 - [c20]Piet Wambacq, Stefano Pellerano, Sven Mattisson, Shouhei Kousai, Ali Afsahi, Taizo Yamawaki:
F5: Advanced RF CMOS transmitter techniques. ISSCC 2015: 1-2 - 2014
- [j10]Shouhei Kousai:
Recent progress in CMOS RF circuit design. IEICE Electron. Express 11(2): 20132011 (2014) - [j9]Daisuke Miyashita, Ryo Yamaki, Kazunori Hashiyoshi, Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa:
An LDPC Decoder With Time-Domain Analog and Digital Mixed-Signal Processing. IEEE J. Solid State Circuits 49(1): 73-83 (2014) - [j8]Shouhei Kousai, Kohei Onizuka, Junji Wadatsumi, Takashi Yamaguchi, Yasuhiko Kuriyama, Masami Nagaoka:
Polar Antenna Impedance Detection and Tuning for Efficiency Improvement in a 3G/4G CMOS Power Amplifier. IEEE J. Solid State Circuits 49(12): 2902-2914 (2014) - [c19]Jun Deguchi, Toshiyuki Yamagishi, Hideaki Majima, Nau Ozaki, Kazuhiro Hiwada, Makoto Morimoto, Tatsuji Ashitani, Shouhei Kousai:
A 1.4Mpixel CMOS image sensor with multiple row-rescan based data sampling for optical camera communication. A-SSCC 2014: 17-20 - [c18]Shouhei Kousai, Kohei Onizuka, Song Hu, Hua Wang, Ali Hajimiri:
A new wave of CMOS power amplifier innovations: Fusing digital and analog techniques with large signal RF operations. CICC 2014: 1-8 - [c17]Shouhei Kousai, Kohei Onizuka, Takashi Yamaguchi, Yasuhiko Kuriyama, Masami Nagaoka:
3.1 polar antenna impedance detection and tuning for efficiency improvement in a 3G/4G CMOS Power Amplifier. ISSCC 2014: 58-59 - [c16]Konosuke Watanabe, Kenichiro Yoshii, Nobuhiro Kondo, Ken-ichi Maeda, Toshio Fujisawa, Junji Wadatsumi, Daisuke Miyashita, Shouhei Kousai, Yasuo Unekawa, Shinsuke Fujii, Takuma Aoyama, Takayuki Tamura, Atsushi Kunimatsu, Yukihito Oowaki:
19.3 66.3KIOPS-random-read 690MB/s-sequential-read universal Flash storage device controller with unified memory extension. ISSCC 2014: 330-331 - [c15]Yuji Satoh, Hiroyuki Kobayashi, Takeshi Miyaba, Shouhei Kousai:
A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration. VLSIC 2014: 1-2 - 2013
- [c14]Jong Seok Park, Shouhei Kousai, Hua Wang:
A fully differential ultra-compact broadband transformer based quadrature generation scheme. CICC 2013: 1-4 - [c13]Yusuke Niki, Daisuke Miyashita, Hiroyuki Kobayashi, Shouhei Kousai:
A supply-noise-rejection technique in ADPLL with noise-cancelling current source. ESSCIRC 2013: 45-48 - [c12]Daisuke Miyashita, Ryo Yamaki, Kazunori Hashiyoshi, Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa:
A 10.4pJ/b (32, 8) LDPC decoder with time-domain analog and digital mixed-signal processing. ISSCC 2013: 420-421 - [c11]Shouhei Kousai, Gangadhar Burra:
Session 25 overview: Energy-efficient wireless. ISSCC 2013: 438-439 - [c10]Jun Deguchi, Fumihiko Tachibana, Makoto Morimoto, Masayoshi Chiba, Takeshi Miyaba, Hideki Tanaka, Kyoichi Takenaka, Satoshi Funayama, Kunihiko Amano, Kazuhide Sugiura, Ryuta Okamoto, Shouhei Kousai:
A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC. ISSCC 2013: 494-495 - 2012
- [j7]Daisuke Miyashita, Hiroyuki Kobayashi, Jun Deguchi, Shouhei Kousai, Mototsugu Hamada, Ryuichi Fujimoto:
A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter. IEICE Trans. Electron. 95-C(6): 1008-1016 (2012) - [j6]Shouhei Kousai, Kohei Onizuka, Takashi Yamaguchi, Yasuhiko Kuriyama, Masami Nagaoka:
A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a + 27.1 dBm WCDMA CMOS Power Amplifier. IEEE J. Solid State Circuits 47(12): 2964-2973 (2012) - [c9]Shouhei Kousai, Kohei Onizuka, Takashi Yamaguchi, Yasuhiko Kuriyama, Masami Nagaoka:
A 28.3mW PA-closed loop for linearity and efficiency improvement integrated in a +27.1dBm WCDMA CMOS power amplifier. ISSCC 2012: 84-86 - [c8]Sven Mattisson, Shouhei Kousai:
Session 9 overview: Wireless transceiver techniques: Wireless subcommittee. ISSCC 2012: 160-161 - 2011
- [j5]Shouhei Kousai, Daisuke Miyashita, Junji Wadatsumi, Rui Ito, Takahiro Sekiguchi, Mototsugu Hamada, Kenichi Okada:
A Low-Noise and Highly-Linear Transmitter with Envelope Injection Pre-Power Amplifier for Multi-Mode Radio. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 592-602 (2011) - [c7]Hiroyuki Kobayashi, Shouhei Kousai, Yoshiaki Yoshihara, Mototsugu Hamada:
An all-digital 8-DPSK polar transmitter with second-order approximation scheme and phase rotation-constant digital PA for bluetooth EDR in 65nm CMOS. ISSCC 2011: 174-176
2000 – 2009
- 2009
- [j4]Shouhei Kousai, Mototsugu Hamada, Rui Ito, Tetsuro Itakura:
A Novel Automatic Quality Factor Tuning Scheme for a Low-Power Wideband Active-RC Filter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(2): 411-420 (2009) - [j3]Shouhei Kousai, Ali Hajimiri:
An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement. IEEE J. Solid State Circuits 44(12): 3376-3392 (2009) - [c6]Shouhei Kousai, Ali Hajimiri:
An octave-range watt-level fully integrated CMOS switching power mixer array for linearization and back-off efficiency improvement. ISSCC 2009: 376-377 - 2008
- [c5]Shouhei Kousai, Daisuke Miyashita, Junji Wadatsumi, Asuka Maki, Takahiro Sekiguchi, Rui Ito, Mototsugu Hamada:
A 1.2V 0.2-to-6.3GHz Transceiver with Less Than -29.5dB EVM@-3dBm and a Choke/Coil-Less Pre-Power Amplifier. ISSCC 2008: 214-215 - 2007
- [j2]Shouhei Kousai, Mototsugu Hamada, Rui Ito, Tetsuro Itakura:
A 19.7 MHz, Fifth-Order Active-RCChebyshev LPF for Draft IEEE802.11n With Automatic Quality-Factor Tuning Scheme. IEEE J. Solid State Circuits 42(11): 2326-2337 (2007) - [c4]Shouhei Kousai, Mototsugu Hamada, Rui Ito, Tetsuro Itakura:
A novel quality factor tuning scheme for active-RC filters. ESSCIRC 2007: 496-499 - 2005
- [j1]Toru Tanzawa, Kenichi Agawa, Hiroyuki Shibayama, Ryota Terauchi, Katsumi Hisano, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Toru Takayama, Masayuki Koizumi, Fumitoshi Hatori:
A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters. IEICE Trans. Electron. 88-C(4): 490-495 (2005) - [c3]Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada:
A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations. CICC 2005: 583-586 - 2004
- [c2]Toru Tanzawa, Hiroyuki Shibayama, Ryota Terauchi, Katsumi Hisano, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Toru Takayama, Kenichi Agawa, Masayuki Koizumi, Fumitoshi Hatori:
A temperature-compensated CMOS LC-VCO enabling the direct modulation architecture in 2.4GHz GFSK transmitter. CICC 2004: 273-276 - 2001
- [c1]Fumitoshi Hatori, Shouhei Kousai, Yasuo Unekawa:
Shared data line technique for doubling the data transfer rate per pin of differential interfaces. CICC 2001: 501-504
Coauthor Index
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