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ORCIDFrancesco De Canio
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2010 – 2019
- 2018
[c6]Alberto Annovi, Giovanni Calderini, Stefano Capra
, Bruno Checcucci, Francesco Crescioli, Francesco De Canio, Giacomo Fedi, Luca Frontini, Maroua Garci, Christos Gentsos, Takashi Kubota, Valentino Liberali, Fabrizio Palla, Jafar Shojaii, Calliope-Louisa Sotiropoulou, Alberto Stabile, Gianluca Traversi, Sebastien Viret:
Characterization of an Associative Memory Chip in 28 nm CMOS Technology. ISCAS 2018: 1-5- [c5]Francesco De Canio, Gianluca Traversi:
Temperature Sensor with Process and Mismatch Auto-Compensation Technique in 28 nm CMOS. ISCAS 2018: 1-5 - [c4]Gianluca Traversi, Francesco De Canio, Valentino Liberali, Alberto Stabile:
Characterization of an LVDS Link in 28 nm CMOS for Multi-Purpose Pattern Recognition. ISCAS 2018: 1-4 - 2017
- [c3]Alberto Annovi, Giovanni Calderini, Francesco Crescioli, Francesco De Canio, Luca Frontini, Takashi Kubota, Valentino Liberali, Pierluigi Luciano, Fabrizio Palla, Seyed Ruhollah Shojaii, Calliope-Louisa Sotiropoulou, Alberto Stabile, Gianluca Traversi:
A low-power and high-density Associative Memory in 28 nm CMOS technology. MOCAST 2017: 1-4 - [c2]Gianluca Traversi, Francesco De Canio, Valentino Liberali, Alberto Stabile:
Design of LVDS driver and receiver in 28 nm CMOS technology for Associative Memories. MOCAST 2017: 1-4 - 2015
- [c1]N. Demaria, G. Dellacasa, G. Mazza, Angelo Rivetti, Manuel D. Da Rocha Rolo, E. Monteil, L. Pacher, Fabio Ciciriello, Francesco Corsi, Cristoforo Marzocca, G. De Roberts, F. Loddo, C. Tamma, Marta Bagatin, D. Bisello, Simone Gerardin, S. Mattiazzo, L. Ding, Piero Giubilato, Alessandro Paccagnella, Francesco De Canio, Luigi Gaioni, Massimo Manghisoni, Valerio Re, Gianluca Traversi, Elisa Riceputi, Lodovico Ratti, Carla Vacchi, Roberto Beccherle, Guido Magazzù, M. Minuti, Fabio Morsani, Fabrizio Palla, Valentino Liberali, Seyedruhollah Shojaii, Alberto Stabile, Gian Mario Bilei, Mauro Menichelli, Elia Conti, Sara Marconi, D. Passen, Pisana Placidi:
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments. IWASI 2015: 49-54
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