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2000 – 2009
- 2007
[c5]Kris Tiri, Onur Aciiçmez, Michael Neve, Flemming Andersen:
An Analytical Model for Time-Driven Cache Attacks. FSE 2007: 399-413- [i3]Michael Neve, Kris Tiri:
On the complexity of side-channel attacks on AES-256 - methodology and quantitative results on cache attacks. IACR Cryptol. ePrint Arch. 2007: 318 (2007) - 2006
- [c4]Michael Neve, Jean-Pierre Seifert, Zhenghong Wang:
A refined look at Bernstein's AES side-channel analysis. AsiaCCS 2006: 369 - [c3]Michael Neve, Jean-Pierre Seifert:
Advances on Access-Driven Cache Attacks on AES. Selected Areas in Cryptography 2006: 147-162 - [i2]Ernie Brickell, Gary Graunke, Michael Neve, Jean-Pierre Seifert:
Software mitigations to hedge AES against cache-based software side channel vulnerabilities. IACR Cryptol. ePrint Arch. 2006: 52 (2006) - 2004
- [c2]Eric Peeters, Michael Neve, Mathieu Ciet:
XTR Implementation on Reconfigurable Hardware. CHES 2004: 386-399 - [i1]Mathieu Ciet, Michael Neve, Eric Peeters, Jean-Jacques Quisquater:
Parallel FPGA Implementation of RSA with Residue Number Systems - Can side-channel threats be avoided? - Extended version. IACR Cryptol. ePrint Arch. 2004: 187 (2004) - 2003
- [c1]Michael Neve, Eric Peeters, David Samyde, Jean-Jacques Quisquater:
Memories: A Survey of Their Secure Uses in Smart Cards. IEEE Security in Storage Workshop 2003: 62-72
Coauthor Index
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