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ORCIDAnanta Tiwari
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2010 – 2019
- 2016
[j8]Joshua Peraza, Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely:
PMaC's green queue: a framework for selecting energy optimal DVFS configurations in large scale MPI applications. Concurr. Comput. Pract. Exp. 28(2): 211-231 (2016)- [j7]Alex D. Breslow, Leo Porter
, Ananta Tiwari, Michael Laurenzano, Laura Carrington, Dean M. Tullsen, Allan Snavely:
The case for colocation of high performance computing workloads. Concurr. Comput. Pract. Exp. 28(2): 232-251 (2016) - [c23]Michael A. Laurenzano, Ananta Tiwari, Allyson Cauble-Chantrenne, Adam Jundt, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
Characterization and bottleneck analysis of a 64-bit ARMv8 platform. ISPASS 2016: 36-45 - [c22]Prasanna Balaprakash, Ananta Tiwari, Stefan M. Wild, Laura Carrington, Paul D. Hovland:
AutoMOMML: Automatic Multi-objective Modeling with Machine Learning. ISC 2016: 219-239 - 2015
- [j6]Michael A. Laurenzano, Joshua Peraza, Laura Carrington, Ananta Tiwari, William A. Ward Jr., Roy L. Campbell:
PEBIL: binary instrumentation for practical data-intensive program analysis. Clust. Comput. 18(1): 1-14 (2015) - [c21]Joshua Peraza, Ananta Tiwari, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
VecMeter: Measuring Vectorization on the Xeon Phi. CLUSTER 2015: 478-481 - [c20]Ananta Tiwari, Adam Jundt, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
Building Blocks for a System-Wide Power and Thermal Management Framework. ICPADS 2015: 700-707 - [c19]Ananta Tiwari, Martin Schulz, Laura Carrington:
Predicting Optimal Power Allocation for CPU and DRAM Domains. IPDPS Workshops 2015: 951-959 - [c18]Adam Jundt, Allyson Cauble-Chantrenne, Ananta Tiwari, Joshua Peraza, Michael A. Laurenzano, Laura Carrington:
Compute bottlenecks on the new 64-bit ARM. E2SC@SC 2015: 6:1-6:7 - [c17]Ananta Tiwari, Kristopher Keipert, Adam Jundt, Joshua Peraza, Sarom S. Leang, Michael Laurenzano, Mark S. Gordon, Laura Carrington:
Performance and energy efficiency analysis of 64-bit ARM using GAMESS. Co-HPC@SC 2015: 8:1-8:10 - [c16]Adam Jundt, Ananta Tiwari, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
Optimizing codes on the Xeon Phi: a case-study with LAMMPS. XSEDE 2015: 28:1-28:2 - 2014
- [j5]Alex D. Breslow, Ananta Tiwari, Martin Schulz, Laura Carrington, Lingjia Tang, Jason Mars:
Enabling fair pricing on high performance computer systems with node sharing. Sci. Program. 22(2): 59-74 (2014) - [j4]Leo Porter, Michael A. Laurenzano, Ananta Tiwari, Adam Jundt, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
Making the Most of SMT in HPC: System- and Application-Level Perspectives. ACM Trans. Archit. Code Optim. 11(4): 59:1-59:26 (2014) - [c15]Pietro Cicotti, Ananta Tiwari, Laura Carrington:
Efficient speed (ES): Adaptive DVFS and clock modulation for energy efficiency. CLUSTER 2014: 158-166 - [c14]Ananta Tiwari, Anthony Gamst, Michael A. Laurenzano, Martin Schulz, Laura Carrington:
Modeling the Impact of Reduced Memory Bandwidth on HPC Applications. Euro-Par 2014: 63-74 - [c13]Michael A. Laurenzano, Ananta Tiwari, Adam Jundt, Joshua Peraza, William A. Ward Jr., Roy L. Campbell, Laura Carrington:
Characterizing the Performance-Energy Tradeoff of Small ARM Cores in HPC Computation. Euro-Par 2014: 124-137 - 2013
- [j3]Laura Carrington, Michael Laurenzano, Ananta Tiwari:
Characterizing Large-Scale HPC Applications through Trace extrapolation. Parallel Process. Lett. 23(4) (2013) - [c12]Joshua Peraza, Ananta Tiwari, Michael Laurenzano, Laura Carrington, William A. Ward Jr., Roy L. Campbell:
Understanding the performance of stencil computations on Intel's Xeon Phi. CLUSTER 2013: 1-5 - [c11]Laura Carrington, Michael Laurenzano, Ananta Tiwari:
Inferring Large-Scale Computation Behavior via Trace Extrapolation. IPDPS Workshops 2013: 1667-1674 - [c10]Alex D. Breslow, Ananta Tiwari, Martin Schulz, Laura Carrington, Lingjia Tang, Jason Mars:
Enabling fair pricing on HPC systems with node sharing. SC 2013: 37:1-37:12 - [c9]Prasanna Balaprakash, Ananta Tiwari, Stefan M. Wild:
Multi Objective Optimization of HPC Kernels for Performance, Power, and Energy. PMBS@SC 2013: 239-260 - 2012
- [c8]Ananta Tiwari, Michael Laurenzano, Joshua Peraza, Laura Carrington, Allan Snavely:
Green Queue: Customized Large-Scale Clock Frequency Scaling. CGC 2012: 260-267 - [c7]Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely:
Modeling Power and Energy Usage of HPC Kernels. IPDPS Workshops 2012: 990-998 - [c6]Michael Laurenzano, Joshua Peraza, Laura Carrington, Ananta Tiwari, William A. Ward Jr., Roy L. Campbell:
A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection. SC Companion 2012: 741-745 - [c5]Kayla O. Seager, Ananta Tiwari, Michael Laurenzano, Joshua Peraza, Pietro Cicotti, Laura Carrington:
Efficient HPC Data Motion via Scratchpad Memory. SC Companion 2012: 801-805 - 2011
- [b1]Ananta Tiwari:
Tuning Parallel Applications in Parallel. University of Maryland, College Park, MD, USA, 2011 - [j2]Ananta Tiwari, Jeffrey K. Hollingsworth, Chun Chen, Mary W. Hall, Chunhua Liao, Daniel J. Quinlan, Jacqueline Chame:
Auto-tuning full applications: A case study. Int. J. High Perform. Comput. Appl. 25(3): 286-294 (2011) - [c4]Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely:
Auto-tuning for Energy Usage in Scientific Applications. Euro-Par Workshops (2) 2011: 178-187 - [c3]Ananta Tiwari, Jeffrey K. Hollingsworth:
Online Adaptive Code Generation and Tuning. IPDPS 2011: 879-892
2000 – 2009
- 2009
- [j1]Ananta Tiwari, Vahid Tabatabaee, Jeffrey K. Hollingsworth:
Tuning parallel applications in parallel. Parallel Comput. 35(8-9): 475-492 (2009) - [c2]Ananta Tiwari, Chun Chen, Jacqueline Chame, Mary W. Hall, Jeffrey K. Hollingsworth:
A scalable auto-tuning framework for compiler optimization. IPDPS 2009: 1-12 - 2005
- [c1]Vahid Tabatabaee, Ananta Tiwari, Jeffrey K. Hollingsworth:
Parallel Parameter Tuning for Applications with Performance Variability. SC 2005: 57
Coauthor Index
aka: Michael A. Laurenzano
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