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ORCIDKeunwoo Kim
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2020 – today
- 2024
[c22]Keunwoo Kim, Jiho Song, Jong-Ho Lee, Seong-Hwan Hyun, Seong-Cheol Kim:
Codebook Design for Air-to-Air Communication Systems Operating in the UAM Corridor. ICC Workshops 2024: 1598-1603- [i3]Dahyun Jeong, Hyelim Son, Yunjin Choi, Keunwoo Kim:
Enhancing Social Media Post Popularity Prediction with Visual Content. CoRR abs/2405.02367 (2024) - 2023
- [j9]Jiho Song
, Seong-Hwan Hyun, Keunwoo Kim, Young-Jun Yoon, Juho Park, Moon-Sik Lee, Jong-Ho Lee, Seong-Cheol Kim:
Singular Direction-Based Quantizer and Receiver Designs for User Cooperative Distributed Reception. IEEE Syst. J. 17(1): 349-360 (2023) - 2022
- [j8]Seong-Hwan Hyun, Jiho Song, Keunwoo Kim, Jong-Ho Lee, Seong-Cheol Kim:
Adaptive Beam Design for V2I Communications Using Vehicle Tracking With Extended Kalman Filter. IEEE Trans. Veh. Technol. 71(1): 489-502 (2022) - [j7]Keunwoo Kim, Jiho Song, Jong-Ho Lee, Seong-Hwan Hyun, Seong-Cheol Kim:
Robust Beam Management in Position and Velocity Aware V2V Communications Using Distributed Antenna Subarrays. IEEE Trans. Veh. Technol. 71(11): 11703-11716 (2022) - [c21]Ja-Myoung Choi, Keunwoo Kim, Seong-Cheol Kim:
Outdoor Localization Based on RSS Ranging Aided by Pedestrian Dead Reckoning in GPS Restricted Scenario. APWCS 2022: 186-190 - [c20]Seong-Hwan Hyun, Jihye Kim, Keunwoo Kim, Wanjei Cho, Seong-Cheol Kim:
Joint Estimation of Vehicle's Position and Velocity With Distributed RSUs for OFDM Radar System. GLOBECOM 2022: 741-746 - [i2]HyunWook Park, Minsu Kim, Seongguk Kim, Keunwoo Kim, Haeyeon Kim, Taein Shin, Keeyoung Son, Boogyo Sim, Subin Kim, Seungtaek Jeong, Chulsoon Hwang, Joungho Kim:
Transformer Network-based Reinforcement Learning Method for Power Distribution Network (PDN) Optimization of High Bandwidth Memory (HBM). CoRR abs/2203.15722 (2022) - 2021
- [c19]Keunwoo Kim, Minjung Park, Youn-Kyung Lim:
Guiding Preferred Driving Style Using Voice in Autonomous Vehicles: An On-Road Wizard-of-Oz Study. Conference on Designing Interactive Systems 2021: 352-364 - [c18]Keunwoo Kim, Seoyeon Jang, Hyeon-Ju Park, Kyung Je Jo, Hankyung Kim, Youn-Kyung Lim:
Hurdle Relay: A Participatory Design Method for Understanding the Information Gap Through Iterative Comparison. HCI (37) 2021: 535-542 - [i1]Seong-Hwan Hyun, Jiho Song, Keunwoo Kim, Jong-Ho Lee, Seong-Cheol Kim:
Adaptive Beam Design for V2I Communications using Vehicle Tracking with Extended Kalman Filter. CoRR abs/2108.02584 (2021)
2010 – 2019
- 2015
- [j6]Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj, Ajay N. Bhoj, Matthew M. Ziegler, Phil Oldiges, Pranita Kerber, Robert Wong, Terence Hook, Sudesh Saroop, Carl Radens, Chun-Chen Yeh:
Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 534-543 (2015) - 2014
- [c17]Keunwoo Kim, Rouwaida Kanj, Rajiv V. Joshi:
Impact of FinFET technology for power gating in nano-scale design. ISQED 2014: 543-547 - 2012
- [j5]Yi-Bo Liao, Meng-Hsueh Chiang, Keunwoo Kim, Wei-Chou Hsu:
Assessment of structure variation in silicon nanowire FETs and impact on SRAM. Microelectron. J. 43(5): 300-304 (2012) - 2010
- [c16]Jae-Joon Kim, Rahul M. Rao, Keunwoo Kim:
Technology-circuit co-design of asymmetric SRAM cells for read stability improvement. CICC 2010: 1-4 - [c15]Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj:
FinFET SRAM Design. VLSI Design 2010: 440-445
2000 – 2009
- 2009
- [c14]Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das:
Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636 - 2008
- [j4]Saibal Mukhopadhyay, Keunwoo Kim, Keith A. Jenkins, Ching-Te Chuang, Kaushik Roy:
An On-Chip Test Structure and Digital Measurement Method for Statistical Characterization of Local Random Variability in a Process. IEEE J. Solid State Circuits 43(9): 1951-1963 (2008) - [j3]Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka:
Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. Very Large Scale Integr. Syst. 16(12): 1657-1665 (2008) - [c13]Saibal Mukhopadhyay, Rajiv V. Joshi, Keunwoo Kim, Ching-Te Chuang:
Variability Analysis for sub-100nm PD/SOI Sense-Amplifier. ISQED 2008: 488-491 - [c12]Rouwaida Kanj, Rajiv V. Joshi, Keunwoo Kim, Richard Williams, Sani R. Nassif:
Statistical Evaluation of Split Gate Opportunities for Improved 8T/6T Column-Decoupled SRAM Cell Yield. ISQED 2008: 702-707 - [c11]Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy:
Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. VLSI Design 2008: 125-130 - 2007
- [j2]Saibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy:
Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices. Microelectron. J. 38(8-9): 931-941 (2007) - [c10]Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang:
A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. ISLPED 2007: 8-13 - [c9]Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang:
Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies. ISLPED 2007: 20-25 - [c8]Jie Deng, Keunwoo Kim, Ching-Te Chuang, H.-S. Philip Wong:
Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI. ISQED 2007: 145-152 - [c7]Saibal Mukhopadhyay, Keunwoo Kim, Keith A. Jenkins, Ching-Te Chuang, Kaushik Roy:
Statistical Characterization and On-Chip Measurement Methods for Local Random Variability of a Process Using Sense-Amplifier-Based Test Structure. ISSCC 2007: 400-611 - [c6]Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang:
A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. VLSI Design 2007: 665-672 - 2006
- [j1]Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy:
Modeling and Analysis of Leakage Currents in Double-Gate Technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2052-2061 (2006) - 2005
- [c5]Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy:
Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits. ISLPED 2005: 8-13 - [c4]Saibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy:
Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. ISQED 2005: 410-415 - 2004
- [c3]Keunwoo Kim, Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang:
Nanoscale CMOS circuit leakage power reduction by double-gate device. ISLPED 2004: 102-107 - 2003
- [c2]Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang:
Strained-si devices and circuits for low-power applications. ISLPED 2003: 180-183 - [c1]Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri, Keunwoo Kim:
Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits. ISQED 2003: 153-158
Coauthor Index
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