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ORCIDManu Awasthi
2020 – today
- 2024
[c32]Tom Glint, Manu Awasthi, Joycee Mekie:
CANSim: When to Utilize Synchronous and Asynchronous Routers in Large and Complex NoCs. ASPDAC 2024: 1-6- [c31]Tom Glint, Manu Awasthi, Joycee Mekie:
Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data. ASPDAC 2024: 454-459 - 2023
- [j7]Sarabjeet Singh
, Neelam Surana, Kailash Prasad, Pranjali Jain, Joycee Mekie, Manu Awasthi:
HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy. ACM Trans. Archit. Code Optim. 20(2): 24:1-24:20 (2023) - [c30]Tom Glint, Manu Awasthi, Joycee Mekie:
REDRAW: Fast and Efficient Hardware Accelerator with Reduced Reads And Writes for 3D UNet. DATE 2023: 1-6 - [c29]Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie:
Analysis of Quantization Across DNN Accelerator Architecture Paradigms. DATE 2023: 1-2 - [c28]Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie:
Analysis of Conventional, Near-Memory, and In-Memory DNN Accelerators. ISPASS 2023: 349-351 - 2022
- [j6]Zhengyu Yang, Manu Awasthi, Mrinmoy Ghosh, Janki Bhimani, Ningfang Mi:
I/O Workload Management for All-Flash Datacenter Storage Systems Based on Total Cost of Ownership. IEEE Trans. Big Data 8(2): 332-345 (2022) - [c27]Manu Awasthi:
Verifiable and Practical Compliance for Data Privacy Laws. HiPCW 2022: 59-60 - [i6]Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie:
A Fresh Perspective on DNN Accelerators by Performing Holistic Analysis Across Paradigms. CoRR abs/2208.05294 (2022) - 2021
- [j5]Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie:
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3337-3350 (2021) - [j4]Varun Gohil, Sumit Walia, Joycee Mekie, Manu Awasthi:
Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(10): 3341-3345 (2021) - [i5]Varun Gohil, Sumit Walia, Joycee Mekie, Manu Awasthi:
Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications. CoRR abs/2104.04763 (2021) - [i4]Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie:
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications. CoRR abs/2105.07432 (2021) - [i3]Sarabjeet Singh, Neelam Surana, Pranjali Jain, Joycee Mekie, Manu Awasthi:
HyGain: High Performance, Energy-Efficient Hybrid Gain Cell based Cache Hierarchy. CoRR abs/2110.01208 (2021) - 2020
- [c26]Subisha V, Varun Gohil, Nisarg Ujjainkar, Manu Awasthi:
Prefetching in Hybrid Main Memory Systems. HotStorage 2020 - [c25]Tom Glint, Jitesh Sah, Manu Awasthi, Joycee Mekie:
ANSim: A Fast and Versatile Asynchronous Network-On-Chip Simulator. ICCD 2020: 619-622
2010 – 2019
- 2019
- [c24]Sarabjeet Singh, Manu Awasthi:
Efficacy of Statistical Sampling on Contemporary Workloads: The Case of SPEC CPU2017. IISWC 2019: 70-80 - [c23]Varun Gohil, Shreyas Singh, Manu Awasthi:
FAB: Framework for Analyzing Benchmarks. ICPE Companion 2019: 33-36 - [c22]Sarabjeet Singh, Manu Awasthi:
Memory Centric Characterization and Analysis of SPEC CPU2017 Suite. ICPE 2019: 285-292 - [i2]Sarabjeet Singh, Manu Awasthi:
Memory Centric Characterization and Analysis of SPEC CPU2017 Suite. CoRR abs/1910.00651 (2019) - 2018
- [j3]Janki Bhimani, Zhengyu Yang, Ningfang Mi, Jingpei Yang, Qiumin Xu, Manu Awasthi, Rajinikanth Pandurangan, Vijay Balakrishnan:
Docker Container Scheduler for I/O Intensive Applications Running on NVMe SSDs. IEEE Trans. Multi Scale Comput. Syst. 4(3): 313-326 (2018) - [c21]Sneha N. Ved, Manu Awasthi:
Exploring non-volatile main memory architectures for handheld devices. DATE 2018: 1528-1531 - [c20]Nisarg Parikh, Varun Gohil, Manu Awasthi:
META: Memory Exploration Tool for Android Devices. MobiCom 2018: 774-776 - [i1]Zhengyu Yang, Manu Awasthi, Mrinmoy Ghosh, Janki Bhimani, Ningfang Mi:
I/O Workload Management for All-Flash Datacenter Storage Systems Based on Total Cost of Ownership. CoRR abs/1809.05928 (2018) - 2017
- [c19]Qiumin Xu, Manu Awasthi, Krishna T. Malladi, Janki Bhimani, Jingpei Yang, Murali Annavaram:
Docker characterization on high performance SSDs. ISPASS 2017: 133-134 - [c18]Qiumin Xu, Krishna T. Malladi, Manu Awasthi:
Rack Level Scheduling for Containerized Workloads. NAS 2017: 1-2 - 2016
- [c17]Zhengyu Yang, Manu Awasthi, Mrinmoy Ghosh, Ningfang Mi:
A Fresh Perspective on Total Cost of Ownership Models for Flash Storage in Datacenters. CloudCom 2016: 245-252 - [c16]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
FlexDrive: A Framework to Explore NVMe Storage Solutions. HPCC/SmartCity/DSS 2016: 1115-1122 - [c15]Manu Awasthi, Krishna T. Malladi:
KOVA : A tool for kernel visualization and analysis. IPCCC 2016: 1-3 - [c14]Janki Bhimani, Jingpei Yang, Zhengyu Yang, Ningfang Mi, Qiumin Xu, Manu Awasthi, Rajinikanth Pandurangan, Vijay Balakrishnan:
Understanding performance of I/O intensive containerized applications for NVMe SSDs. IPCCC 2016: 1-8 - [c13]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
DRAMPersist: Making DRAM Systems Persistent. MEMSYS 2016: 94-95 - [c12]Krishna T. Malladi, Uksong Kang, Manu Awasthi, Hongzhong Zheng:
DRAMScale: Mechanisms to Increase DRAM Capacity. MEMSYS 2016: 325-326 - [c11]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
Software-Defined Emulation Infrastructure for High Speed Storage. SYSTOR 2016: 22:1 - 2015
- [c10]Manu Awasthi:
Rethinking Design Metrics for Datacenter DRAM. MEMSYS 2015: 162-163 - [c9]Qiumin Xu, Huzefa Siyamwala, Mrinmoy Ghosh, Manu Awasthi, Tameesh Suri, Zvika Guz, Anahita Shayesteh, Vijay Balakrishnan:
Performance Characterization of Hyperscale Applicationson on NVMe SSDs. SIGMETRICS 2015: 473-474 - [c8]Qiumin Xu, Huzefa Siyamwala, Mrinmoy Ghosh, Tameesh Suri, Manu Awasthi, Zvika Guz, Anahita Shayesteh, Vijay Balakrishnan:
Performance analysis of NVMe SSDs and their implication on real world databases. SYSTOR 2015: 6:1-6:11 - [c7]Manu Awasthi, Tameesh Suri, Zvika Guz, Anahita Shayesteh, Mrinmoy Ghosh, Vijay Balakrishnan:
System-Level Characterization of Datacenter Applications. ICPE 2015: 27-38 - 2014
- [b1]Manu Awasthi:
Managing Data Locality in Future Memory Hierarchies Using a Hardware Software Codesign Approach. University of Utah, USA, 2014 - 2012
- [j2]Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis:
Managing Data Placement in Memory Systems with Multiple Memory Controllers. Int. J. Parallel Program. 40(1): 57-83 (2012) - [c6]Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan:
Efficient scrub mechanisms for error-prone emerging memories. HPCA 2012: 15-26 - 2011
- [c5]Manu Awasthi, David W. Nellans, Rajeev Balasubramonian, Al Davis:
Prediction Based DRAM Row-Buffer Management in the Many-Core Era. PACT 2011: 183-184 - 2010
- [c4]Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis:
Handling the problems and opportunities posed by multiple on-chip memory controllers. PACT 2010: 319-330 - [c3]Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis:
Micro-pages: increasing DRAM efficiency with locality-aware data placement. ASPLOS 2010: 219-230
2000 – 2009
- 2009
- [c2]Manu Awasthi, Kshitij Sudan, Rajeev Balasubramonian, John B. Carter:
Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches. HPCA 2009: 250-261 - 2008
- [c1]Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, Rajeev Balasubramonian:
Scalable and reliable communication for hardware transactional memory. PACT 2008: 144-154 - 2007
- [j1]Manu Awasthi, Vivek Venkatesan, Rajeev Balasubramonian:
Understanding the Impact of 3D Stacked Layouts on ILP. J. Instr. Level Parallelism 9 (2007)
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