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ORCIDJei-Hwan Yoo
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2010 – 2019
- 2012
[c4]Youngdon Choi, Ickhyun Song
, Mu-Hui Park, Hoeju Chung, Sanghoan Chang, Beakhyoung Cho, Jinyoung Kim, Younghoon Oh, Dukmin Kwon, Jung Sunwoo, Junho Shin, Yoohwan Rho, Changsoo Lee, Min Gu Kang, Jaeyun Lee, Yongjin Kwon, Soehee Kim, Jaewhan Kim, Yong-jun Lee, Qi Wang, Sooho Cha, Sujin Ahn, Hideki Horii, Jaewook Lee, KiSeung Kim, Han-Sung Joo, KwangJin Lee, Yeong-Taek Lee, Jei-Hwan Yoo, Gitae Jeong:
A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth. ISSCC 2012: 46-48- 2011
- [c3]Hoeju Chung, Byung-Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun:
A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW. ISSCC 2011: 500-502 - 2010
- [j6]Uksong Kang, Hoeju Chung, Seongmoo Heo, Dukha Park, Hoon Lee, Jin Ho Kim, Soon-Hong Ahn, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jaewook Lee, Han-Sung Joo, Woo-Seop Kim, Dong Hyeon Jang, Nam-Seog Kim, Jung-Hwan Choi, Tae-Gyeong Chung, Jei-Hwan Yoo, Joo-Sun Choi, Changhyun Kim, Young-Hyun Jun:
8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE J. Solid State Circuits 45(1): 111-119 (2010) - [j5]Ki-Whan Song, Jinyoung Kim, Jae-Man Yoon, Sua Kim, Huijung Kim, Hyun-Woo Chung, Hyungi Kim, Kanguk Kim, Hwan-Wook Park, Hyun Chul Kang, Nam-Kyun Tak, Dukha Park, Woo-Seop Kim, Yeong-Taek Lee, Yong Chul Oh, Gyo-Young Jin, Jei-Hwan Yoo, Donggun Park, Kyungseok Oh, Changhyun Kim, Young-Hyun Jun:
A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency. IEEE J. Solid State Circuits 45(4): 880-888 (2010)
2000 – 2009
- 2009
- [j4]Young-Chan Jang, Hoeju Chung, Youngdon Choi, Hwan-Wook Park, Jaekwan Kim, Soouk Lim, Jung Sunwoo, Moon-Sook Park, Hyung-Seuk Kim, Sang-Yun Kim, Yun-Sang Lee, Woo-Seop Kim, Jung-Bae Lee, Jei-Hwan Yoo, Changhyun Kim:
BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel. IEEE J. Solid State Circuits 44(11): 2987-2998 (2009) - [c2]Uksong Kang, Hoeju Chung, Seongmoo Heo, Soon-Hong Ahn, Hoon Lee, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jin Ho Kim, Jaewook Lee, Han-Sung Joo, Woo-Seop Kim, Hyun-Kyung Kim, Eun-Mi Lee, So-Ra Kim, Keum-Hee Ma, Dong-Hyun Jang, Nam-Seog Kim, Man-Sik Choi, Sae-Jang Oh, Jung-Bae Lee, Tae-Kyung Jung, Jei-Hwan Yoo, Changhyun Kim:
8Gb 3D DDR3 DRAM using through-silicon-via technology. ISSCC 2009: 130-131 - 2003
- [j3]Jae-Yoon Sim, Hongil Yoon, Ki-Chul Chun, Hyun-Seok Lee, Sang-Pyo Hong, Kyu-Chan Lee, Jei-Hwan Yoo, Dong-Il Seo, Soo-In Cho:
A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor. IEEE J. Solid State Circuits 38(4): 631-640 (2003)
1990 – 1999
- 1997
- [j2]Kyu-Chan Lee, Changhyun Kim, Dong-Ryul Ryu, Jai-Hoon Sim, Sang-Bo Lee, Byung-Sik Moon, Keum-Yong Kim, Nam-Jong Kim, Seung-Moon Yoo, Hongil Yoon, Jei-Hwan Yoo, Soo-In Cho:
Low-voltage, high-speed circuit designs for gigabit DRAMs. IEEE J. Solid State Circuits 32(5): 642-648 (1997) - [c1]Sang-Hoon Lee, Chang-hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo:
An efficient statistical analysis methodology and its application to high-density DRAMs. ICCAD 1997: 678-683 - 1996
- [j1]Jei-Hwan Yoo, Chang-Hyun Kim, Kyu-Chan Lee, Kye-Hyun Kyung, Seung-Moon Yoo, Jung-Hwa Lee, Moon-Hae Son, Jin-Man Han, Bok-Moon Kang, Ejaz Haq, Sang-Bo Lee, Jai-Hoon Sim, Joung-Ho Kim, Byung-Sik Moon, Keum-Yong Kim, Jae-Gwan Park, Kyu-Phil Lee, Kang-Yoon Lee, Ki-Nam Kim, Soo-In Cho, Jong-Woo Park, Hyung-Kyu Lim:
A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth. IEEE J. Solid State Circuits 31(11): 1635-1644 (1996)
Coauthor Index
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